Academic literature on the topic 'Approximate Circuit'
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Journal articles on the topic "Approximate Circuit"
Balasubramanian, Padmanabhan, Raunaq Nayar, Okkar Min, and Douglas L. Maskell. "Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits." Computers 11, no. 1 (January 8, 2022): 11. http://dx.doi.org/10.3390/computers11010011.
Full textVisweswariah, C., and R. A. Rohrer. "Piecewise approximate circuit simulation." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 10, no. 7 (July 1991): 861–70. http://dx.doi.org/10.1109/43.87597.
Full textKoseoglu, Murat, Furkan Nur Deniz, Baris Baykant Alagoz, Ali Yuce, and Nusret Tan. "An experimental analog circuit realization of Matsuda’s approximate fractional-order integral operators for industrial electronics." Engineering Research Express 3, no. 4 (December 1, 2021): 045041. http://dx.doi.org/10.1088/2631-8695/ac3e11.
Full textYang, Zhixi, Xianbin Li, and Jun Yang. "Power Efficient and High-Accuracy Approximate Multiplier with Error Correction." Journal of Circuits, Systems and Computers 29, no. 15 (June 30, 2020): 2050241. http://dx.doi.org/10.1142/s0218126620502412.
Full textYkuntam, Yamini Devi, Bujjibabu Penumutchi, Bala Srinivas Peteti, and Satyanarayana Vella. "Performance Evaluation of Approximate Adders: Case Study." International Journal of Engineering and Advanced Technology 12, no. 1 (October 30, 2022): 68–75. http://dx.doi.org/10.35940/ijeat.a3836.1012122.
Full textOsta, Mario, Ali Ibrahim, and Maurizio Valle. "Approximate Computing Circuits for Embedded Tactile Data Processing." Electronics 11, no. 2 (January 8, 2022): 190. http://dx.doi.org/10.3390/electronics11020190.
Full textJoshi, Viraj, Pravin Mane, and Bits Pilani. "Approximate Arithmetic Circuit Design for Error Resilient Applications." International Journal of VLSI Design & Communication Systems 13, no. 1/2/3/4/5/6 (December 30, 2022): 01–16. http://dx.doi.org/10.5121/vlsic.2022.13601.
Full textBarnes, Christopher L., Daniel Bonnéry, and Albert Cardona. "Synaptic counts approximate synaptic contact area in Drosophila." PLOS ONE 17, no. 4 (April 4, 2022): e0266064. http://dx.doi.org/10.1371/journal.pone.0266064.
Full textBhargav, Avireni, and Phat Huynh. "Design and Analysis of Low-Power and High Speed Approximate Adders Using CNFETs." Sensors 21, no. 24 (December 8, 2021): 8203. http://dx.doi.org/10.3390/s21248203.
Full textGoyal, Candy, Jagpal Singh Ubhi, and Balwinder Raj. "A Reliable Leakage Reduction Technique for Approximate Full Adder with Reduced Ground Bounce Noise." Mathematical Problems in Engineering 2018 (December 16, 2018): 1–16. http://dx.doi.org/10.1155/2018/3501041.
Full textDissertations / Theses on the topic "Approximate Circuit"
Meana, Richard William Piper. "Approximate Sub-Graph Isomorphism For Watermarking Finite State Machine Hardware." Scholar Commons, 2013. http://scholarcommons.usf.edu/etd/4728.
Full textMartins, Mayler Gama Alvarenga. "Applications of functional composition for CMOS and emerging technologies." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/164452.
Full textThe advances in semiconductor industry over the last decades have been strongly based on continuous scaling down of dimensions in manufactured CMOS devices. The use of CMOS devices profoundly relies on AND/OR/Inverter logic. As the CMOS scaling is reaching its physical limits, researchers increase the effort to prolong the CMOS life. Also, it is necessary to investigate alternative devices, which in many cases implies the use of different basic logic operations. As the commercial synthesis tools are not able to handle these technologies efficiently, there is an opportunity to research alternative logic implementations better suited for these new devices. This thesis focuses on presenting efficient algorithms to design circuits in both CMOS and new technologies while integrating these algorithms into regular design flows. For this task, we apply the functional composition technique, to efficiently synthesize both CMOS and emerging technologies. The functional composition is a bottom-up synthesis approach, providing flexibility to implement algorithms with optimal or suboptimal results for different technologies. To investigate how the functional composition compares to the state-of-the-art synthesis methods, we propose to apply this synthesis paradigm into six different scenarios. Two of them focus on CMOS-based circuits, and other four are based on emerging technologies. Regarding CMOSbased circuits, we investigate functional composition to investigate multi-output factorization in a circuit resynthesis flow. Also, we manipulate approximate functions to synthesize approximate triple modular redundancy (ATMR) modules. Concerning emerging technologies, we explore functional composition over spin-diode circuits and other promising approaches based on different logic implementations: threshold logic, majority logic, and implication logic. Results present a considerable improvement over the state-of-the-art methods for both CMOS and emerging technologies applications, demonstrating the ability to handle different technologies and showing the possibility to improve technologies not explored yet.
Matyáš, Jiří. "Využití přibližné ekvivalence při návrhu přibližných obvodů." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2017. http://www.nusl.cz/ntk/nusl-363841.
Full textRIZZO, ROBERTO GIORGIO. "Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools." Doctoral thesis, Politecnico di Torino, 2019. http://hdl.handle.net/11583/2743228.
Full textDvořáček, Petr. "Evoluční návrh pro aproximaci obvodů." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-234958.
Full textTraiola, Marcello. "TEST TECHNIQUES FOR APPROXIMATE DIGITAL CIRCUITS." Thesis, Montpellier, 2019. http://www.theses.fr/2019MONTS060.
Full textDespite great improvements of the semiconductor industry in terms of energy efficiency, the computer systems’ energy consumption is constantly growing. Many largely used applications – usually referred to as Recognition, Mining and Synthesis (RMS) applications – are more and more deployed as mobile applications and on Internet of Things (IoT) structures. Therefore, it is mandatory to improve the future silicon devices and architectures on which these applications will run. Inherent resiliency property of RMS applications has been thoroughly investigated over the last few years. This interesting property leads applications to be tolerant to errors, as long as their results remain close enough to the expected ones. Approximate Computing (AxC) , is an emerging computing paradigm which takes advantages of this property. AxC has gained increasing interest in the scientific community in last years. It is based on the intuitive observation that introducing selective relaxation of non-critical specifications may lead to efficiency gains in terms of power consumption, run time, and/or chip area. So far, AxC has been applied on the whole digital system stack, from hardware to application level. This work focuses on approximate integrated circuits (AxICs), which are the result of AxC application at hardware-level. Functional approximation has been successfully applied to integrated circuits (ICs) in order to efficiently design AxICs. Specifically, we focus on testing aspects of functionally approximate ICs. In fact – since approximation changes the functional behavior of ICs – techniques to test them have to be revisited. In fact, some previous works – have shown that circuit approximation brings along some challenges for testing procedures, but also some opportunities. In particular, approximation procedures intrinsically lead the circuit to produce errors, which have to be taken into account in test procedures. Error can be measured according to different error metrics. On the one hand, the occurrence of a defect in the circuit can lead it to produce unexpected catastrophic errors. On the other hand, some defects can be tolerated, when they do not induce errors over a certain threshold. This phenomenon could lead to a yield increase, if properly investigated and managed. To deal with such aspects, conventional test flow should be revisited. Therefore, we introduce Approximation-Aware testing (AxA testing). We identify three main AxA testing phases: (i) AxA fault classification, (ii) AxA test pattern generation and (iii) AxA test set application. Briefly, the first phase has to classify faults into catastrophic and acceptable; the test pattern generation has to produce test vectors able to cover all the catastrophic faults and, at the same time, to leave acceptable faults undetected; finally, the test set application needs to correctly classify AxICs under test into catastrophically faulty, acceptably faulty, fault-free. Only AxICs falling into the first group will be rejected. In this thesis, we thoroughly discuss the three phases of AxA testing, and we present a set of AxA test techniques for approximate circuits. Firstly, we work on the classification of AxIC faults into catastrophic and acceptable according to an error threshold (i.e. the maximum tolerable amount of error). This classification provides two lists of faults (i.e. catastrophic and acceptable). Then, we propose an approximation-aware (ax-aware) Automatic Test Pattern Generation. Obtained test patterns prevent catastrophic failures by detecting catastrophic defects. At the same time, they minimize the detection of acceptable ones. Finally – since the AxIC structure often leads to a yield gain lower than expected – we propose a technique to correctly classify AxICs into “catastrophically faulty”, “acceptably faulty”, “and fault-free”, after the test application. To evaluate the proposed techniques, we perform extensive experiments on state-ofthe-art AxICs
Albandes, Iuri. "Use of Approximate Triple Modular Redundancy for Fault Tolerance in Digital Circuits." Doctoral thesis, Universidad de Alicante, 2018. http://hdl.handle.net/10045/88248.
Full textRouijaa, Hicham. "Modelisation des lignes de transmission multiconducteurs par la méthode des approximants de Padé : approche circuit." Aix-Marseille 3, 2004. http://www.theses.fr/2004AIX30011.
Full textA transmission line model is presented in this thesis. Various methods allowing calculation of the currents and the tensions distributed on the uniform transmission line. The most of these methods are limited to lines with constants or low losses, and only for linear loads. Using Padé approximant, this proposed model use most variable than the conventional lumped discretization model. The model is suitable for inclusion in general circuit simulator, such as Esacap, Spice and Saber. This method offers an efficient means to discretize transmission lines on real and complexes cells compared to the conventional lumped discretization. In addition, the model can handle frequency-dependent line parameters directly in the time domain. However, the model is extended of shielded cable for coaxial cable and general shielded cable as bundle cable. Numerical examples are presented to demonstrate the validity of the proposed model and to illustrate its application to a variety of cable category
Wang, You. "Analyse de fiabilité de circuits logiques et de mémoire basés sur dispositif spintronique." Thesis, Paris, ENST, 2017. http://www.theses.fr/2017ENST0005/document.
Full textSpin transfer torque magnetic tunnel junction (STT-MTJ) has been considered as a promising candidate for next generation of non-volatile memories and logic circuits, because it provides a perfect solution to overcome the bottleneck of increasing static power caused by CMOS technology scaling. However, its commercialization is limited by the poor reliability, which deteriorates severely with device scaling down. This thesis focuses on the reliability investigation of MTJ based non-volatile circuits. Firstly, a compact model of MTJ including main reliability issues is proposed and validated by the comparison with experimental data. Based on this accurate model, the reliability of typical circuits is analyzed and reliability optimization methodology is proposed. Finally, the stochastic switching behavior is utilized in some new designs of conventional applications
Hrbáček, Radek. "Automatický multikriteriální paralelní evoluční návrh a aproximace obvodů." Doctoral thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2017. http://www.nusl.cz/ntk/nusl-412591.
Full textBooks on the topic "Approximate Circuit"
Ullah, Salim, and Akash Kumar. Approximate Arithmetic Circuit Architectures for FPGA-based Systems. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-21294-9.
Full textReda, Sherief, and Muhammad Shafique, eds. Approximate Circuits. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-319-99322-5.
Full textUllah, Salim, and Akash Kumar. Approximate Arithmetic Circuit Architectures for FPGA-Based Systems. Springer International Publishing AG, 2023.
Find full textApproximate Circuits: Methodologies and CAD. Springer, 2018.
Find full textBenini, Luca, Rajesh K. Gupta, and Abbas Rahimi. From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators. Springer, 2018.
Find full textBenini, Luca, Rajesh K. Gupta, and Abbas Rahimi. From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators. Springer, 2017.
Find full textWilson Kimber, Marian. Womanly Women and Moral Uplift. University of Illinois Press, 2017. http://dx.doi.org/10.5406/illinois/9780252040719.003.0007.
Full textFeusner, Jamie D., and Danyale McCurdy-McKinnon. Body Dysmorphic Disorder. Edited by Christopher Pittenger. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190228163.003.0050.
Full textFerreira, Maria Helena Alves, Alice de Mello, and Elayne Oliveira Silva. Passeios a pé em Belo Horizonte: Um ciclo formativo aos guias de turismo. Brazil Publishing, 2021. http://dx.doi.org/10.31012/978-65-5861-340-4.
Full textBloch, Michael H. Comorbidity in Pediatric OCD. Edited by Christopher Pittenger. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190228163.003.0053.
Full textBook chapters on the topic "Approximate Circuit"
Wu, Ying, Chuangtao Chen, Chenyi Wen, Weikang Qian, Xunzhao Yin, and Cheng Zhuo. "Approximate Multiplier Design for Energy Efficiency: From Circuit to Algorithm." In Approximate Computing, 51–76. Cham: Springer International Publishing, 2012. http://dx.doi.org/10.1007/978-3-030-98347-5_3.
Full textUllah, Salim, and Akash Kumar. "Approximate Multipliers." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 73–112. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-21294-9_4.
Full textMoons, Bert, Daniel Bankman, and Marian Verhelst. "Circuit Techniques for Approximate Computing." In Embedded Deep Learning, 89–113. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99223-5_4.
Full textUllah, Salim, and Akash Kumar. "Designing Application-Specific Approximate Operators." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 113–47. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-21294-9_5.
Full textThakur, Garima, Shruti Jain, and Harsh Sohal. "Approximate Arithmetic Circuit for Error-Resilient Application." In Mobile Radio Communications and 5G Networks, 647–56. Singapore: Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-19-7982-8_54.
Full textBadrieh, Fuad. "Approximate and Numerical Techniques in Fourier Transform." In Spectral, Convolution and Numerical Techniques in Circuit Theory, 231–49. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-71437-0_12.
Full textUllah, Salim, and Akash Kumar. "Preliminaries." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 27–40. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-21294-9_2.
Full textUllah, Salim, and Akash Kumar. "Accurate Multipliers." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 41–72. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-21294-9_3.
Full textUllah, Salim, and Akash Kumar. "A Framework for Cross-Layer Approximations." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 149–70. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-21294-9_6.
Full textUllah, Salim, and Akash Kumar. "Conclusions and Future Work." In Approximate Arithmetic Circuit Architectures for FPGA-based Systems, 171–74. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-21294-9_7.
Full textConference papers on the topic "Approximate Circuit"
Chen, Daniel, Betis Baheri, Vipin Chaudhary, Qiang Guan, Ning Xie, and Shuai Xu. "Approximate Quantum Circuit Reconstruction." In 2022 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, 2022. http://dx.doi.org/10.1109/qce53715.2022.00073.
Full textCatelan, Daniela, Ricardo Santos, and Liana Duenha. "Accuracy and Physical Characterization of Approximate Arithmetic Circuits." In XXI Simpósio em Sistemas Computacionais de Alto Desempenho. Sociedade Brasileira de Computação, 2020. http://dx.doi.org/10.5753/wscad.2020.14065.
Full textZhang, Yuwei, Zuodong Zhang, Zhe Zhang, Jiayang Zhang, Runsheng Wang, Zhiting Ling, and Ru Huang. "Circuit Reliability Evaluation of Approximate Computing." In 2020 China Semiconductor Technology International Conference (CSTIC). IEEE, 2020. http://dx.doi.org/10.1109/cstic49141.2020.9282447.
Full textQiu, Ling, Ziji Zhang, Jon Calhoun, and Yingjie Lao. "Towards Data-Driven Approximate Circuit Design." In 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2019. http://dx.doi.org/10.1109/isvlsi.2019.00078.
Full textVenturelli, Davide, Minh Do, Eleanor Rieffel, and Jeremy Frank. "Temporal Planning for Compilation of Quantum Approximate Optimization Circuits." In Twenty-Sixth International Joint Conference on Artificial Intelligence. California: International Joint Conferences on Artificial Intelligence Organization, 2017. http://dx.doi.org/10.24963/ijcai.2017/620.
Full textSekanina, Lukas, and Zdenek Vasicek. "Approximate circuit design by means of evolvable hardware." In 2013 IEEE International Conference on Evolvable Systems (ICES). IEEE, 2013. http://dx.doi.org/10.1109/ices.2013.6613278.
Full textOliveri, A., M. Lodi, and M. Storace. "Design and circuit implementation of approximate switched MPC." In 2013 European Conference on Circuit Theory and Design (ECCTD). IEEE, 2013. http://dx.doi.org/10.1109/ecctd.2013.6662329.
Full textAlam, Mahabubul, Abdullah Ash-Saki, and Swaroop Ghosh. "Circuit Compilation Methodologies for Quantum Approximate Optimization Algorithm." In 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO). IEEE, 2020. http://dx.doi.org/10.1109/micro50266.2020.00029.
Full textSoltani, Mohammad, Cesar Vargas, Niraj Kumar, Rahul Kulkarni, and Abhyudai Singh. "Approximate statistical dynamics of a genetic feedback circuit." In 2015 American Control Conference (ACC). IEEE, 2015. http://dx.doi.org/10.1109/acc.2015.7172025.
Full textBohdanowicz, Thomas C., Elizabeth Crosson, Chinmay Nirkhe, and Henry Yuen. "Good approximate quantum LDPC codes from spacetime circuit Hamiltonians." In STOC '19: 51st Annual ACM SIGACT Symposium on the Theory of Computing. New York, NY, USA: ACM, 2019. http://dx.doi.org/10.1145/3313276.3316384.
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