Dissertations / Theses on the topic 'Analogue Design Processes'

Les mémoires résistives non volatiles à bases d'oxydes métalliques suscitent un intérêt croissant chez les industriels. Plus particulièrement, les mémoires non volatiles à base d'oxydes (OxRRAM) offrent des temps de programmation et d'accès très court, une faible consommation énergétique, un coût par bit très concurrentiel et une facilité de co-intégration dans le back-end avec du CMOS avancé. Ce travail de thèse a pour objectif le développement d'une mémoire OxRRAM facilement intégrable dans une technologie de fabrication CMOS avancée afin de montrer les avantages en vue de leur application dans des SoC. Une première étape fut la fabrication et l'analyse des cellules mémoires OxRRAM intégrant différents oxydes métalliques afin de choisir la solution la plus adaptée à être intégrée dans une technologie CMOS 65nm et 28nm. Des techniques de mesures dédiées ont été mises en place afin d'établir l'impact du diélectrique sur le fonctionnement de la mémoire OxRRAM en termes de polarisation, de temps de programmation, de courant de programmation et de mécanismes de transition. Des études statistiques et de fiabilité des différents états du point mémoire ont été aussi réalisées. La modélisation associée a permis de mieux comprendre les mécanismes de vieillissements et prédire des lois de durée de vie sous champ et en température des état écrit et effacé de la cellule OxRRAM. Les données expérimentales obtenues sur les cellules ont ensuite permis de concevoir et d'optimiser un circuit d'évaluation statistique de 16 Kbit en technologie CMOS 28nm en tenant compte de toutes les contraintes de design analogique
Oxide-based Resistive Random Acces Memories (OxRRAM) are nowadays considered among the most promising solutions for future generation of low-cost embedded non-volatile memories. The advantages of these memories are the scalability, low power consumption, high speed, complementary metal oxide semiconductor technology (CMOS) compatibility and ease of fabrication (the memory cell consisting of a Metal–Insulator– Metal (MIM) structure integrated in the back-end-of-line, plus an addressing element, i.e. a transistor or a diode) . The potential applications range from consumer – communications to automotive – industrial. This work deals with the development of an OxRRAM demonstrator into an advanced CMOS technology for System on Chip (SoC) application. We discuss the impact of different dielectrics materials (Ta2O5, ZrO2 and HfO2) and electrodes (Pt, Ti, TiN) on the memory performances and reliability in order to choose the best couple dielectric/electrode. We focus on the understanding of the memory switching physics that is involved in the programming of OxRRAM bit-cells. The failure and transition mechanism are presented for lifetime prediction. Some methodologies are presented in this PhD thesis for the optimization of the OxRRAM bit-cell performances and sizes according to a targeted Mutliple Time Programmable (MTP) memory application. We developed analog block systems to control and address the OxRRAM bit-cell taking to account the bipolar switching characteristics of the devices. Finally, these solutions are to be validated using a 1-kb OxRRAM demonstrator yet designed and fabricated in a logic 28-nm node CMOS technology. Keywords: Oxide Resistive memory (OxRRAM), High-k, MIM, CMOS, Characterization, Reliability, Modeling, Analog Design, Simulation

Intro „Sieben von zehn Euro wurden im Jahr 2015 in Deutschland mit Dienstleistung, also Serviceangeboten umgesetzt.“ (Statista, 2015) Was zeichnet das Design einer guten, neuen Dienstleistung aus – Erlebnis, positive Emotion, Zufriedenheit und Vertrautheit, der Wunsch nach Wiederholung? Es geht darum alltagstaugliche Dienstleistungsinnovationen ganz nah am Menschen zu entwickeln. Eine organisatorisch durchgängige, gesamtheitliche Gestaltung von Service-Produkt-Systemen ist dafür notwendig. Gutes Service-Design hat einen markanten Unterschied zu gewohnten und vorherigen Lösungen – es bietet dem Kunden einen hohen Erlebnisfaktor, Neuheitsgrad, spürbaren Mehrwert und darüber nachhaltige Weitererzählungsfaktoren an.

Intro „Sieben von zehn Euro wurden im Jahr 2015 in Deutschland mit Dienstleistung, also Serviceangeboten umgesetzt.“ (Statista, 2015) Was zeichnet das Design einer guten, neuen Dienstleistung aus – Erlebnis, positive Emotion, Zufriedenheit und Vertrautheit, der Wunsch nach Wiederholung? Es geht darum alltagstaugliche Dienstleistungsinnovationen ganz nah am Menschen zu entwickeln. Eine organisatorisch durchgängige, gesamtheitliche Gestaltung von Service-Produkt-Systemen ist dafür notwendig. Gutes Service-Design hat einen markanten Unterschied zu gewohnten und vorherigen Lösungen – es bietet dem Kunden einen hohen Erlebnisfaktor, Neuheitsgrad, spürbaren Mehrwert und darüber nachhaltige Weitererzählungsfaktoren an.

A criatividade no design envolve um processo, que inclui tanto o processo cognitivo do indivíduo, quanto os processos de criação, de projeto e de comunicação. O pensamento criativo do indivíduo, com suas operações cognitivas e conhecimentos armazenados, permite a criação de novas conexões entre ideias. Entretanto, considerando uma perspectiva contextual e sistêmica, os pensamentos individuais serão também estimulados e influenciados por contextos sociais e trabalhos em grupos, nos quais as ideias são desenvolvidas também a partir da expressão e comunicação do pensamento do outro. Neste processo, o pensamento por analogias mostrou-se como um procedimento cognitivo fundamental para a formação de combinações e novas relações que são percebidas e então reorganizadas em uma ideia nova. Contudo, há lacunas a respeito do assunto, sobre como auxiliar esse tipo de pensamento nos indivíduos e que estratégias, métodos e estímulos podem ser utilizados em processo criativos em grupo. Nesse sentido, o objetivo desta tese é desenvolver um framework para auxiliar o processo criativo em design, centrando-se no pensamento por analogias, que identifique estratégias e mecanismos que apoiem esse processo em indivíduos e grupos de projeto. Para tanto, foi realizada uma revisão de literatura sobre criatividade, processo e pensamento criativo, bem como a respeito do pensamento por analogias e a sua ocorrência enquanto no pensamento criativo em design. A seguir, a fim de compreender o entendimento dos designers sobre o processo criativo e os facilitadores do pensamento por analogias na prática e no ensino do design, realizou-se a coleta de dados da investigação. A coleta foi realizada através de questionários virtuais para estudantes e docentes de design e de entrevistas semiestruturadas em escritórios de design. O grupo de sujeitos da pesquisa compreendeu designers brasileiros e portugueses, com diferentes níveis de experiência. Os dados obtidos foram analisados e triangulados com a análise da literatura, o que possibilitou o desenho de um modelo contendo os fatores críticos que influenciam a criatividade em grupos e indivíduos, um modelo do processo e pensamento criativo, a identificação de estratégias e mecanismos que podem auxiliar esse tipo de pensamento e, por fim, diretrizes para o desenho do framework conceitual. Com isso, foi desenvolvida uma primeira versão do framework, que foi avaliada com a realização de workshops com três grupos distintos de participantes, incluindo docentes, estudantes e profissionais de design. A partir das avaliações, aprimorou-se o framework conceitual, organizado em cinco etapas e contendo estratégias, ações, mecanismos, recomendações e sugestões de métodos, técnicas e ferramentas para auxiliar o processo criativo e o pensamento por analogias para a criação de conceitos em grupos de design. Dentre as ferramentas sugeridas, foi também desenvolvido um mapa visual, denominado canvas, a exemplo de ferramentas similares, contendo recomendações e questões-chave geradas a partir das estratégias do framework, a fim de auxiliar a sua aplicação na prática projetual.
Creativity in design involves a process that includes both the individual cognitive process as the creative, design and communication processes. The individual creative thinking, with their cognitive operations and knowledge stored, allows the creation of new connections between ideas. However, considering a contextual and systemic perspective, individual thoughts will also be stimulated and influenced by social context and work in groups in which ideas are also developed from the expression and communication of thought the other. In this process, the analogical thinking proved to be a key cognitive procedure for the formation of combinations and new relationships that are perceived and then reorganized into a new idea. However, there are gaps on the subject, how about helping this kind of thinking in individuals and strategies, methods and stimuli can be used in creative group process. In this sense, the objective of this thesis is to develop a framework to assist the creative process in design, focusing on thinking by analogies, identifying strategies and mechanisms to support this process in individuals and project groups. Therefore, there was a review of literature on creativity, process and creative thinking as well as about the thinking by analogies and their occurrence as cognitive process of design creative thinking. Next, in order to identify the understanding of the designers on the creative process and the facilitators of thinking by analogies in practice and design education, held the collection of research data. Data collection was conducted through virtual questionnaires for students and teachers design and semi-structured interviews in design offices. The sample consisted of Brazilian and Portuguese designers with different levels of experience. The data were analyzed and triangulated with the analysis of the literature, which enabled the design of a model containing the critical factors that influence creativity in individuals and groups, a model of the process and creative thinking, the identification of strategies and mechanisms that can assist this kind of thinking, and finally, guidelines for the design of the conceptual framework. Thus, a first version of the framework was developed, which was evaluated by conducting workshops with three different participating groups, including teachers, students and design professionals. From the assessments, improved the conceptual framework, organized into five steps and containing strategies, actions, mechanisms, recommendations and suggestions of methods, techniques and tools to assist the creative process and the thinking analogies to create concepts in groups of design. Among the suggested tools was also developed a visual map, called the canvas, like similar tools, containing recommendations and key issues generated from the framework of the strategies in order to assist their application in design practice.

With more and more integration of analog and RF circuits in scaled CMOS technologies, process variation is playing a critical role which makes it difficult to achieve all the performance specifications across all the process corners. Moreover, at scaled technology nodes, due to lower voltage and current handling capabilities of the devices, they suffer from reliability issues that reduce the overall lifetime of the system. Finally, traditional static style of designing analog and RF circuits does not result in optimal performance of the system. A new design paradigm is emerging toward digitally assisted analog and RF circuits and systems aiming to leverage digital correction and calibration techniques to detect and compensate for the manufacturing imperfections and improve the analog and RF performance offering a high level of integration. The objective of the proposed research is to design digital friendly and performance tunable adaptive analog/RF circuits and systems with digital enhancement techniques for higher performance, better process variation tolerance, and more reliable operation and developing strategy for testing the proposed adaptive systems. An adaptation framework is developed for process variation tolerant RF systems which has two parts – optimized test stimulus driven diagnosis of individual modules and power optimal system level tuning. Another direct tuning approach is developed and demonstrated on a carbon nanotube based analog circuit. An adaptive switched mode power amplifier is designed which is more digital-intensive in nature and has higher efficiency, improved reliability and better process resiliency. Finally, a testing strategy for adaptive RF systems is shown which reduces test time and test cost compared to traditional testing.

Due to continued device dimensions scaling, CMOS transistors in the nanometer regime have resulted in major reliability and variability challenges. Reliability issues such as channel hot electron injection, gate dielectric breakdown, and negative bias temperature instability (NBTI) need to be accounted for in the design of robust RF circuits. In addition, process variations in the nanoscale CMOS transistors are another major concern in today's circuits design. An adaptive gate-source biasing scheme to improve the RF circuit reliability is presented in this work. The adaptive method automatically adjusts the gate-source voltage to compensate the reduction in drain current subjected to various device reliability mechanisms. A class-AB RF power amplifier shows that the use of a source resistance makes the power-added efficiency robust against threshold voltage and mobility variations, while the use of a source inductance is more reliable for the input third-order intercept point. A RF power amplifier with adaptive gate biasing is proposed to improve the circuit device reliability degradation and process variation. The performances of the power amplifier with adaptive gate biasing are compared with those of the power amplifier without adaptive gate biasing technique. The adaptive gate biasing makes the power amplifier more resilient to process variations as well as the device aging such as mobility and threshold voltage degradation. Injection locked voltage-controlled oscillators (VCOs) have been examined. The VCOs are implemented using TSMC 0.18 μm mixed-signal CMOS technology. The injection locked oscillators have improved phase noise performance than free running oscillators. A differential Clapp-VCO has been designed and fabricated for the evaluation of hot electron reliability. The differential Clapp-VCO is formed using cross-coupled nMOS transistors, on-chip transformers/inductors, and voltage-controlled capacitors. The experimental data demonstrate that the hot carrier damage increases the oscillation frequency and degrades the phase noise of Clapp-VCO. A p-channel transistor only VCO has been designed for low phase noise. The simulation results show that the phase noise degrades after NBTI stress at elevated temperature. This is due to increased interface states after NBTI stress. The process variability has also been evaluated.
ID: 031001466; System requirements: World Wide Web browser and PDF reader.; Mode of access: World Wide Web.; Adviser: Jiann S. Yuan.; Title from PDF title page (viewed July 10, 2013).; Thesis (Ph.D.)--University of Central Florida, 2012.; Includes bibliographical references (p. 101-111).
Ph.D.
Doctorate
Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering

PCM test structures are commonly used to check the produced wafers from the standpoint of the technologist. In general these structures are managed inside the FAB and are focused on standard device properties. Hence their development and analysis is not driven by analog circuit blocks, which are sensitive or often used. Especially for DFM/Y of analog circuits the correlation between design and technology has to be defined. The knowledge of electrical behavior of test structures helps to improve the designer's sensitivity to technological questions. This paper presents a method to bring the PCM methodology into the analog circuit design to improve design performance, yield estimation and technology correlation. We show how both analog circuit and PCM blocks can be simulated and analyzed in the design phase.

In this thesis, we consider an analog antenna combining architecture for a MIMO wireless transceiver, while pointing out its advantages with respect to the traditional MIMO architectures. In the first part of this work, we focus on the transceiver design, especially the calculation of the beamformers that must be applied at the RF. This analysis is performed in an OFDM system under different assumptions on the channel state information. As a result, several criteria and algorithms for the selection of the beamformers are proposed. In the second part, we address the FPGA design and implementation of a baseband processor for this architecture. This baseband processor is based on the standard IEEE 802.11a. Finally, some real-time tests of the implemented baseband processor are carried out both in stand-alone configuration and also with the whole physical layer setup.
En esta tesis consideramos una arquitectura de combinación analógica de antenas para una estación inalámbrica MIMO, señalando las ventajas de ésta con respecto a la arquitectura tradicional MIMO. En la primera parte de este trabajo analizamos el cálculo de los pesos que se deben aplicar en RF. Este análisis es realizado para un sistema OFDM bajo diferentes suposiciones sobre el conocimiento del canal en el transmisor. Como resultado, se ofrecen varios criterios y algoritmos para el cálculo de los pesos. La segunda parte se centra en el diseño y la implementación FPGA de un procesador banda base para esta arquitectura. Este procesador está basando en el estándar IEEE 802.11a. Finalmente se llevan a cabo algunos experimentos en tiempo-real del procesador banda base. Estos experimentos se han realizado tanto con el procesador aislado como integrado en el resto de la capa física del sistema.

L’architecture change parce que le monde change. L’impact des enjeux environnementaux sur la pensée de l’architecture, sur les idées et sur les formes architecturales est le sujet de cette recherche. Le secteur du bâtiment est aujourd’hui considéré comme un levier important pour résoudre la crise environnementale. Cependant, des décalages s’affirment entre des impératifs urgents et règlementaires d’atteindre des objectifs quantitatifs précis, et la nécessité pour l’architecture d’être pensée en lien avec une nouvelle culture environnementale. Transition énergétique. Transition environnementale. Transition architecturale ? Dans quel processus de néomorphisation sommes-nous ? Ce travail de recherche concerne la période de transition engagée à la fin des années 1990 et dont les scénarios se construisent à horizon 2050. L’objectif est de définir des concepts et des outils, pour caractériser de façon ouverte et pluridisciplinaire la transition architecturale vers une architecture environnementale et fournir matière à penser. Les concepts de néomorphisme architectural et de Potentiel Néomorphique (PN) sont créés, pour répondre au contexte d’une transition en cours. Par analogie avec le néologisme désignant un mot nouveau qui renouvelle et enrichit le langage, le néomorphisme architectural désigne une forme nouvelle. Il est de la même façon issu d’un processus morphologique créatif, expérimental, riche et complexe, propre aux périodes de transition. Les Potentiels Néomorphiques de l’architecture environnementale qui en découlent, désignent les nouvelles idées à l’origine des nouvelles formes architecturales. La spécificité de ce travail de recherche repose sur une approche originale de la pensée de l’architecture, des idées aux formes et des formes aux idées, et sur la création d’espaces analogiques. Les espaces analogiques sont constitués à partir de la confrontation de trois corpus : un corpus d’idées (les PN), un corpus de formes architecturales manifestes et un corpus de formes artistiques subversives. Ils sont conçus pour nourrir le débat, questionner la notion de justesse et pour stimuler la pensée de l’architecture, la soustraire au prêt-à-penser et permettre l’impensé. Ces éléments théoriques sont réinvestis dans la réalisation de la maquette d’un thésaurus. Le « Thésaurus de l’architecture environnementale, des idées aux formes et des formes aux idées » est un outil de veille et de connaissance. Il permet de découvrir, s’approprier et penser l’architecture environnementale à travers un nouveau cadre descriptif et des espaces analogiques. Proposé sur le principe d’un outil collaboratif en ligne, il invite à une approche pluriculturelle de l’architecture et permet le partage d’un savoir vivant et réactif. La maquette du Thésaurus de l’architecture environnementale ouvre la voie à des prolongements pédagogiques orientés sur l’identification de nouvelles références. Son ambition est de contribuer à la construction d’une histoire contemporaine des idées et des formes de l’architecture environnementale
Architecture is changing because the world is changing.The impact of environmental issues on the way of thinking architecture, and also on architectural ideas and architectural forms, is the subject of this research.The building sector is now considered as an important tool in order to solve the environmental crisis. However, discrepancies are increasing between, on the one hand, urgent and regulatory requirements to achieve specific quantitative targets and, on the other, the need for architecture to be thought of in connection with a new environmental culture.Energy transition. Environmental transition. Architectural transition?How to define this neomorphisation process.This research concerns the transition period that started in the late 1990s and where the scenarios are projected up to the 2050s. The objective is to define concepts and tools, to characterize the architectural transition towards an environmental architecture, in an open and multidisciplinary manner, and to provide food for thought.The concepts of “architectural neomorphism” and “Neomorphic Potential” (PN) are created, in response to the context of a transition in progress. By analogy with the neologism which designates a new word that renews and enriches language, architectural neomorphism indicates a new form. In the same way, it results from a morphological process, creative, experimental, rich and complex, specific to transition periods. The resulting “Neomorphic Potentials” of environmental architecture describe the ideas which are behind the new architectural forms.The specific quality of this research work is based on an original approach to architectural thought, from ideas to forms and from forms to ideas, and on the creation of “analogical spaces”. They are composed as a result of the confrontation of three corpora : a corpus of ideas (PN), a corpus of manifest architectural forms and a corpus of subversive artistic forms. They are designed to active debate, to question the concept of accuracy and to stimulate our thinking about architecture, to escape standard ways of thinking and to promote outside-the-box thinking.These theoretical elements are reinvested in making a model of a thesaurus.The "Thesaurus of environmental architecture, from ideas to forms and from forms to ideas" is both a monitoring tool and a resource centre. It gives the opportunity to discover, to take on board and to think environmental architecture through a new descriptive framework using analogical spaces. Offered on the principle of an online collaborative tool, it calls for a multicultural approach to architecture so that knowledge can be shared in a lively, interactive way.The model of the Thesaurus of environmental architecture opens up the way for new teaching methods directed towards the identification of new references. Its ambition is to contribute to a contemporary history of ideas and forms of environmental architecture

La triade de Vitruve revisitée à travers l’exemple de l’architecture d’Hervé Tordjman. La place de l’art et de la technique dans le processus de conception. Aujourd’hui, la conception de l’architecture demeure comme à son origine, dépendante de l’interaction des trois qualités indissociables de Vitruve : firmitas, utilitas et venustas, considérées autrefois indispensables à l’acte de concevoir. L’incarnation de cette triade dans le processus créatif des concepteurs contemporains que nous avons étudiés dans le cadre de cette thèse, qu’ils soient architectes-ingénieurs-artistes, architectes-artistes ou architectes-ingénieurs, est assujettie d’une part, aux mécanismes cognitifs : le modèle et la pensée analogique ; et d’autre part aux compétences et postures de chacun.Toutefois, en dépit de ce caractère personnel du processus conceptuel, ces trois qualités qui jadis devaient être articulées par une seule personne (l’architecte), se trouvent aujourd’hui menées à l’unisson selon un processus collectif.En effet, grâce aux nouvelles technologies numériques actuelles, l’architecte et les ingénieurs sont mobilisés dans un processus dit collaboratif abolissant ainsi les frontières entre « parti » architectural et « idée constructive », architecture et construction. A travers l’analyse de l’œuvre de l’architecte parisien Hervé Tordjman (1975), il faut souligner l’importance qu’acquiert la « firmitas » dans le processus de création en s’intégrant harmonieusement avec les autres composantes (utilitas et venustas). Ainsi, le point de vue de l’auteur et de chaque acteur de la chaine de conception devient partie intégrante dans le processus. Une telle articulation collective de la trinité vitruvienne dans la pratique contemporaine du projet marque une évolution dans la façon de concevoir l’acte architectural et non une rupture
Vitruvian triad revisited through the example of the architecture of Hervé Tordjman. The place of art and technique in the design process. Today, the design of architecture remains as to its origin, dependent on the interaction of three inseparable qualities stated by Vitruvius: firmitas, utilitas and venustas, once considered essential to the act of conceiving. The embodiment of this triad in the creative process of contemporary designers that is the concern of this thesis, both artists-architects-engineers, architects or artists-architects-engineers, is subject on the one hand, to cognitive mechanisms: the model and analogical thinking; and secondly to individual skills and postures.However, despite this personal character of the design process, these three qualities which once had to be articulated by one person (i.e. the architect), are now conducted in unison as a collective process.Indeed, thanks to new existing digital technologies, the architect and engineers are mobilized in a process said collaborative that abolishes the boundaries between the architectural part and the constructive system that is architecture and construction. Through the analysis of the work of the Parisian architect Hervé Tordjman (1975), we must emphasize the importance acquired by the "firmitas" in the creation process by being harmoniously integrated with other components (utilitas and venustas). Thus, the author’s view as well as that of each player in the design chain becomes part in the process. Such a collective articulation of the Vitruvian trinity in the contemporary practice project marks an evolution in how to design the architectural act, not a rupture

Um monitor de tensão de limiar (VT0) é um circuito que, idealmente, entrega o valor do VT0 como uma tensão na saída, para uma determinada faixa de temperatura, sem a necessidade de polarização externa, configurações paramétricas, ajuste de curvas ou qualquer cálculo subsequente. Estes circuitos podem ser usados em sensores de temperatura, referências de tensão e corrente, dosímetros de radiação e outras aplicações, uma vez que a dependência do VT0 nas condições de operação é um aspecto bem modelado. Além disso, estes circuitos podem ser utilizados para monitoramento de processos de fabricação e para compensação da variabilidade do processo, uma vez que o VT0 é um parâmetro chave para o comportamento do transistor e sua modelagem. Nesta tese, são apresentadas três novas topologias de circuitos, duas são monitores de VT0 NMOS e a terceira é um monitor de VT0 PMOS. As três estruturas são topologias de circuito auto-polarizadas que não utilizam resistências, e apresentam alta rejeição a variações na alimentação, baixa sensibilidade de Linea, e permitem a extração direta da tensão de limiar para grandes intervalos de temperatura e de tensão de alimentação, com pequeno erro. Sua metodologia de projeto é baseada no modelo unificado controlado por corrente (UICM), um modelo MOSFET que é contínuo, desde o nível de inversão fraca a forte e para as regiões de operação de triodo e saturação. Os circuitos ocupam uma pequena área de silício, consomem apenas dezenas de nanowatts, e podem ser implementados em qualquer processo padrão CMOS digital, uma vez que só utilizam transistores MOS (não precisa de nenhum resistor). Os monitores de VT0 são utilizados em diferentes aplicações, a fim de investigar a sua funcionalidade e comportamento como parte de um sistema. As aplicações variam de uma tensão de referência, que apresenta um desempenho comparável ao estado da arte, para uma configuração que permite obter uma menor variabilidade com processo na saída de um circuito auto-polarizado que gera um tensão CTAT. Além disso, explorando a capacidade de funcionar como um gerador de corrente específica (ISQ) que os monitores de VT0 aqui apresentados oferecem, introduz-se um novo circuito auto-polarizado que gera um tensão CTAT, que é menos sensível a variações de processo, e pode ser usado em referências de tensão band-gap.
A threshold voltage (VT0) monitor is a circuit that ideally delivers the estimated VT0 value as a voltage at its output, for a given temperature range, without external biases, parametric setups, curve fitting or any subsequent calculation. It can be used in temperature sensors, voltage and current references, radiation dosimeters and other applications since the MOSFET VT0 dependence on the operation conditions is a very well modeled aspect. Also, it can be used for fabrication process monitoring and process variability compensation, since VT0 is a key parameter for the transistor behavior and modeling. In this thesis, we present three novel circuit topologies, two of them being NMOS VT0 monitors and the last one being a PMOS VT0 monitor. The three structures are resistorless self-biased circuit topologies that present high power supply rejection, low line sensitivity, and allow the direct extraction of the threshold voltage for wide temperature and power supply voltage ranges, with small error. Its design methodology is based on the Unified Current Control Model (UICM), a MOSFET model that is continuous from weak to strong inversion and from triode to saturation regions. The circuits occupy small silicon area, consume just tens of nanoWatts, and can be implemented in any standard digital CMOS process, since they only use MOS transistors (does not need any resistor). The VT0 monitors are used in different applications in order to prove their functionality, and behavior as part of a system. The applications vary from a reference voltage, that presents performance comparable with state-of-the-art works, to a configuration that allows to obtain a lower process variability, in the output of a self-biased circuit that generates a complementary to the absolute temperature (CTAT) voltage. In addition, exploiting the ability to operate as an specific current (ISQ) generator, that the VT0 monitors presented here offer, we introduced a new self-biased circuit that produces a CTAT voltage and is less sensitive to process variations, and can be used in band-gap voltage references.

The aim of this study is to investigate the effectiveness of conceptual change text oriented instruction accompanied with analogies over traditionally designed chemistry instruction on overcoming 10th grade students&rsquo
misconceptions, their understanding of rate of reaction concepts and their attitude towards chemistry as a school subject. 42 tenth grade students from two classes of a chemistry course taught by the same teacher at a public high school in Ç
anakkale involved in the study. The study was carried out in Spring Semester of 2005-2006 Education Year. Two groups of students participated in the study. One group was called Experimental Group and instructed with conceptual change texts oriented instruction accompanied with analogies and the other group was called Control Group and was instructed with traditionally designed chemistry instruction over a period of four weeks. To investigate the effectiveness of the treatment, Rate of Reaction Concepts Test and Attitude Scale Towards Chemistry as a school subject were administered to both groups of students at the beginning and at the end of the treatment period. To evaluate students&rsquo
science process skills, Science Process Skills Test was administered to both groups of students before the treatment. MANCOVA was used to test the hypothesis of the study. The results of the study indicated that students instructed with conceptual change texts oriented instruction accompanied with analogies gained higher average scores in Rate of Reaction Concepts Test than the students instructed with traditionally designed chemistry instruction. Results and strategies that were developed for the present study may be used by science teachers to reduce and eliminate students&rsquo
misconceptions about rate of reaction concepts.

Design fixation is a phenomenon experienced by professional designers and engineering design students that stifles creativity and innovation through discouraging ideational productivity, fluency and diversity. During the design idea and concept generation phase of the design process, a reliance on perceptual surface feature similarities between design artefacts increases the likelihood of design fixation leading to design duplication. Psychologists, educators and designers have become increasingly interested in creative idea generation processes that encourage innovation and entrepreneurial outcomes. However, there is a notable lack of collaborative research between psychology, education and engineering design particularly on inductive reasoning of undergraduate engineering students in higher education. The data gathered and analysed for this study provides an insight into property inference decision-making preferences and decision switching (SWITCH) patterns of engineering undergraduates under similarity-based inductive judgements [SIM] and category-based inductive judgements [CAT]. For this psychology experiment, property induction tasks were devised using abstract shapes in a triad configuration. Participants (N = 180), on an undergraduate engineering programme in London, observed a triad of shapes with a target shape more similar-looking to one of two given shapes. Factors manipulated for this experiment included category alignment, category group, property type and target shape. Despite the cognitive development and maturation stage of undergraduate engineers (adults) in higher education, this study identified similarity-based inductive judgements [SIM] to play a significant role during inductive reasoning relative to the strength of category-based inductive judgements [CAT]. In addition to revealing the property inference decision-making preferences of a sample of undergraduate engineers (N = 180), two types of switch classification and two types of non-switch classification (SWITCH) were found and named SIM_NCC, SIM-Salient, Reverse_CAT and CAT_Switching. These different classifications for property inference switching and non-switching presented a more complex pattern of decision-making driven by the relative strength between similarity-based inductive judgements [SIM] and category-based inductive judgements [CAT]. The conditions that encouraged CAT_Switching is of particular interest to design because it corresponds to inference decision switching that affirms the sharing of properties between dissimilar-looking shapes designated as category members, i.e., in a conflicting category alignment condition (CoC). For CAT_Switching, this study found a significant interaction between a particular set of conditions that significantly increased the likelihood of property inference decisions switching to affirm the sharing of properties between dissimilar-looking shapes. Stimuli conditions that combined a conflicting category alignment condition (where dissimilar-looking shapes belong to the same category) with category specificity, a causal property and a target shape with merged (or blended) perceptual surface features significantly increased the likelihood of a property inference decision switching. CAT_Switching has important implications for greater ideational productivity, fluency and diversity to discourage design fixation within the conceptual design space. CAT_Switching conditions could encourage more creative design transformations with alternative design functions through inductive inferences that generalise between dissimilar artefact designs. The findings from this study led to proposing a Cartesian view of the concept design space to represent the possibilities for greater movements through flexible and expanding category boundaries to encourage conceptual combinations, greater ideational fluency and greater ideational diversity within a configuration design space. This study has also created a platform for further research into property inference decision-making, ideational diversity and category boundary flexibility under stimuli conditions that encourage designers and design students to make inductive generalisations between dissimilar domains of knowledge through a greater emphasis on causal relations and semantic networks.

The main purpose of this study was to investigate the effects of conceptual change oriented instruction accompanied with analogies on eight grade students&rsquo
understanding of chemical bonding concepts. In addition, the effect of instruction on students&rsquo
attitude toward science as a school subject and the effect of gender difference on understanding of chemical bonding concepts were investigated. Fifty eight-grade students from two classes of a science course taught by the same teacher in Bü
yü
kelç
i Nazim Belger Primary School in the 2010-2011 spring semesters participated in the study. The study included two groups which were selected randomly throughout three classes. One of the groups was defined as control group in which students were instructed by traditionally designed science instruction, while other group was defined as experimental group in which students were instructed by conceptual change texts oriented instruction accompanied with analogies. Chemical Bonding Concept Pre-Test was administered to both groups as a pre-test and Chemical Bonding Concept Post-Test was administered to both groups as a post-test in order to assess their understanding of concepts related to chemical bonding. Students were also given Attitude Scale Towards Science as a School Subject at the beginning and end of the study to determine their attitudes and Science Process Skill Test was used at the beginning of the study to measure their science process skills. The hypotheses were tested by using analysis of covariance (ANCOVA) and two-way analysis of variance (ANOVA). The results indicated that instruction based on constructivist approach caused a significantly better acquisition of scientific conceptions related to chemical bonding and produced significantly higher positive attitudes toward science as a school subject than the traditionally designed science instruction. Also, science process skill was a strong predictor in understanding the concepts related to chemical bonding. On the other hand, no significant effect of gender difference on understanding the concepts about chemical bonding and students&rsquo
attitudes toward science as a school subject was found.

The main aim of this study to investigate the effectiveness of conceptual change texts oriented instruction accompanied with analogies over traditionally designed chemistry instruction on overcoming 10th grade students&
#8217
misconceptions, their understanding of rate of reaction concepts and attitude towards chemistry as a school subject. 56 tenth grade students from two classes of a chemistry course taught by the same teacher in the ATATÜ
RK Anatolian High school, participated in the study. This study was carried out in 2003-2004 spring semester. There were two groups in the study. Experimental group was instructed with conceptual change texts oriented instruction accompanied with analogies and the control group was instructed by traditionally designed chemistry instruction over a period of four weeks. To investigate the effect of treatment, Rate of Reaction Concepts Test and Attitude Scale Toward Chemistry as a school subject were administered to all students in both groups at the beginning and end of the treatment. To evaluate students&
#8217
science process skills, Science Process Skills Test was administered before treatment. To test the hypothesis of the study ANOVA and ANCOVA were used. The result of the study showed that students in conceptual change texts oriented instruction accompanied with analogies got higher average scores in Rate of Reaction Concepts Test than traditionally designed chemistry instruction. Also, students in experimental group indicated a higher positive attitude toward chemistry as a school subject. In addition, science process skill was a strong predictor for the achievement related to rate of reaction concepts. Results and strategies that were developed for this study may be used by teachers to reduce and eliminate students&
#8217
misconceptions about the rate of reaction concepts.

博士
國立交通大學
電子工程系所
96
Due to the growing popularity of electronic technology, the electronic products are continuously asked to reduce its weight, thickness, and volume. So, the reliability of analog integrated circuit is more and more important. Moreover, with the device dimensions of the integrated circuits scaling down, the operation voltage and gate-oxide thickness of device had also been reduced. However, the extra non-ideal effects of devices have great impact on analog integrated circuit to increase design difficulty, such as the lower operation voltage and thin gate oxide. So the new design technique in low-voltage analog integrated circuit and the impact of gate-oxide reliability on performances of analog circuits can be developed. The thinner gate oxide of device will cause the reliability problem in nanoscale analog integrated circuit. In this dissertation, a new sub-1-V CMOS bandgap reference and curvature-compensation technique for CMOS bandgap reference circuit with sub-1-V operation, the impact of gate-oxide reliability on CMOS analog amplifier, the impact of gate tunneling current on performances of phase locked loop, and the new gate bias voltage generating technique with threshold-voltage compensation for on-glass analog circuits in LTPS process are presented. There are seven chapters included in this dissertation. The new sub-1-V CMOS bandgap reference and curvature-compensation technique for CMOS bandgap reference circuit with sub-1-V operation are presented in Chapter 2. The new proposed CMOS bandgap reference without using low-threshold-voltage device can be operated with minimum supply voltage of 0.85 V and the temperature coefficient is 58.1 ppm/�aC from -10 �aC to 120 �aC without laser trimming. The new sub-1-V curvature-compensated CMOS bandgap reference, which utilizes the temperature-dependent currents generated from the parasitic NPN and PNP BJT devices in CMOS process, is presented. The new proposed curvature-compensation technique for CMOS bandgap reference circuit with sub-1-V operation has with has been temperature coefficient of 19.5 ppm/°C from 0 °C to 100 °C under minimum supply voltage of 0.9 V without laser trimming. In general, the VLSI productions have lifetime of 10 years, but the thin gate-oxide thickness of the MOS transistor has many problems, such as gate-oxide breakdown, tunneling current, and hot carrier effect that will degrade the lifetime of the MOS transistor. Therefore, to improve the gate-oxide reliability of MOS transistor and to investigate the effect of gate-oxide breakdown on CMOS circuit performances will become more important in the nanometer CMOS technology. In Chapter 3, the influences of gate-oxide reliability on CMOS analog amplifier are investigated with CMOS common-source amplifiers with diode-connected active load, two-stage and folded-cascade operational amplifiers in a 130-nm low-voltage CMOS process. The test conditions of this work include the dc stress, ac stress with dc offset, and large-signal transition stress under different frequencies and signals. After overstresses, the small-signal parameters, such as small-signal gain, unity-gain frequency, phase margin, and output dc voltage levels, are measured. The impact of soft and hard gate-oxide breakdowns on CMOS analog amplifiers has been analyzed and discussed. The hard breakdown has more serious impact to the CMOS analog amplifiers. The MOS switch with bootstrapped technique is widely used in low-voltage switched-capacitor circuit. The switched-capacitor circuit with the bootstrapped technique could be a dangerous design approach in the nano-scale CMOS process due to the gate-oxide transient overstress. In Chapter 4, the impact of gate-oxide transient overstress on MOS switch in switched-capacitor circuit is investigated with the sample-and-hold amplifier in a 130-nm CMOS process. After overstress on the MOS switch of SHA with open-loop configuration, the circuit performances in time domain and frequency domain are measured to verify the impact of gate-oxide reliability on circuit performances. The oxide breakdown on switch device will degrade the performance of bootstrapped switch technique. In�n nanoscale CMOS technology, the thin gate oxide causes the large gate tunneling leakage. In Chapter 5, the influence of MOS capacitor, as loop filter, with gate tunneling leakage on the circuit performances of phase locked loop (PLL) in nanoscale CMOS technology has been investigated and analyzed. The basic PLL with second-order loop filter is used to simulate the impact of gate tunneling leakage on performance degradation of PLL in a standard 90-nm CMOS process. The MOS capacitors with different oxide thicknesses are used to investigate this impact to PLL. The locked time, static phase error, and jitter of second-order PLL are degraded by the gate tunneling leakage of MOS capacitor in loop filter. Overview on the prior designs of gate tunneling leakage compensation technique to reduce the gate tunneling leakage on MOS capacitor as loop filter in PLL is provided in this work. Low-temperature poly-Si LTPS thin-film transistors (TFTs) have attracted a lot of attentions in the applications with the integrated on-panel peripheral circuits for active-matrix liquid crystal display (AMLCD) and active-matrix light emitting diodes (AMOLEDs). Recently, LTPS AMLCDs integrated with driving and control circuits on glass substrate have been realized in some portable systems, such as mobile phone, digital camera, notebook, etc. In the near future, the AMLCD fabricated in LTPS process is promising toward System-on-Panel (SoP) or System-on-Glass (SoG) applications, especially for achieving a compact, low-cost, and low-power display system. However, the poly-Si TFT device suffers from significant variation in its threshold voltage, owing to the nature of poly silicon crystal growth in LTPS process. In Chapter 6, a new proposed gate bias voltage generating technique with threshold-voltage compensation for analog circuits in the low-temperature polycrystalline silicon LTPS thin-film transistors (TFTs) is proposed. The new proposed gate bias voltage generating circuit with threshold-voltage compensation has been successfully verified in a 8-�慆 LTPS process. The experimental results have shown that the impact of TFT threshold-voltage variation on the biasing circuit can be reduced from 30% to 5% under biasing voltage of 3 V. The new proposed gate bias voltage generating technique with threshold-voltage compensation enables the analog circuits to be integrated and implemented by LTPS process on glass substrate for active matrix LCD (AMLCD) panel. In summary, several design and reliability of analog circuits in low-voltage CMOS processes are presented in this dissertation. The proposed circuits have been implemented and verified in silicon chips. The proposed CMOS bandgap reference circuits, the impact of gate-oxide reliability on CMOS analog amplifiers, and the proposed gate bias voltage generating technique are very useful for the advanced nanoscale CMOS technology and SoP application, respectively.

Dissertação de Mestrado em Design e Multimédia apresentada à Faculdade de Ciências e Tecnologia da Universidade de Coimbra
A presente dissertação da Faculdade de Ciências e Tecnologias da Universidade de Coimbra consiste na produção e concepção de L-Systems (Sistemas de Lindenmayer) através de parâmetros extraídos de músicas (usando a pauta musical de piano como ferramenta-base), como a melodia, a harmonia e o ritmo. Estas características musicais irão ser utilizadas como ferramentas de criação das regras de produção de L-Systems em conjugação com o seu alfabeto, através do processo para converter a sequência numa representação gráfica em três dimensões, utilizando a árvore como elemento da Natureza escolhido.
This dissertation at the Faculty of Sciences and Technology at the University of Coimbra consists in the production and design of L-Systems (Lindnmayer Sistems) through extracted musical parameters (using the musical piano score as the base tool), such as melody, harmony and rythm. These musical characteristics will be used as creative tools of L-Systems’s Production Rules in conjunction with its alphabet, through the process to convert the sequence in a three dimensional graphical representation, using the tree as the chosen Nature element.

Dissertation presented as the partial requirement for obtaining a Master's degree in Information Management, specialization in Information Systems and Technologies Management
Artificial intelligence became increasingly useful since the 1990s, trying to imitate the human brain with its thinking, reasoning, and learning using the key concepts of machine learning, deep learning, and artificial neural networks. Case-based reasoning (CBR), another form of artificial intelligence, stores and retrieves past cases that can be adapted to find a solution to a current problem. The new solution can then be retained and made available to solve other future problems. Business Process Management (BPM) analyzes and optimizes business processes to make them more effective and efficient for an organization’s strategy to ultimately increasing shareholder value. CBR can help to support BPM, making better decisions with existing knowledge when solving process problems. This study investigates effectively store, retrieve, and adapt Business Process Management Notation (BPMN) solutions that best fit the underlying BPM problem using case-based reasoning as a tool. Therefore, a theoretical model was proposed, containing each CBR live cycle phase with different possible tools applied to BPMN diagrams, which was validated by expert interviews. This study concludes that a whole CBR life cycle can be applied to BPMN diagram problems with the need for human intervention. This work did not have the objective to solve the whole problem but to contribute to a possible solution by using CBR through a theoretical model.

Continued improvements of transceiver systems-on-a-chip play a key role in the advancement of mobile telecommunication products as well as wireless systems in biomedical and remote sensing applications. This dissertation addresses the problems of escalating CMOS process variability and system complexity that diminish the reliability and testability of integrated systems, especially relating to the analog and mixed-signal blocks. The proposed design techniques and circuit-level attributes are aligned with current built-in testing and self-calibration trends for integrated transceivers. In this work, the main focus is on enhancing the performances of analog and mixed-signal blocks with digitally adjustable elements as well as with automatic analog tuning circuits, which are experimentally applied to conventional blocks in the receiver path in order to demonstrate the concepts. The use of digitally controllable elements to compensate for variations is exemplified with two circuits. First, a distortion cancellation method for baseband operational transconductance amplifiers is proposed that enables a third-order intermodulation (IM3) improvement of up to 22dB. Fabricated in a 0.13µm CMOS process with 1.2V supply, a transconductance-capacitor lowpass filter with the linearized amplifiers has a measured IM3 below -70dB (with 0.2V peak-to-peak input signal) and 54.5dB dynamic range over its 195MHz bandwidth. The second circuit is a 3-bit two-step quantizer with adjustable reference levels, which was designed and fabricated in 0.18µm CMOS technology as part of a continuous-time SigmaDelta analog-to-digital converter system. With 5mV resolution at a 400MHz sampling frequency, the quantizer's static power dissipation is 24mW and its die area is 0.4mm^2. An alternative to electrical power detectors is introduced by outlining a strategy for built-in testing of analog circuits with on-chip temperature sensors. Comparisons of an amplifier's measurement results at 1GHz with the measured DC voltage output of an on-chip temperature sensor show that the amplifier's power dissipation can be monitored and its 1-dB compression point can be estimated with less than 1dB error. The sensor has a tunable sensitivity up to 200mV/mW, a power detection range measured up to 16mW, and it occupies a die area of 0.012mm^2 in standard 0.18µm CMOS technology. Finally, an analog calibration technique is discussed to lessen the mismatch between transistors in the differential high-frequency signal path of analog CMOS circuits. The proposed methodology involves auxiliary transistors that sense the existing mismatch as part of a feedback loop for error minimization. It was assessed by performing statistical Monte Carlo simulations of a differential amplifier and a double-balanced mixer designed in CMOS technologies.

Process variability is the pivotal factor impacting the design of high yield integrated circuits and systems in deep sub-micron CMOS technologies. The electrical and physical properties of transistors and interconnects, the building blocks of integrated circuits, are prone to significant variations that directly impact the performance and power consumption of the fabricated devices, severely impacting the manufacturing yield. However, the large number of the transistors on a single chip adds even more challenges for the analysis of the variation effects, a critical task in diagnosing the cause of failure and designing for yield. Reliable and efficient statistical analysis methodologies in various design phases are key to predict the yield before entering such an expensive fabrication process. In this thesis, the impacts of process variations are examined at three different levels: device, circuit, and micro-architecture. The variation models are provided for each level of abstraction, and new methodologies are proposed for efficient statistical analysis and design under variation. At the circuit level, the variability analysis of three crucial sub-blocks of today's system-on-chips, namely, digital circuits, memory cells, and analog blocks, are targeted. The accurate and efficient yield analysis of circuits is recognized as an extremely challenging task within the electronic design automation community. The large scale of the digital circuits, the extremely high yield requirement for memory cells, and the time-consuming analog circuit simulation are major concerns in the development of any statistical analysis technique. In this thesis, several sampling-based methods have been proposed for these three types of circuits to significantly improve the run-time of the traditional Monte Carlo method, without compromising accuracy. The proposed sampling-based yield analysis methods benefit from the very appealing feature of the MC method, that is, the capability to consider any complex circuit model. However, through the use and engineering of advanced variance reduction and sampling methods, ultra-fast yield estimation solutions are provided for different types of VLSI circuits. Such methods include control variate, importance sampling, correlation-controlled Latin Hypercube Sampling, and Quasi Monte Carlo. At the device level, a methodology is proposed which introduces a variation-aware design perspective for designing MOS devices in aggressively scaled geometries. The method introduces a yield measure at the device level which targets the saturation and leakage currents of an MOS transistor. A statistical method is developed to optimize the advanced doping profiles and geometry features of a device for achieving a maximum device-level yield. Finally, a statistical thermal analysis framework is proposed. It accounts for the process and thermal variations simultaneously, at the micro-architectural level. The analyzer is developed, based on the fact that the process variations lead to uncertain leakage power sources, so that the thermal profile, itself, would have a probabilistic nature. Therefore, by a co-process-thermal-leakage analysis, a more reliable full-chip statistical leakage power yield is calculated.

In dieser Dissertationsschrift wird ein Design-Science-Ansatz unternommen zur Analyse der IT-Unterstützung mobiler Gesundheitsdienstleister. Dabei wurde für das Forschungsfeld E-Health bzw. M-Health an der Schnittstelle von Gesundheits- und Wirtschaftsinformatik ein Ausbau der Prozessorientierung untersucht. Daraus resultierten basierend auf einer Analogie zum technischen Außendienst in sechs wissenschaftlichen Erst- und Koautorenschaften des Verfassers (siehe Tabelle 3 sowie Literaturverzeichnis für bibliographische Details) Artefakte und Gestaltungswissen. Mit deren Hilfe können komplexe Versorgungsabläufe als Hilfestellung für Rettungs- oder ambulante Pflegekräfte IT-gestützt auf modernen tragbaren Endgeräten, wie Smartphones mit Touchscreen, zur Verfügung gestellt werden, unter anderem zum Ausbau evidenzbasierten Handelns. Die Resultate werden weiterhin in einem Ordnungsrahmen für Gestaltungswissen lokalisiert, so dass diesbezügliche Erkenntnisse auch andernorts leicht wiederverwendet werden können. Bisherige Evaluationen des Konzepts und eines bereits vorliegenden Prototyps, insbesondere mit Anwenderzielgruppen, erbrachten positive Resultate bzw. Rückmeldungen hinsichtlich der Akzeptanz, so dass dieser für eine praktische Implementierung weiter vorbereitet werden kann.