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Journal articles on the topic 'Analog VLSI'

Author: Grafiati
Published: 4 June 2021
Last updated: 11 February 2022

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1

Loeliger, H. A., F. Tarkoy, F. Lustenberger, and M. Helfenstein. "Decoding in analog VLSI." IEEE Communications Magazine 37, no. 4 (April 1999): 99–101. http://dx.doi.org/10.1109/35.755457.

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2

Bartolozzi, Chiara, and Giacomo Indiveri. "Synaptic Dynamics in Analog VLSI." Neural Computation 19, no. 10 (October 2007): 2581–603. http://dx.doi.org/10.1162/neco.2007.19.10.2581.

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Synapses are crucial elements for computation and information transfer in both real and artificial neural systems. Recent experimental findings and theoretical models of pulse-based neural networks suggest that synaptic dynamics can play a crucial role for learning neural codes and encoding spatiotemporal spike patterns. Within the context of hardware implementations of pulse-based neural networks, several analog VLSI circuits modeling synaptic functionality have been proposed. We present an overview of previously proposed circuits and describe a novel analog VLSI synaptic circuit suitable for integration in large VLSI spike-based neural systems. The circuit proposed is based on a computational model that fits the real postsynaptic currents with exponentials. We present experimental data showing how the circuit exhibits realistic dynamics and show how it can be connected to additional modules for implementing a wide range of synaptic properties.
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3

Picton, P. D. "Adaptive analog VLSI neural systems." Microelectronics Journal 28, no. 1 (January 1997): 103–4. http://dx.doi.org/10.1016/s0026-2692(97)87856-1.

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4

Copeland, M. A. "VLSI for analog/digital communications." IEEE Communications Magazine 29, no. 5 (May 1991): 25–30. http://dx.doi.org/10.1109/35.79380.

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5

Liu, Weimin, Andreas G. Andreou, and Moise H. Goldstein. "Speech preprocessing using analog VLSI." Journal of the Acoustical Society of America 87, S1 (May 1990): S109. http://dx.doi.org/10.1121/1.2027825.

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6

Sasaki, Mamoru, and Hirokuni Fujiyama. "An analog VLSI for analog-to-binary image conversion." Electronics and Communications in Japan (Part III: Fundamental Electronic Science) 84, no. 4 (2000): 11–20. http://dx.doi.org/10.1002/1520-6440(200104)84:4<11::aid-ecjc2>3.0.co;2-n.

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7

Stan, Mircea R., Wayne P. Burleson, Christopher I. Connolly, and Roderic A. Grupen. "Analog VLSI for robot path planning." Analog Integrated Circuits and Signal Processing 6, no. 1 (July 1994): 61–73. http://dx.doi.org/10.1007/bf01250736.

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8

Hodge, A. M., and R. W. Newcomb. "Semistate theory and analog VLSI design." IEEE Circuits and Systems Magazine 2, no. 2 (2002): 30–51. http://dx.doi.org/10.1109/mcas.2002.1045856.

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9

Stojcev, Mile. "Analog Design for CMOS VLSI Systems." Microelectronics Journal 34, no. 2 (February 2003): 161. http://dx.doi.org/10.1016/s0026-2692(02)00072-1.

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10

Mead, C. A., X. Arreguit, and J. Lazzaro. "Analog VLSI model of binaural hearing." IEEE Transactions on Neural Networks 2, no. 2 (March 1991): 230–36. http://dx.doi.org/10.1109/72.80333.

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11

Krammer, J., and C. Koch. "Pulse-based analog VLSI velocity sensors." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 44, no. 2 (1997): 86–101. http://dx.doi.org/10.1109/82.554431.

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12

Chieh-Yuan Chao, Hung-Jen Lin, and L. Miler. "Optimal testing of VLSI analog circuits." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 16, no. 1 (1997): 58–77. http://dx.doi.org/10.1109/43.559332.

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13

Carota, Luciana. "Dynamics of VLSI analog decoupled neurons." Neurocomputing 82 (April 2012): 234–37. http://dx.doi.org/10.1016/j.neucom.2011.11.011.

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14

Wu, P. "Analog VLSI Design Automation [Book Review]." IEEE Circuits and Devices Magazine 21, no. 3 (May 2005): 53–54. http://dx.doi.org/10.1109/mcd.2005.1438816.

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15

Chong, C. P., C. A. T. Salama, and K. C. Smith. "Image-motion detection using analog VLSI." IEEE Journal of Solid-State Circuits 27, no. 1 (1992): 93–96. http://dx.doi.org/10.1109/4.109560.

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16

Zarabadi, S. R., M. Ismail, and Chung-Chih Hung. "High performance analog VLSI computational circuits." IEEE Journal of Solid-State Circuits 33, no. 4 (April 1998): 644–49. http://dx.doi.org/10.1109/4.663572.

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17

Stan, Mircea R., Wayne P. Burleson, Christopher I. Connolly, and Roderic A. Grupen. "Analog VLSI for robot path planning." Journal of VLSI signal processing systems for signal, image and video technology 8, no. 1 (February 1994): 61–73. http://dx.doi.org/10.1007/bf02407111.

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18

Kumar, K. R. Lakshmi, R. A. Hadaway, M. A. Copeland, and M. I. H. King. "A precision design technique for analog very large scale integration." Canadian Journal of Physics 63, no. 6 (June 1, 1985): 702–6. http://dx.doi.org/10.1139/p85-109.

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A study of the matching characteristics of components available in a CMOS VLSI technology is reported. This examination has been extended to produce a design methodology for precision analog functions in VLSI by choosing a digital-to-analog converter as an example. The major emphasis of the paper will be on the device and technological aspects of the design approach.
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19

Grundy, D. L. "A computational approach to VLSI analog design." Analog Integrated Circuits and Signal Processing 6, no. 1 (July 1994): 53–60. http://dx.doi.org/10.1007/bf01250735.

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20

McCarley, Chris. "VLSI ‘HyperNeuron’ for recognition of analog patterns." Signal Processing 65, no. 1 (February 1998): 143–46. http://dx.doi.org/10.1016/s0165-1684(98)00028-0.

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21

Loeliger, H. A., F. Lustenberger, M. Helfenstein, and F. Tarkoy. "Probability propagation and decoding in analog VLSI." IEEE Transactions on Information Theory 47, no. 2 (2001): 837–43. http://dx.doi.org/10.1109/18.910594.

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22

Sitte, Joaquin, Tim Körner, and Ulrich Rückert. "Local cluster neural net analog VLSI design." Neurocomputing 19, no. 1-3 (April 1998): 185–97. http://dx.doi.org/10.1016/s0925-2312(97)00064-7.

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23

Raut, R. "Wideband CMOS transconductor for analog VLSI systems." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 43, no. 11 (1996): 775–76. http://dx.doi.org/10.1109/82.544030.

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24

Boon Poh Tan and D. M. Wilson. "Semiparallel rank order filtering in analog VLSI." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 48, no. 2 (2001): 198–205. http://dx.doi.org/10.1109/82.917791.

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25

Chakrabartty, Shantanu, and Gert Cauwenberghs. "Sub-Microwatt Analog VLSI Trainable Pattern Classifier." IEEE Journal of Solid-State Circuits 42, no. 5 (May 2007): 1169–79. http://dx.doi.org/10.1109/jssc.2007.894803.

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26

Cowan, G. E. R., R. C. Melville, and Y. P. Tsividis. "A VLSI Analog Computer/Digital Computer Accelerator." IEEE Journal of Solid-State Circuits 41, no. 1 (January 2006): 42–53. http://dx.doi.org/10.1109/jssc.2005.858618.

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27

Hudson, T. A., J. A. Bragg, P. Hasler, and S. P. DeWeerth. "An analog vlsi model of muscular contraction." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 50, no. 7 (July 2003): 329–42. http://dx.doi.org/10.1109/tcsii.2003.813593.

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28

Maher, M. A. C., S. P. Deweerth, M. A. Mahowald, and C. A. Mead. "Implementing neural architectures using analog VLSI circuits." IEEE Transactions on Circuits and Systems 36, no. 5 (May 1989): 643–52. http://dx.doi.org/10.1109/31.31311.

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29

Indiveri, G., J. Kramer, and C. Koch. "System implementations of analog VLSI velocity sensors." IEEE Micro 16, no. 5 (1996): 40–49. http://dx.doi.org/10.1109/40.540079.

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30

Gupta, B., R. Goodman, Fukang Jiang, Yu-Chong Tai, S. Tung, and Chih-Ming Ho. "Analog VLSI system for active drag reduction." IEEE Micro 16, no. 5 (1996): 53–59. http://dx.doi.org/10.1109/40.540081.

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31

Hatfield, J. "Book Review: Analog VLSI and Neural Systems." International Journal of Electrical Engineering Education 28, no. 1 (January 1991): 93–94. http://dx.doi.org/10.1177/002072099102800120.

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32

Grundy, D. L. "A computational approach to VLSI analog design." Journal of VLSI signal processing systems for signal, image and video technology 8, no. 1 (February 1994): 53–60. http://dx.doi.org/10.1007/bf02407110.

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33

Jabri, Marwan, and Barry Flower. "Weight Perturbation: An Optimal Architecture and Learning Technique for Analog VLSI Feedforward and Recurrent Multilayer Networks." Neural Computation 3, no. 4 (December 1991): 546–65. http://dx.doi.org/10.1162/neco.1991.3.4.546.

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Previous work on analog VLSI implementation of multilayer perceptrons with on-chip learning has mainly targeted the implementation of algorithms like backpropagation. Although backpropagation is efficient, its implementation in analog VLSI requires excessive computational hardware. In this paper we show that, for analog parallel implementations, the use of gradient descent with direct approximation of the gradient using “weight perturbation” instead of backpropagation significantly reduces hardware complexity. Gradient descent by weight perturbation eliminates the need for derivative and bidirectional circuits for on-chip learning, and access to the output states of neurons in hidden layers for off-chip learning. We also show that weight perturbation can be used to implement recurrent networks. A discrete level analog implementation showing the training of an XOR network as an example is described.
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34

Dhare, Vaishali, and Usha Mehta. "SAF Analyses of Analog and Mixed Signal VLSI Circuit : Digital to Analog Converter." International Journal of VLSI Design & Communication Systems 6, no. 3 (June 30, 2015): 49–58. http://dx.doi.org/10.5121/vlsic.2015.6305.

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35

Vittoz, Eric A. "Analog VLSI signal processing: Why, where, and how?" Analog Integrated Circuits and Signal Processing 6, no. 1 (July 1994): 27–44. http://dx.doi.org/10.1007/bf01250733.

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36

Koch, Christof. "Seeing Chips: Analog VLSI Circuits for Computer Vision." Neural Computation 1, no. 2 (June 1989): 184–200. http://dx.doi.org/10.1162/neco.1989.1.2.184.

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Vision is simple. We open our eyes and, instantly, the world surrounding us is perceived in all its splendor. Yet Artificial Intelligence has been trying with very limited success for over 20 years to endow machines with similar abilities. A large van, filled with computers and driving unguided at a mile per hour across gently sloping hills in Colorado and using a laser-range system to “see” is the most we have accomplished so far. On the other hand, computers can play a decent game of chess or prove simple mathematical theorems. It is ironic that we are unable to reproduce perceptual abilities which we share with most animals while some of the features distinguishing us from even our closest cousins, chimpanzees, can be carried out by machines. Vision is difficult.
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37

Kwok Fai Hui and B. E. Shi. "Distortion in analog VLSI networks for image filtering." IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 46, no. 10 (1999): 1161–71. http://dx.doi.org/10.1109/81.795829.

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38

Cauwenberghs, G., and A. Yariv. "Fault-tolerant dynamic multilevel storage in analog VLSI." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 41, no. 12 (1994): 827–29. http://dx.doi.org/10.1109/82.338627.

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39

Abdalla, H., and T. K. Horiuchi. "An analog VLSI low-power envelope periodicity detector." IEEE Transactions on Circuits and Systems I: Regular Papers 52, no. 9 (September 2005): 1709–20. http://dx.doi.org/10.1109/tcsi.2005.852203.

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40

Koosh, V. F., and R. M. Goodman. "Analog VLSI neural network with digital perturbative learning." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 49, no. 5 (May 2002): 359–68. http://dx.doi.org/10.1109/tcsii.2002.802282.

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41

Dominguez-Castro, R., A. Rodriguez-Vazquez, J. L. Huertas, and E. Sanchez-Sinencio. "Analog neural programmable optimizers in CMOS VLSI technologies." IEEE Journal of Solid-State Circuits 27, no. 7 (July 1992): 1110–15. http://dx.doi.org/10.1109/4.142611.

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42

Mortara, A., E. A. Vittoz, and P. Venier. "A communication scheme for analog VLSI perceptive systems." IEEE Journal of Solid-State Circuits 30, no. 6 (June 1995): 660–69. http://dx.doi.org/10.1109/4.387069.

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43

Al-Azab, Mohamed. "WIDEBAND ANALOG VLSI IMPLEMENTATION OF ARTIFICIAL NEURAL NETWORKS." JES. Journal of Engineering Sciences 36, no. 2 (March 1, 2008): 435–42. http://dx.doi.org/10.21608/jesaun.2008.116002.

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44

Foo, S. Y., L. R. Anderson, and Y. Takefuji. "Analog components for the VLSI of neural networks." IEEE Circuits and Devices Magazine 6, no. 4 (July 1990): 18–26. http://dx.doi.org/10.1109/101.59426.

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45

Brauch, J., S. M. Tam, M. A. Holler, and A. L. Shmurun. "Analog VLSI neural networks for impact signal processing." IEEE Micro 12, no. 6 (December 1992): 34–45. http://dx.doi.org/10.1109/40.180245.

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46

Luo, J., C. Koch, and B. Mathur. "Figure-ground segregation using an analog VLSI chip." IEEE Micro 12, no. 6 (December 1992): 46–57. http://dx.doi.org/10.1109/40.180246.

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47

Verleysen, M., and P. G. A. Jespers. "An analog VLSI implementation of Hopfield's neural network." IEEE Micro 9, no. 6 (December 1989): 46–55. http://dx.doi.org/10.1109/40.42986.

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48

Hatfield, John. "Book Review: Analog VLSI Design — nMOS and CMOS." International Journal of Electrical Engineering & Education 26, no. 1-2 (January 1989): 186. http://dx.doi.org/10.1177/002072098902600132.

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49

NAKADA, KAZUKI, TETSUYA ASAI, and HATSUO HAYASHI. "ANALOG VLSI IMPLEMENTATION OF RESONATE-AND-FIRE NEURON." International Journal of Neural Systems 16, no. 06 (December 2006): 445–56. http://dx.doi.org/10.1142/s0129065706000846.

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We propose an analog integrated circuit that implements a resonate-and-fire neuron (RFN) model based on the Lotka-Volterra (LV) system. The RFN model is a spiking neuron model that has second-order membrane dynamics, and thus exhibits fast damped subthreshold oscillation, resulting in the coincidence detection, frequency preference, and post-inhibitory rebound. The RFN circuit has been derived from the LV system to mimic such dynamical behavior of the RFN model. Through circuit simulations, we demonstrate that the RFN circuit can act as a coincidence detector and a band-pass filter at circuit level even in the presence of additive white noise and background random activity. These results show that our circuit is expected to be useful for very large-scale integration (VLSI) implementation of functional spiking neural networks.
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50

Hyogo, Akira. "Special Issue on 2009 International Analog VLSI Workshop." IEEJ Transactions on Electrical and Electronic Engineering 5, no. 1 (January 2010): 124. http://dx.doi.org/10.1002/tee.20505.

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