Journal articles on the topic 'Analog electronics and interfaces'
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Ohme, Bruce W., and Mark R. Larson. "Analog Component Development for 300°C Sensor Interface Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, HITEC (January 1, 2012): 000199–206. http://dx.doi.org/10.4071/hitec-2012-wp11.
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The development of Enhanced Geothermal Systems (EGS) for base-load electrical power generation will require electronics for sensing and control during exploration and drilling and also during production. The operating temperature environments for these applications will generally be more extreme than those encountered by electronics currently deployed for oil and gas development and production monitoring. To address this requirement, electronic components have been designed and fabricated for operation at temperatures of 300°C. These integrated circuits use silicon-on-insulator (SOI) fabrication processes to achieve high temperature operation. High-fidelity simulation models have been developed by characterization of SOI devices at 300°C. These device models were employed to design components required for the development of a down-hole orientation module. A wide-bandwidth, low-noise operational amplifier has been developed for use with MEMS accelerometer sensors. A multi-channel synchronous voltage-to-frequency converter with built-in reference and oscillators has also been developed for use with 3-axis flux-gate magnetometers. The components themselves are general purpose and could easily be used for other high-temperature sensor-interface applications. .
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Kim, Bruce, Anurag Gupta, and Mitchell Spryn. "Wireless Sensor Platform for Nanosensor Interface Electronics." International Symposium on Microelectronics 2020, no. 1 (September 1, 2020): 000090–93. http://dx.doi.org/10.4071/2380-4505-2020.1.000090.
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Abstract In this paper, we describe a low-cost modular sensing system that can be used to interface with nanosensors. We used nanosensors to detect CO2 gas. In addition, the system can be easily modified to incorporate multiple analog and digital sensors, decreasing the amount of effort needed to integrate multiple sensors.
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Purcaru, Dorina, Cornelia Gordan, Romulus Reiz, and Anca Purcaru. "PC104 Interface Recommended for High Speed Data Acquisition Systems." Applied Mechanics and Materials 325-326 (June 2013): 926–29. http://dx.doi.org/10.4028/www.scientific.net/amm.325-326.926.
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The interface presented in this paper is recommended for high speed data acquisition systems; it performs a synchronized sampling of all common-mode or differential analog inputs with a high sampling rate. This is a low cost interface, entirely controlled by the PC104 CPU. Programmable electronic modules that contain such PC104 interfaces can be found running in the energetic system from Romania; these dedicated equipments perform the analog and digital signal acquisition for monitoring and recording different specific transient events. Some experimental results obtained using the disturbance monitoring device PC-08/104 are also presented in this paper.
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Zhang, Chi, Zhao Hui Ye, and Yong Ming Zhou. "Wireless CNC Motion Controller Designed with PSoC." Advanced Materials Research 898 (February 2014): 944–51. http://dx.doi.org/10.4028/www.scientific.net/amr.898.944.
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Numerical control (NC) technology is a kind of technology combined with electronics, machinery manufacturing, and other interdisciplinary combination of technologies. It is an important part of modern manufacturing. Currently, NC technology is developing towards the open CNC system with extensibility and interchangeability, while the modern electronic technology is developing towards the programmable technology and SoC (System-on-Chip) technology. However, current CNC controller designed with SoC is still in the research stage and not practical yet. In this paper, a practical CNC motion controller is built with modern PSoC (Programmable System-on-Chip) with wireless Ethernet interface. This controller has a high-performance microprocessor, numbers of free configurable analog and digital devices and IO (input/output) interfaces, and many kinds of communication interfaces. Therefore, it has good real-time control functions and communication functions. Experiments for controlling a three joint-axis engraving machine show that the controller can achieve high performance of parallel control of the three joint-axis linear interpolation and two joint-axis circular interpolation, and high performance of the trapezoidal and S-shape speed control. In addition, in order to reduce the impact to the motor and increase the system efficiency, a kind of look-ahead algorithm for velocity control with low time cost is used.
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Stoecklin, Sebastian, Elias Rosch, Adnan Yousaf, and Leonhard Reindl. "Very High Bit Rate Near-Field Communication with Low-Interference Coils and Digital Single-Bit Sampling Transceivers for Biomedical Sensor Systems." Sensors 20, no. 21 (October 23, 2020): 6025. http://dx.doi.org/10.3390/s20216025.
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The evolution of microelectronics increased the information acquired by today’s biomedical sensor systems to an extent where the capacity of low-power communication interfaces becomes one of the central bottlenecks. Hence, this paper mathematically analyzes and experimentally verifies novel coil and transceiver topologies for near-field communication interfaces, which simultaneously allow for high data transfer rates, low power consumption, and reduced interference to nearby wireless power transfer interfaces. Data coil design is focused on presenting two particular topologies which provide sufficient coupling between a reader and a wireless sensor system, but do not couple to an energy coil situated on the same substrate, severely reducing interference between wireless data and energy transfer interfaces. A novel transceiver design combines the approaches of a minimalistic analog front-end with a fully digital single-bit sampling demodulator, in which rectangular binary signals are processed by simple digital circuits instead of sinusoidal signals being conditioned by complex analog mixers and subsequent multi-bit analog-to-digital converters. The concepts are implemented using an analog interface in discrete circuit technology and a commercial low-power field-programmable gate array, yielding a transceiver which supports data rates of up to 6.78 MBit/s with an energy consumption of just 646 pJ/bit in transmitting mode and of 364 pJ/bit in receiving mode at a bit error rate of 2×10−7, being 10 times more energy efficient than any commercial NFC interface and fully implementable without any custom CMOS technology.
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SCHAMBACH, J., G. HOFFMANN, K. KAJIMOTO, L. BRIDGES, G. EPPLEY, J. LIU, B. LLOPE, T. NUSSBAUM, and C. MESA. "STAR TIME OF FLIGHT READOUT ELECTRONICS, DAQ, AND COSMIC RAY TEST STAND." International Journal of Modern Physics E 16, no. 07n08 (August 2007): 2496–502. http://dx.doi.org/10.1142/s021830130700815x.
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The new Time-of-Flight (TOF) subsystem for STAR at RHIC will have 3840 6-pad Multigap Resistive Plate Chambers (MRPC) distributed over 120 trays. Each tray contains 192 channels and three types of electronics cards: “TINO”, “TDIG” and “TCPU”. Every 30 trays send data to a “THUB” card that interfaces to STAR trigger and transmits data over fiber to a STAR DAQ fiber receiver. TINO contains analog front end electronics based on the CERN/LAA NINO custom IC. TDIG digitizes the data using the CERN HPTDC ASIC. TCPU formats and buffers the digital information. A cosmic ray test system comprised of three plastic scintillators, 4 MRPC modules, and TOF prototype electronics is used to determine the timing resolution to be achieved for the entire TOF system. Overall timing resolution of 80 – 110 ps has been achieved.
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Galkin, Y. D., O. V. Dvornikov, V. A. Tchekhovski, and N. N. Prokopenko. "Experimental studies and a double gate JFET model for analog integrated circuits." Doklady BGUIR 19, no. 7 (November 25, 2021): 5–12. http://dx.doi.org/10.35596/1729-7648-2021-19-7-5-12.
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One of directions of improving parameters of analog integrated circuits is a development of new and modernization of existing designs of integrated elements without significantly changing of a technological route of integrated circuit manufacturing with a simultaneous creation of new integrated elements models. The article considers the results of experimental studies of the double gate junction field-effect transistor manufactured according to the 3CBiT technological route of JSC Integral. Based on the obtained results, the electrical model of double gate junction field-effect transistor is proposed, which describes the features of its application in analog integrated circuits. Comparison of I-V characteristics of measurements results and created model simulation are presented. A small capacity and a reverse current of a double gate junction field-effect transistor top gate, an ability to compensate for the DC (direct current) component of an input current provide a significant improvement in the characteristics of analog integrated circuits such as electrometric operational amplifiers and charge-sensitive amplifiers. The developed double gate junction field-effect transistor can be used in signal readout devices required in the analog interfaces of space instrument sensors and nuclear electronics.
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Alexandrov, Peter, Xueqing Li, Matt O'Grady, and John Hostetler. "Analog and Logic High Temperature Integrated Circuits based on SiC JFETs." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000061–65. http://dx.doi.org/10.4071/hitec-tp12.
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Harsh environment applications such as electrical actuation on military and commercial aircraft, advanced engine controls, downhole energy exploration, propulsion systems of hybrid and all electric vehicles, and space exploration require sensor interfaces, control circuits, and power systems with electronics capable of operating at high temperatures. Wide band-gap materials such as SiC can be used to build devices with high operating temperatures due to their fundamental material properties. This paper presents initial results on developing basic analog and logic integrated circuits based on SiC JFET technology. Analog and logic integrated circuits were built using enhancement vertical channel lateral JFET transistors, metal film resistors and lateral p-n diodes. The analog circuits built include different types of operational amplifiers. The logic circuits include NOT, NAND, AND, NOR and OR gates. Transistors and integrated circuits were packaged in ceramic DIP packages and tested at temperatures up to 500 °C. The tested JFETs show proper operation up to the maximum tested temperature of 500 °C. The operational amplifiers remained functional at temperatures up to 430 °C. Basic logic circuits showed proper operation up to the maximum tested temperature of 500 °C.
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Massie, David R., and Stephen R. Delwiche. "Upgrading a High Performance Spectrophotometer." Journal of Near Infrared Spectroscopy 4, no. 1 (January 1996): 39–46. http://dx.doi.org/10.1255/jnirs.74.
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A spectrophotometer system was updated with a new computer and control circuitry to measure qualitative and quantitative characteristics of agricultural products between the ultraviolet and near infrared (NIR) regions of the electromagnetic spectrum. This single beam instrument, along with its computer, has a wavelength repeatability of 0.005 nm. This performance is required for proper system response compensation in a single beam system. Analog electronics are kept to a minimum by early conversion of the signal with a 10-μs 16-bit analog-to-digital (A/D) converter. A fast response real-time computer is required to service the A/D, wavelength drive and optical chopper. Herein, the development and selection of computer interfaces, data collection techniques and performance characteristics of this laboratory spectrophotometer system are described. The system is regularly used as the development tool in investigating new measurement techniques on agricultural products. It is also used to evaluate optical filters and other spectrophotometric systems.
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Dendouga, Abdelghani, Slimane Oussalah, Damien Thienpont, and Abdenour Lounis. "Multiobjective Genetic Algorithms Program for the Optimization of an OTA for Front-End Electronics." Advances in Electrical Engineering 2014 (August 13, 2014): 1–5. http://dx.doi.org/10.1155/2014/374741.
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The design of an interface to a specific sensor induces costs and design time mainly related to the analog part. So to reduce these costs, it should have been standardized like digital electronics. The aim of the present work is the elaboration of a method based on multiobjectives genetic algorithms (MOGAs) to allow automated synthesis of analog and mixed systems. This proposed methodology is used to find the optimal dimensional transistor parameters (length and width) in order to obtain operational amplifier performances for analog and mixed CMOS-(complementary metal oxide semiconductor-) based circuit applications. Six performances are considered in this study, direct current (DC) gain, unity-gain bandwidth (GBW), phase margin (PM), power consumption (P), area (A), and slew rate (SR). We used the Matlab optimization toolbox to implement the program. Also, by using variables obtained from genetic algorithms, the operational transconductance amplifier (OTA) is simulated by using Cadence Virtuoso Spectre circuit simulator in standard TSMC (Taiwan Semiconductor Manufacturing Company) RF 0.18 μm CMOS technology. A good agreement is observed between the program optimization and electric simulation.
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Ohme, Bruce W., Mark R. Larson, Bhal Tulpule, and Alireza Behbahani. "Characterization of Circuit Blocks for Configurable Analog-Front-End." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000146–53. http://dx.doi.org/10.4071/hitec-wa13.
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Analog functions have been implemented in a Silicon-on-Insulator (SOI) process optimized for high-temperature (>225°C) operation. These include a linear regulator/reference block that supports input voltages up to 50V and provides multiple independent voltage outputs. Additional blocks provide configurable sensor excitation levels of up to 10V DC and/or 20V AC-differential, with current limiting and monitoring. A dual-channel Programmable-Gain-Instrumentation Amplifier (PGIA) and a high-level AC input block with programmable gain and offset serve signal conditioning, gain, and scaling needs. A multiplexer and analog buffer provide an output that is scaled and centered for down-stream A-to-D conversion. Limited component availability and high component counts deter development of sensing and control electronics for extreme temperature (>200°) applications. Systems require front-end power conditioning, sensor excitation and monitoring, response amplification, scaling, and multiplexing. Back-end Analog-to-Digital conversion and digital processing/control can be implemented using one or two integrated circuit chips, whereas the front-end functions require component counts in the dozens. The low level of integration in the available portfolio of SOI devices results in high component count when constructing signal conditioning interfaces for aerospace sensors. These include quasi-DC sensors such as thermo-couples, strain-gauges, bridge transducers as well as AC-coupled sensors and position transducers, such as Linear Variable Differential Transducers (LVDT's). Furthermore, a majority of sensor applications are best served by excitation/response voltage ranges that typically exceed the voltage range of digital electronics (either 5V or 3.3V in currently available digital IC's for use above 200°C). These constraints led Embedded Systems LLC to design a generic device which was implemented by Honeywell as an analog ASIC (Application Specific Integrated Circuit). This paper will describe the ASIC block-level capabilities in the context of the typical applications and present characterization data from wafer-level testing at the target temperature range (225C). This material is based upon work performed by Honeywell International under a subcontract from Embedded Systems LLC, funding for which was provided by the U.S. Air Force Small Business Innovative Research program.
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Hasler, P., P. D. Smith, D. Graham, R. Ellis, and D. V. Anderson. "Analog floating-gate, on-chip auditory sensing system interfaces." IEEE Sensors Journal 5, no. 5 (October 2005): 1027–34. http://dx.doi.org/10.1109/jsen.2005.854488.
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López, Alberto, Francisco Ferrero, José Ramón Villar, and Octavian Postolache. "High-Performance Analog Front-End (AFE) for EOG Systems." Electronics 9, no. 6 (June 11, 2020): 970. http://dx.doi.org/10.3390/electronics9060970.
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Electrooculography is a technique for measuring the corneo-retinal standing potential of the human eye. The resulting signal is called the electrooculogram (EOG). The primary applications are in ophthalmological diagnosis and in recording eye movements to develop simple human–machine interfaces (HCI). The electronic circuits for EOG signal conditioning are well known in the field of electronic instrumentation; however, the specific characteristics of the EOG signal make a careful electronic design necessary. This work is devoted to presenting the most important issues related to the design of an EOG analog front-end (AFE). In this respect, it is essential to analyze the possible sources of noise, interference, and motion artifacts and how to minimize their effects. Considering these issues, the complete design of an AFE for EOG systems is reported in this work.
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Dvornikov, O. V., V. L. Dyatlov, N. N. Prokopenko, and V. A. Chekhovskii. "Configurable structured array for fabrication of radiation-hardened analog interfaces." Journal of Communications Technology and Electronics 62, no. 10 (October 2017): 1193–99. http://dx.doi.org/10.1134/s1064226917090078.
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Suparmin, Yuliarman Saragih, Patia Welly Sirait, Puji Waluyo, and Suroyo. "PERANCANGAN SISTEM KENDALI OTOMATIS SMART HOME BERBASIS ANDROID MENGGUNAKAN TEKNOLOGI WIFI (ESP32) DAN ARDUINO UNO." Jurnal Teknovasi 9, no. 02 (October 1, 2020): 45–54. http://dx.doi.org/10.55445/jt.v9i02.43.
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The rapid development of technology and the high level of human innovation have led to the emergence of sophisticated technology products, one of which is Arduino, a microcontroller system that has been integrated with various electronic modules and using C ++ programming language, automatic smarthome control system, is one of the technological advancements in the field mechanics and electronics both digital and analog, by integrating smartphones as a remote to turn on and turn off certain electrical equipment by using Arduino as main control, and Esp 32 as a link between smartphone and Arduino using wifi technology, and smarthome remote application as a user interface media to give orders through smartphones that will be executed by Arduino and then relays that will execute electrical equipment installed at home.
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Sembodo, Budi Prijo. "Ampere Meter DC Menggunakan ADC 0804 Sebagai Interface Pada Central Processing Unit (CPU) Komputer." WAKTU: Jurnal Teknik UNIPA 9, no. 1 (January 15, 2011): 8–15. http://dx.doi.org/10.36456/waktu.v9i1.898.
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World Science and Technology especially at for computer have giving many amenity all area because it’s operation very practical, efficient and easily. In this research of the peripheral of computer used as by media depicting the level of value measurement of direct current from an external electronics network which interfaced to computer pass to port of parallel. Expected with ampere meter of dc use ADC 0804 as interface at central processing unit (CPU) can assist process read of measurement value and can be used also by other consumer in the world of education. The method which is used in this research is descriptive research have the character of developmental, where examination of its data is compared to a standard or criterion which have been specified before when compilation of research design. The result of this research indicate that a software of Delphi version 7.0 from Borland can be used to connect between hardware and software by using components are staying in its environment. The level of comparison between ampere meter of dc use ADC 0804 as interface at central processing unit (CPU) by conventional analog ampere meter equals to 1:1. Ampere meter of dc use ADC 0804 as interface at Central Processing Unit (CPU) have comparison which is equal to conventional analog ampere meter so that ampere meter of dc use ADC 0804 as interface at Central Processing Unit (CPU) have reliable.
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Elsobky, Mourad, Yigit Mahsereci, Jürgen Keck, Harald Richter, and Joachim N. Burghartz. "Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges." Advances in Radio Science 15 (September 21, 2017): 123–30. http://dx.doi.org/10.5194/ars-15-123-2017.
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Abstract. Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.
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Soundararajan, Rajiv, and Ashok Srivastava. "A Programmable Oversampling CMOS Delta-Sigma Analog-to-Digital Converter for Low-Power Interface Electronics." Journal of Low Power Electronics 8, no. 3 (June 1, 2012): 336–46. http://dx.doi.org/10.1166/jolpe.2012.1197.
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Sukma, Fanni, Dwiny Meidelfi, Ronal Hadi, and Heru Samudera. "PENGENDALIAN PERANGKAT ELEKTRONIK BERBASIS MIKROKONTROLLER DENGAN ANDROID." Jurnal Ilmiah Poli Rekayasa 16, no. 2 (May 1, 2021): 101. http://dx.doi.org/10.30630/jipr.16.2.196.
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The very rapid development of technology and the high level of human innovation have made the emergence of increasingly sophisticated technological products, one of which is the MCU node, a microcontroller system that has been integrated with various electronic modules and by using the C++ programming language, the automatic smart home control system, is one of the technological advances in the field of mechanics and electronics, both digital and analog, by integrating a smartphone as a remote to turn on and turn off certain electrical equipment using the MCU node as the main control and a link between smartphones. Remote application smart home as a media user interface for giving commands via the smartphone which will be executed by the MCU node and then the relay which will execute the electrical equipment installed at home
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Lakshminarayana, Shanthala, Younghun Park, Hyusim Park, and Sungyong Jung. "High Density Resistive Array Readout System for Wearable Electronics." Sensors 22, no. 5 (February 27, 2022): 1878. http://dx.doi.org/10.3390/s22051878.
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This work presents a wearable sensing system for high-density resistive array readout. The system comprising readout electronics for a high-density resistive sensor array and a rechargeable battery, was realized in a wristband. The analyzed data with the proposed system can be visualized using a custom graphical user interface (GUI) developed in a personal computer (PC) through a universal serial bus (USB) and using an Android app in smartphones via Bluetooth Low Energy (BLE), respectively. The readout electronics were implemented on a printed circuit board (PCB) and had a compact dimension of 3 cm × 3 cm. It was designed to measure the resistive sensor with a dynamic range of 1 KΩ–1 MΩ and detect a 0.1% change of the base resistance. The system operated at a 5 V supply voltage, and the overall system power consumption was 95 mW. The readout circuit employed a resistance-to-voltage (R-V) conversion topology using a 16-bit analog-to-digital converter (ADC), integrated in the Cypress Programmable System-on-Chip (PSoC®) 5LP microcontroller. The device behaves as a universal-type sensing system that can be interfaced with a wide variety of resistive sensors, including chemiresistors, piezoresistors, and thermoelectric sensors, whose resistance variations fall in the target measurement range of 1 KΩ–1 MΩ. The system performance was tested with a 60-resistor array and showed a satisfactory accuracy, with a worst-case error rate up to 2.5%. The developed sensing system shows promising results for applications in the field of the Internet of things (IoT), point-of-care testing (PoCT), and low-cost wearable devices.
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Kim, Bruce, and Anurag Gupta. "A Zinc Oxide nanowire-based Sensing Platform for Carbon Dioxide Detection." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (January 1, 2014): 000608–31. http://dx.doi.org/10.4071/2014dpc-ta33.
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ZnO nanowires have been a focus of intense research in recent decade. The superior physical and chemical properties demonstrated by these nanostructures stem from their unique morphology and surface structures. High surface-to-volume ratio concomitant with their semiconducting yet inert nature makes them a high potential material for developing varied spectrum of devices. Specifically, their favorable surface chemistry makes them an ideal candidate for developing highly sensitive chemical gas sensor. In this work, ZnO nanowires have been utilized in array morphology to develop a sensing device and platform with back-end electronics for remotely monitoring and logging real-time carbon dioxide concentration. Vertically oriented, hierarchical nanowire arrays were grown on insulating sapphire substrate. The extremities of the nanowire grown substrates were contacted with colloidal silver to form electrodes. The I-V characteristics of the sensing device were determined through a semiconductor parameter analyzer and the data obtained was used to calibrate the electronics needed for the sensing platform. The overall topology of the sensing platform comprises a nanowire-based sensing device that interfaces with an analog sensing board that processes data in real-time and transmits it over a wireless protocol. The receiver end is equipped with electronics to decode the digital packets and a GUI to display obtained data in real-time. The sensor chip is operated at 150C to provide the necessary activation energy to the oxygen surface sites on ZnO nanowires to take part in sensing operation for attracting and detecting carbon dioxide molecules.
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Mukhopadhyay, Anand Kumar, Atul Sharma, Indrajit Chakrabarti, Arindam Basu, and Mrigank Sharad. "Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier." ACM Journal on Emerging Technologies in Computing Systems 17, no. 2 (April 2021): 1–29. http://dx.doi.org/10.1145/3432814.
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The method to map the neural signals to the neuron from which it originates is spike sorting. A low-power spike sorting system is presented for a neural implant device. The spike sorter constitutes a two-step trainer module that is shared by the signal acquisition channel associated with multiple electrodes. A low-power Spiking Neural Network (SNN) module is responsible for assigning the spike class. The two-step shared supervised on-chip training module is presented for improved training accuracy for the SNN. Post implant, the relatively power-hungry training module can be activated conditionally based on a statistics-driven retraining algorithm that allows on the fly training and adaptation. A low-power analog implementation for the SNN classifier is proposed based on resistive crossbar memory exploiting its approximate computing nature. Owing to the direct mapping of SNN functionality using physical characteristics of devices, the analog mode implementation can achieve ∼21 × lower power than its fully digital counterpart. We also incorporate the effect of device variation in the training process to suppress the impact of inevitable inaccuracies in such resistive crossbar devices on the classification accuracy. A variation-aware, digitally calibrated analog front-end is also presented, which consumes less than ∼50 nW power and interfaces with the digital training module as well as the analog SNN spike sorting module. Hence, the proposed scheme is a low-power, variation-tolerant, adaptive, digitally trained, all-analog spike sorter device, applicable to implantable and wearable multichannel brain-machine interfaces.
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Ferreira de Lima, Thomas, Bhavin J. Shastri, Alexander N. Tait, Mitchell A. Nahmias, and Paul R. Prucnal. "Progress in neuromorphic photonics." Nanophotonics 6, no. 3 (March 11, 2017): 577–99. http://dx.doi.org/10.1515/nanoph-2016-0139.
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AbstractAs society’s appetite for information continues to grow, so does our need to process this information with increasing speed and versatility. Many believe that the one-size-fits-all solution of digital electronics is becoming a limiting factor in certain areas such as data links, cognitive radio, and ultrafast control. Analog photonic devices have found relatively simple signal processing niches where electronics can no longer provide sufficient speed and reconfigurability. Recently, the landscape for commercially manufacturable photonic chips has been changing rapidly and now promises to achieve economies of scale previously enjoyed solely by microelectronics. By bridging the mathematical prowess of artificial neural networks to the underlying physics of optoelectronic devices, neuromorphic photonics could breach new domains of information processing demanding significant complexity, low cost, and unmatched speed. In this article, we review the progress in neuromorphic photonics, focusing on photonic integrated devices. The challenges and design rules for optoelectronic instantiation of artificial neurons are presented. The proposed photonic architecture revolves around the processing network node composed of two parts: a nonlinear element and a network interface. We then survey excitable lasers in the recent literature as candidates for the nonlinear node and microring-resonator weight banks as the network interface. Finally, we compare metrics between neuromorphic electronics and neuromorphic photonics and discuss potential applications.
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Bruley, John, David B. Williams, and Ming-Wei Tseng. "Point-defect distributions in ceramics by spectrum-line profiling." Proceedings, annual meeting, Electron Microscopy Society of America 53 (August 13, 1995): 312–13. http://dx.doi.org/10.1017/s0424820100137938.
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Electron energy-loss spectroscopy is well suited to the study of interfaces because the ionization edges can be used to identify the atomic species present and the near edge fine structures on the edges reveal information on the electronic structure surrounding these atoms. This information can be extracted from regions of sample approaching atomic dimensions. A challenge is to be able to map and interpret spectral features with a level of confidence that will allow explanations of physical properties of interest.The term Spectrum-Line is used here to refer to a linear array of spectra, recorded sequentially along a line traced out by the electron probe and is the 1 dimensional analog of the Spectrum-Image. Processing Spectrum-Lines to generate quantitative profiles can provide a vivid picture of changes in composition, a valence state, or site occupancy across an interface. To aid interpretation and guide further spectrum analysis the near-edge fine structures can be compared to spectra from compounds whose atomic coordinations are well known or modeled using the results of band-structure or molecular orbital calculations of electronic structures.
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Bravo, Gabriel, Jesús M. Silva, Salvador A. Noriega, Erwin A. Martínez, Francisco J. Enríquez, and Ernesto Sifuentes. "A Power-Efficient Sensing Approach for Pulse Wave Palpation-Based Heart Rate Measurement." Sensors 21, no. 22 (November 13, 2021): 7549. http://dx.doi.org/10.3390/s21227549.
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Heart rate (HR) is an essential indicator of health in the human body. It measures the number of times per minute that the heart contracts or beats. An irregular heartbeat can signify a severe health condition, so monitoring heart rate periodically can help prevent heart complications. This paper presents a novel wearable sensing approach for remote HR measurement by a compact resistance-to-microcontroller interface circuit. A heartbeat’s signal can be detected by a Force Sensing Resistor (FSR) attached to the body near large arteries (such as the carotid or radial), which expand their area each time the heart expels blood to the body. Depending on how the sensor interfaces with the subject, the FSR changes its electrical resistance every time a pulse is detected. By placing the FSR in a direct interface circuit, those resistance variations can be measured directly by a microcontroller without using either analog processing stages or an analog-to-digital converter. In this kind of interface, the self-heating of the sensor is avoided, since the FSR does not require any voltage or bias current. The proposed system has a sampling rate of 50 Sa/s, and an effective resolution of 10 bits (200 mΩ), enough for obtaining well-shaped cardiac signals and heart rate estimations in real time by the microcontroller. With this approach, the implementation of wearable systems in health monitoring applications is more feasible.
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Ulaganathan, Chandradevi, Neena Nambiar, Kimberly Cornett, Robert L. Greenwell, Jeremy A. Yager, Benjamin S. Prothro, Kevin Tham, et al. "A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications." VLSI Design 2010 (February 16, 2010): 1–12. http://dx.doi.org/10.1155/2010/156829.
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An instrumentation channel is designed, implemented, and tested in a 0.5-μm SiGe BiCMOS process. The circuit features a reconfigurable Wheatstone bridge network that interfaces an assortment of external sensors to signal processing circuits. Also, analog sampling is implemented in the channel using a flying capacitor configuration. The analog samples are digitized by a low-power multichannel A/D converter. Measurement results show that the instrumentation channel supports input signals up to 200 Hz and operates across a wide temperature range of -180°C to 125°C. This work demonstrates the use of a commercially available first generation SiGe BiCMOS process in designing circuits suitable for extreme environment applications.
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Sharma, Mohit, Avery Gardner, Hunter Strathman, David Warren, Jason Silver, and Ross Walker. "Acquisition of Neural Action Potentials Using Rapid Multiplexing Directly at the Electrodes." Micromachines 9, no. 10 (September 20, 2018): 477. http://dx.doi.org/10.3390/mi9100477.
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Neural recording systems that interface with implanted microelectrodes are used extensively in experimental neuroscience and neural engineering research. Interface electronics that are needed to amplify, filter, and digitize signals from multichannel electrode arrays are a critical bottleneck to scaling such systems. This paper presents the design and testing of an electronic architecture for intracortical neural recording that drastically reduces the size per channel by rapidly multiplexing many electrodes to a single circuit. The architecture utilizes mixed-signal feedback to cancel electrode offsets, windowed integration sampling to reduce aliased high-frequency noise, and a successive approximation analog-to-digital converter with small capacitance and asynchronous control. Results are presented from a 180 nm CMOS integrated circuit prototype verified using in vivo experiments with a tungsten microwire array implanted in rodent cortex. The integrated circuit prototype achieves <0.004 mm2 area per channel, 7 µW power dissipation per channel, 5.6 µVrms input referred noise, 50 dB common mode rejection ratio, and generates 9-bit samples at 30 kHz per channel by multiplexing at 600 kHz. General considerations are discussed for rapid time domain multiplexing of high-impedance microelectrodes. Overall, this work describes a promising path forward for scaling neural recording systems to numbers of electrodes that are orders of magnitude larger.
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Choi, Donghoon, and Hyouk-Kyu Cha. "A Low-power Neural Signal Acquisition Analog Front-end IC for Closed-loop Neural Interfaces." JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 22, no. 5 (October 31, 2022): 368–75. http://dx.doi.org/10.5573/jsts.2022.22.5.368.
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Jeon, Hyuntak, Injun Choi, Soon-Jae Kweon, and Minkyu Je. "A Power-Efficient Radiation Sensor Interface with a Peak-Triggered Sampling Scheme for Mobile Dosimeters." Sensors 20, no. 11 (June 7, 2020): 3255. http://dx.doi.org/10.3390/s20113255.
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Radiation sensor interfaces for battery-powered mobile dosimeters must consume low power to monitor the amount of radiation exposure over a long period. This paper proposes a power-efficient radiation sensor interface using a peak-triggered sampling scheme. Since the peak of the analog-to-digital converter’s (ADC’s) input represents radiation energy, our ADC only operates around the peak value thanks to the proposed sampling scheme. Although our ADC operates with a high sampling frequency, this proposed sampling scheme reduces the power consumption of the sensor interface because of the reduced operation time of the ADC. Our sensor interface does not have signal distortion caused by a conventional shaper because the interface quantizes the peak value using the high sampling frequency instead of the shaper. When the radiation input occurs once every 10 μs, the power consumption of the ADC with the proposed sampling scheme is only about 21.5% of the ADC’s power consumption when the ADC continuously operates. In this worst case, the fabricated radiation sensor interface in a 0.18-μm complementary metal-oxide-semiconductor (CMOS) process consumes only 1.11 mW.
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Alraho, Senan, Qummar Zaman, Hamam Abd, and Andreas König. "Integrated Sensor Electronic Front-Ends with Self-X Capabilities." Chips 1, no. 2 (August 12, 2022): 83–120. http://dx.doi.org/10.3390/chips1020008.
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The ongoing vivid advance in integration technologies is giving leverage both to computing systems as well as to sensors and sensor systems. Both conventional computing systems as well as innovative computing systems, e.g., following bio-inspiration from nervous systems or neural networks, require efficient interfacing to an increasing diversity of sensors under the constraints of metrology. The realization of sufficiently accurate, robust, and flexible analog front-ends (AFE) is decisive for the overall application system and quality and requires substantial design expertise both for cells in System-on-Chip (SoC) or chips in System-in-Package (SiP) realizations. Adding robustness and flexibility to sensory systems, e.g., for Industry 4.0., by self-X or self-* features, e.g., self-monitoring, -trimming, or -healing (AFEX) approaches the capabilities met in living beings and is pursued in our research. This paper summarizes on two chips, denoted as Universal-Sensor-Interface-with-self-X-properties (USIX) based on amplitude representation and reports on recently identified challenges and corresponding advanced solutions, e.g., on circuit assessment as well as observer robustness for classic amplitude-based AFE, and transition activities to spike domain representation spiking-analog-front-ends with self-X properties (SAFEX) based on adaptive spiking electronics as the next evolutionary step in AFE development. Key cells for AFEX and SAFEX have been designed in XFAB xh035 CMOS technology and have been subject to extrinsic optimization and/or adaptation. The submitted chip features 62,921 transistors, a total area of 10.89 mm2 (74% analog, 26% digital), and 66 bytes of the configuration memory. The prepared demonstrator will allow intrinsic optimization and/or adaptation for the developed technology agnostic concepts and chip instances. In future work, confirmed cells will be moved to complete versatile and robust AFEs, which can serve both for conventional as well as innovative computing systems, e.g., spiking neurocomputers, as well as to leading-edge technologies to serve in SOCs.
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Wang, Chua-Chin, Ya-Hsin Hsueh, and Shao-Ku Huang. "An Embedded Low Transistor Count 8-bit Analog-to-digital Converter Using a Binary Searching Method." VLSI Design 14, no. 2 (January 1, 2002): 193–202. http://dx.doi.org/10.1080/10655140290010105.
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Small analog-to-digital converter (ADCs) are very popular when they are required in many interfaces or system designs. Ever since the system-on-chip (SOC) became one of the major trends in chip designs, the demand for small and less power draining ADCs has urgently emerged. The area factor is particularly critical when it comes to the cost issue. In this paper, a small but stable ADC intellectual property (IP) macro design is proposed wherein a binary search scheme is utilized to produce the ADC function. A total of eight cycles are needed to convert the analog signal based upon simulation results. A physical chip is fabricated to verify the correctness of our design.
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Gonzalez, Carlos J., Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Fernanda G. L. Kastensmidt, Helmut K. Puchner, Marcilei A. Guazzelli, Nilberto H. Medina, and Tiago R. Balen. "Reducing Soft Error Rate of SoCs Analog-to-Digital Interfaces With Design Diversity Redundancy." IEEE Transactions on Nuclear Science 67, no. 3 (March 2020): 518–24. http://dx.doi.org/10.1109/tns.2019.2952775.
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P, Gopalakrishna, and Dr P. A. Vijaya. "Implementation of LPDDR4 Memory Interface Using AXI3 Protocol with Optimization Technique." Journal of University of Shanghai for Science and Technology 23, no. 06 (June 22, 2021): 1313–17. http://dx.doi.org/10.51201/jusst/21/06447.
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In electronics, one of the complex designs is SOC (system on chip) design, where many of the predefined or IP (intellectual property) circuits which can be analog, digital, or mixed-signal will be combined with each other and said that many circuits are combined to a single chip. In this paper, it is been designed the low power double data rate version of 4 memory (LPDDR4). It is one of the SDRAM architecture and since it is a memory there should be required a protocol to read data from memory and to write data from the memory for that purpose an AXI3 protocol is been used and the memory controller is been used to check the given input from the AXI protocol is correct or not. The entire SOC design is implemented using Verilog code and checked in the Xilinx 14.7 ISE and simulation is verified then the RTL is viewed in ModelSim 10.5 tool and verified the code coverage of design and testbench.
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Simić, Mitar, Adrian K. Stavrakis, Ankita Sinha, Velibor Premčevski, Branko Markoski, and Goran M. Stojanović. "Portable Respiration Monitoring System with an Embroidered Capacitive Facemask Sensor." Biosensors 12, no. 5 (May 15, 2022): 339. http://dx.doi.org/10.3390/bios12050339.
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Respiration monitoring is a very important indicator of health status. It can be used as a marker in the recognition of a variety of diseases, such as sleep apnea, asthma or cardiac arrest. The purpose of the present study is to overcome limitations of the current state of the art in the field of respiration monitoring systems. Our goal was the development of a lightweight handheld device with portable operation and low power consumption. The proposed approach includes a textile capacitive sensor with interdigitated electrodes embroidered into the facemask, integrated with readout electronics. Readout electronics is based on the direct interface of the capacitive sensor and a microcontroller through just one analog and one digital pin. The microcontroller board and sensor are powered by a smartphone or PC through a USB cable. The developed mobile application for the Android™ operating system offers reliable data acquisition and acts as a bridge for data transfer to the remote server. The embroidered sensor was initially tested in a humidity-controlled chamber connected to a commercial impedance analyzer. Finally, in situ testing with 10 volunteering subjects confirmed stable operation with reliable respiration monitoring.
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Spencer, Geoffrey, Frutuoso Mateus, Pedro Torres, Rogério Dionísio, and Ricardo Martins. "Design of CAN Bus Communication Interfaces for Forestry Machines." Computers 10, no. 11 (November 8, 2021): 144. http://dx.doi.org/10.3390/computers10110144.
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This paper presents the initial developments of new hardware devices targeted for CAN (Controller Area Network) bus communications in forest machines. CAN bus is a widely used protocol for communications in the automobile area. It is also applied in industrial vehicles and machines due to its robustness, simplicity, and operating flexibility. It is ideal for forestry machinery producers who need to couple their equipment to a machine that allows the transportation industry to recognize the importance of standardizing communications between tools and machines. One of the problems that producers sometimes face is a lack of flexibility in commercialized hardware modules; for example, in interfaces for sensors and actuators that guarantee scalability depending on the new functionalities required. The hardware device presented in this work is designed to overcome these limitations and provide the flexibility to standardize communications while allowing scalability in the development of new products and features. The work is being developed within the scope of the research project “SMARTCUT—Remote Diagnosis, Maintenance and Simulators for Operation Training and Maintenance of Forest Machines”, to incorporate innovative technologies in forest machines produced by the CUTPLANT S.A. It consists of an experimental system based on the PIC18F26K83 microcontroller to form a CAN node to transmit and receive digital and analog messages via CAN bus, tested and validated by the communication between different nodes. The main contribution of the paper focuses on the presentation of the development of new CAN bus electronic control units designed to enable remote communication between sensors and actuators, and the main controller of forest machines.
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Nguyen, Van Tam, Frederic Villain, and Yann Le Guillou. "Cognitive Radio RF: Overview and Challenges." VLSI Design 2012 (May 22, 2012): 1–13. http://dx.doi.org/10.1155/2012/716476.
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Cognitive radio system (CRS) is a radio system which is aware of its operational and geographical environment, established policies, and its internal state. It is able to dynamically and autonomously adapt its operational parameters and protocols and to learn from its previous experience. Based on software-defined radio (SDR), CRS provides additional flexibility and offers improved efficiency to overall spectrum use. CRS is a disruptive technology targeting very high spectral efficiency. This paper presents an overview and challenges of CRS with focus on radio frequency (RF) section. We summarize the status of the related regulation and standardization activities which are very important for the success of any emerging technology. We point out some key research challenges, especially implementation challenges of cognitive radio (CR). A particular focus is on RF front-end, transceiver, and analog-to-digital and digital-to-analog interfaces which are still a key bottleneck in CRS development.
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Hassanpourghadi, Mohsen, Rezwan A. Rasul, and Mike Shuo-Wei Chen. "A Module-Linking Graph Assisted Hybrid Optimization Framework for Custom Analog and Mixed-Signal Circuit Parameter Synthesis." ACM Transactions on Design Automation of Electronic Systems 26, no. 5 (June 5, 2021): 1–22. http://dx.doi.org/10.1145/3456722.
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Analog and mixed-signal (AMS) computer-aided design tools are of increasing interest owing to demand for the wide range of AMS circuit specifications in the modern system on a chip and faster time to market requirement. Traditionally, to accelerate the design process, the AMS system is decomposed into smaller components (called modules ) such that the complexity and evaluation of each module are more manageable. However, this decomposition poses an interface problem, where the module’s input-output states deviate from when combined to construct the AMS system, and thus degrades the system expected performance. In this article, we develop a tool module-linking-graph assisted hybrid parameter search engine with neural networks (MOHSENN) to overcome these obstacles. We propose a module-linking-graph that enforces equality of the modules’ interfaces during the parameter search process and apply surrogate modeling of the AMS circuit via neural networks. Further, we propose a hybrid search consisting of a global optimization with fast neural network models and a local optimization with accurate SPICE models to expedite the parameter search process while maintaining the accuracy. To validate the effectiveness of the proposed approach, we apply MOHSENN to design a successive approximation register analog-to-digital converter in 65-nm CMOS technology. This demonstrated that the search time improves by a factor of 5 and 700 compared to conventional hierarchical and flat design approaches, respectively, with improved performance.
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Kappert, Holger, Sebastian Braun, Norbert Kordas, Andre Kosfeld, Alexander Utz, Constanze Weber, Olaf Rämer, et al. "A High Temperature SOI-CMOS Chipset Focusing Sensor Electronics for Operating Temperatures up to 300 °C." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2021, HiTEC (April 1, 2021): 000018–24. http://dx.doi.org/10.4071/2380-4491.2021.hitec.000018.
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Abstract Sensors are key elements for capturing environmental properties and are increasingly important in the industry for the intelligent control of industrial processes. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently the use of sensor systems is impossible, because the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical load do not allow a reliable operation of sensitive electronic components. Fraunhofer is running the Lighthouse Project ‘eHarsh’ to overcome this hurdle. In the course of the project an integrated sensor readout electronic has been realized based on a set of three chips. A dedicated sensor frontend provides the analog sensor interface for resistive sensors typically arranged in a Wheatstone configuration. Furthermore, the chipset includes a 32-bit microcontroller for signal conditioning and sensor control. Finally, it comprises an interface chip including a bus transceiver and voltage regulators. The chipset has been realized in a high temperature 0.35 micron SOI-CMOS technology focusing operating temperatures up to 300 °C. The chipset is assembled on a multilayer ceramic LTCC-board using flip chip technology. The ceramic board consists of 4 layers with a total thickness of approx. 0.9 mm. The internal wiring is based on silver paste while external contacts were alternatively manufactured in silver (sintering/soldering) or in gold-alloys (wire bonding). As interconnection technology, silver sintering has been applied. It has already been shown that a significant increase in lifetime can be reached by using silver sintering for die attach applications. Using silver sintering for flip chip technology is a new and challenging approach. By adjusting the process parameter geared to the chipset design and the design of the ceramic board high quality flip chip interconnects can be generated.
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Kappert, Holger, Sebastian Braun, Norbert Kordas, Andre Kosfeld, Alexander Utz, Constanze Weber, Olaf Rämer, et al. "A High Temperature SOI-CMOS Chipset Focusing Sensor Electronics for Operating Temperatures up to 300°C." Journal of Microelectronics and Electronic Packaging 19, no. 1 (January 1, 2022): 1–7. http://dx.doi.org/10.4071/imaps.1547377.
Full textAbstract:
Abstract Sensors are the key elements for capturing environmental properties and are increasingly important in the industry for the intelligent control of industrial processes. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible, because the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical load do not allow the reliable operation of sensitive electronic components. Fraunhofer is running the Lighthouse Project “eHarsh” to overcome this hurdle. In the course of the project, an integrated sensor readout electronic has been realized based on a set of three chips. A dedicated sensor fron-tend provides the analog sensor interface for resistive sensors typically arranged in a Wheatstone configuration. Furthermore, the chipset includes a 32-bit microcontroller for signal conditioning and sensor control. Finally, it comprises an interface chip including a bus transceiver and voltage regulators. The chipset has been realized in a high-temperature 0.35-micron SOI-CMOS technology focusing operating temperatures up to 300°C. The chipset is assembled on a multilayer ceramic low-temperature cofired ceramics (LTCC) board using flip chip technology. The ceramic board consists of four layers with a total thickness of approximately 0.9 mm. The internal wiring is based on silver paste while the external contacts were alternatively manufactured in silver (sintering/soldering) or in gold alloys (wire bonding). As an interconnection technology, silver sintering has been applied. It has already been shown that a significant increase in lifetime can be reached by using silver sintering for die attach applications. Using silver sintering for flip chip technology is a new and challenging approach. By adjusting the process parameter geared to the chipset design and the design of the ceramic board high-quality flip chip interconnects can be generated.
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Gazivoda, Marko, Dinko Oletić, Carlo Trigona, and Vedran Bilas. "Passive Extraction of Signal Feature Using a Rectifier with a Mechanically Switched Inductor for Low Power Acoustic Event Detection." Sensors 20, no. 18 (September 22, 2020): 5445. http://dx.doi.org/10.3390/s20185445.
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Analog hardware used for signal envelope extraction in low-power interfaces for acoustic event detection, owing to its low complexity and power consumption, suffers from low sensitivity and performs poorly under low signal to noise ratios (SNR) found in undersea environments. To overcome those problems, in this paper, we propose a novel passive electromechanical solution for the signal feature extraction in low frequency acoustic range (200–1000 Hz), in the form of a piezoelectric vibration transducer, and a rectifier with a mechanically switched inductor. A simulation study of the novel solution is presented, and a proof-of-concept device is developed and experimentally characterized. We demonstrate its applicability and show the advantages of the passive electromechanical device in comparison to the active electrical solution in terms of operation with lower input signals (<20 mV compared to 40 mV), and higher robustness in low SNR conditions (output voltage loss for −10 dB ≤ SNR < 40 dB of 1 mV, compared to 10 mV). In addition to the signal processing performance improvements, compared to our previous work, the utilization of the presented novel passive feature extractor would also decrease power consumption of a detector’s channel by over 76%, enabling life-time extension and/or increased quality of detection with larger number of channels. To the best of our knowledge, this is the first solution presented in the literature that demonstrates the possibility of using a passive electromechanical feature extractor in a low-power analog wake-up event detector interface.
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Ferreira de Lima, Thomas, Alexander N. Tait, Armin Mehrabian, Mitchell A. Nahmias, Chaoran Huang, Hsuan-Tung Peng, Bicky A. Marquez, et al. "Primer on silicon neuromorphic photonic processors: architecture and compiler." Nanophotonics 9, no. 13 (August 10, 2020): 4055–73. http://dx.doi.org/10.1515/nanoph-2020-0172.
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AbstractMicroelectronic computers have encountered challenges in meeting all of today’s demands for information processing. Meeting these demands will require the development of unconventional computers employing alternative processing models and new device physics. Neural network models have come to dominate modern machine learning algorithms, and specialized electronic hardware has been developed to implement them more efficiently. A silicon photonic integration industry promises to bring manufacturing ecosystems normally reserved for microelectronics to photonics. Photonic devices have already found simple analog signal processing niches where electronics cannot provide sufficient bandwidth and reconfigurability. In order to solve more complex information processing problems, they will have to adopt a processing model that generalizes and scales. Neuromorphic photonics aims to map physical models of optoelectronic systems to abstract models of neural networks. It represents a new opportunity for machine information processing on sub-nanosecond timescales, with application to mathematical programming, intelligent radio frequency signal processing, and real-time control. The strategy of neuromorphic engineering is to externalize the risk of developing computational theory alongside hardware. The strategy of remaining compatible with silicon photonics externalizes the risk of platform development. In this perspective article, we provide a rationale for a neuromorphic photonics processor, envisioning its architecture and a compiler. We also discuss how it can be interfaced with a general purpose computer, i.e. a CPU, as a coprocessor to target specific applications. This paper is intended for a wide audience and provides a roadmap for expanding research in the direction of transforming neuromorphic photonics into a viable and useful candidate for accelerating neuromorphic computing.
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Meneses, Gustavo. "Sensor Networks for Monitoring Metro-de-Medellín System Infrastructure." KnE Engineering 3, no. 1 (February 11, 2018): 862. http://dx.doi.org/10.18502/keg.v3i1.1507.
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Structural health monitoring systems rely on electronic instrumentation and telemetry for improving maintenance tasks, preventing catastrophic failures and following the behavior of critical variables for infrastructure works such as tunnels, highways, bridges and buildings. A proposal for the development of sensor networks for monitoring Metro-de-Medellín system infrastructure is presented. The adopted approach is based on the deployment of generic sensing units that can operate either individually or by constituting wireless personal area networks un-der the MiWi P2P protocol from Microchip. Different transceivers can be added to monitoring units that can act as gateways in order to allow collected data reach other networks, ranging from local area to metropolitan area coverage. Several sensors, digital and analog, can be attached to the generic units depending on the particular requirements of specific situations and monitoring locations. The results obtained from performed tests and the options considered for graphical user interfaces are also presented.Keywords: MiWi Protocol, Structural Health Monitoring, Short Data Service, Terrestrial Trunked Radio, Wireless Sensor Networks.
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Ettahri, Ouafaa, Aziz Oukaira, Mohamed Ali, Ahmad Hassan, Morteza Nabavi, Yvon Savaria, and Ahmed Lakhssassi. "A Real-Time Thermal Monitoring System Intended for Embedded Sensors Interfaces." Sensors 20, no. 19 (October 3, 2020): 5657. http://dx.doi.org/10.3390/s20195657.
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This paper proposes a real-time thermal monitoring method using embedded integrated sensor interfaces dedicated to industrial integrated system applications. Industrial sensor interfaces are complex systems that involve analog and mixed signals, where several parameters can influence their performance. These include the presence of heat sources near sensitive integrated circuits, and various heat transfer phenomena need to be considered. This creates a need for real-time thermal monitoring and management. Indeed, the control of transient temperature gradients or temperature differential variations as well as the prediction of possible induced thermal shocks and stress at early design phases of advanced integrated circuits and systems are essential. This paper addresses the growing requirements of microelectronics applications in several areas that experience fast variations in high-power density and thermal gradient differences caused by the implementation of different systems on the same chip, such as the new-generation 5G circuits. To mitigate adverse thermal effects, a real-time prediction algorithm is proposed and validated using the MCUXpresso tool applied to a Freescale embedded sensor board to monitor and predict its temperature profile in real time by programming the embedded sensor into the FRDM-KL26Z board. Based on discrete temperature measurements, the embedded system is used to predict, in advance, overheating situations in the embedded integrated circuit (IC). These results confirm the peak detection capability of the proposed algorithm that satisfactorily predicts thermal peaks in the FRDM-KL26Z board as modeled with a finite element thermal analysis tool (the Numerical Integrated elements for System Analysis (NISA) tool), to gauge the level of local thermomechanical stresses that may be induced. In this paper, the FPGA implementation and comparison measurements are also presented. This work provides a solution to the thermal stresses and local system overheating that have been a major concern for integrated sensor interface designers when designing integrated circuits in various high-performance technologies or harsh environments.
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Primiani, Rurik A., Kenneth H. Young, André Young, Nimesh Patel, Robert W. Wilson, Laura Vertatschitsch, Billie B. Chitwood, Ranjani Srinivasan, David MacMahon, and Jonathan Weintroub. "SWARM: A 32 GHz Correlator and VLBI Beamformer for the Submillimeter Array." Journal of Astronomical Instrumentation 05, no. 04 (December 2016): 1641006. http://dx.doi.org/10.1142/s2251171716410063.
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A 32[Formula: see text]GHz bandwidth VLBI capable correlator and phased array has been designed and deployed a at the Smithsonian Astrophysical Observatory’s Submillimeter Array (SMA). The SMA Wideband Astronomical ROACH2 Machine (SWARM) integrates two instruments: a correlator with 140[Formula: see text]kHz spectral resolution across its full 32[Formula: see text]GHz band, used for connected interferometric observations, and a phased array summer used when the SMA participates as a station in the Event Horizon Telescope (EHT) very long baseline interferometry (VLBI) array. For each SWARM quadrant, Reconfigurable Open Architecture Computing Hardware (ROACH2) units shared under open-source from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) are equipped with a pair of ultra-fast analog-to-digital converters (ADCs), a field programmable gate array (FPGA) processor, and eight 10 Gigabit Ethernet (GbE) ports. A VLBI data recorder interface designated the SWARM digital back end, or SDBE, is implemented with a ninth ROACH2 per quadrant, feeding four Mark6 VLBI recorders with an aggregate recording rate of 64 Gbps. This paper describes the design and implementation of SWARM, as well as its deployment at SMA with reference to verification and science data.
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Sundeep, Dola, and Eswaramoorthy K Varadharaj. "(Digital Presentation) Review on Electronic Interfaces for Electrochemical Sensor – Enabling Research from the Lab to Market." ECS Meeting Abstracts MA2022-01, no. 53 (July 7, 2022): 2192. http://dx.doi.org/10.1149/ma2022-01532192mtgabs.
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The recent development in the material sciences and facility to synthesis different types of materials made way for advances in electrochemical sensors. A lot of research articles being published on electrochemical sensors on different applications such as human health (metabolites, nutrients, biomarkers of diseases, or development pathologies), potential hazards (environmental pollutants, food contaminants, genotoxic chemicals, etc.), structural monitoring, animal health diagnosing, corrosion detection, Lab-on-chip solutions, etc. Most of the sensors are characterized in any of the detection principle measurement of current (amperometric), charge accumulation or a measurable potential (potentiometric) or change in the conductive properties of medium (conductometric), change in the impedance due to the change in the properties of the material due to species/analyte to be detected (impedimetric) and field-effect which exploits transistor principle to change in current a result of a potentiometric effect at a gate electrode. Most of the reported results are conducted by sophisticated expensive instruments. Researchers are unable to accentuate their research from their lab to market due to a lack of awareness of the instrumentation being used in the instrument. The prominent results of the lab need to be converted into any of the devices like point-of-care (POC), point-of-care testing (POCT), point-of-test (POT), point-of-interest/point-of-incidence (POI), or portable field device. The present review focuses on low-level measurements like quantifying microampere in resolution with nano ampere, mV changes as well as a few ohms to a few kilo-ohms. The current paper also explains to choose suitable components to design analog frontend to acquire signals from different types of electrochemical sensors. Current work also aims to create awareness on available Application-specific integrated circuits (IC) to design suitable instrumentation for the electrochemical sensor. Different power sources and Packaging techniques are also discussed to make the device portable, wearable, implantable, etc. Recent advancements in ultra-low power with more computational power capability microcontroller with various communication technologies appropriate to make device also elucidated in the paper. Thus, the paper imparts the required knowledge to do translation research on electrochemical biosensors.
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Marcôndes, David William Cordeiro, Pedro Bertemes-Filho, and Aleksander Sade Paterno. "Current Oscillator Based on Pyragas Model for Electrical Bioimpedance Applications." Electronics 11, no. 17 (August 25, 2022): 2653. http://dx.doi.org/10.3390/electronics11172653.
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Current sources play an essential role in tissue excitation used in bioelectrical impedance spectroscopy. Most investigations use Howland current sources that, despite their practicality and simplified implementation, have operating frequency limitations and dependence on the load impedance due to their narrow output impedance, especially at higher frequencies. The objective of this work is to propose a model for a robust current-controlled sinusoidal oscillator. The oscillator is based on fully analog electronics, which enables controlling the oscillation phase and amplitude by using a voltage reference. The mathematical model is based on Pyragas control application to the classical harmonic oscillator. From the modeling process, an oscillator topology was built based on second-generation current carriers and on transconductance amplifiers. A sinusoidal voltage source having a frequency of 1 MHz and an amplitude of 1Vpp was used as a reference signal to drive the oscillator. The oscillator output current synchronized the oscillations’ phase and amplitude using the reference, regardless of their magnitude before the control signal acted in the circuit at t≈13.5μs. SPICE simulations using ideal components have confirmed the successful operation of the proposed oscillator. This type of oscillator can be implemented in SOIC, then allowing oscillation control interface with logic circuits.
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Thilagaraj, M., B. Dwarakanath, S. Ramkumar, K. Karthikeyan, A. Prabhu, Gurusamy Saravanakumar, M. Pallikonda Rajasekaran, and N. Arunkumar. "Eye Movement Signal Classification for Developing Human-Computer Interface Using Electrooculogram." Journal of Healthcare Engineering 2021 (December 8, 2021): 1–11. http://dx.doi.org/10.1155/2021/7901310.
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Human-computer interfaces (HCI) allow people to control electronic devices, such as computers, mouses, wheelchairs, and keyboards, by bypassing the biochannel without using motor nervous system signals. These signals permit communication between people and electronic-controllable devices. This communication is due to HCI, which facilitates lives of paralyzed patients who do not have any problems with their cognitive functioning. The major plan of this study is to test out the feasibility of nine states of HCI by using modern techniques to overcome the problem faced by the paralyzed. Analog Digital Instrument T26 with a five-electrode system was used in this method. Voluntarily twenty subjects participated in this study. The extracted signals were preprocessed by applying notch filter with a range of 50 Hz to remove the external interferences; the features were extracted by applying convolution theorem. Afterwards, extracted features were classified using Elman and distributed time delay neural network. Average classification accuracy with 90.82% and 90.56% was achieved using two network models. The accuracy of the classifier was analyzed by single-trial analysis and performances of the classifier were observed using bit transfer rate (BTR) for twenty subjects to check the feasibility of designing the HCI. The achieved results showed that the ERNN model has a greater potential to classify, identify, and recognize the EOG signal compared with distributed time delay network for most of the subjects. The control signal generated by classifiers was applied as control signals to navigate the assistive devices such as mouse, keyboard, and wheelchair activities for disabled people.
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Jakusz, Jacek, Waldemar Jendernalik, Grzegorz Blakiewicz, Miron Kłosowski, and Stanisław Szczepański. "A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces." Sensors 20, no. 11 (June 10, 2020): 3303. http://dx.doi.org/10.3390/s20113303.
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The paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces. The proposed OTA implements an innovative, highly linear voltage-to-current converter based on the channel-length-modulation effect, which can be rail-to-rail driven. At 1-V supply and 1-Vpp asymmetrical input driving, the linearity error in the current-voltage characteristics is 1.5%, while the total harmonic distortion (THD) of the output current is 0.8%. For a symmetrical 2-Vpp input drive, the linearity error is 0.3%, whereas THD reaches 0.2%. The linearity is robust for the mismatch and the process-voltage-and-temperature (PVT) variations. The temperature drift of transconductance is 10 pS/°C. The prototype circuit was fabricated in 180-nanometer CMOS technology.
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Lu, Xiaolong, Guiyun Tian, Zongwen Wang, Wentao Li, Dehua Yang, Haoran Li, You Wang, Jijun Ni, and Yong Zhang. "Research on the Time Drift Stability of Differential Inductive Displacement Sensors with Frequency Output." Sensors 22, no. 16 (August 19, 2022): 6234. http://dx.doi.org/10.3390/s22166234.
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An edge displacement sensor is one of the key technologies for building large segmented mirror astronomical optical telescopes. A digital interface is one novel approach for sensor technologies, digital transformation and the Internet of Things (IoT) in particular. Frequency output sensors and inductance-to-digital converter (LDC) demonstrated significant advantages in comparison with conventional sensors with analog-to-digital converter (ADC) interfaces. In order for the differential inductive frequency output displacement (DIFOD) sensor to meet the high-stability requirements of segmented mirror astronomical telescopes, it is important to understand the factors for time drift of the sensor. This paper focuses on the investigation of key factors of sensor structure and material, signal conditioning and interface, and fixtures for time drift to permanently installed applications. First, the measurement principle and probe structural characteristics of the sensor are analyzed. Then, two kinds of signal conditioning and digitalization methods using resonance circuits and LDC chips are implemented and compared. Finally, the time drift stability experiments are performed on the sensors with different signal conditioning methods and fixtures under controlled temperature. Experimental results show that the magnetic shield ring effectively improves the sensitivity and quality factor of the sensors, the time drift stability of the sensor using the signal conditioning based on resonance circuits is better than that of the sensors using LDC chips, and the root mean square (RMS) of the sensor time drift meets the requirement of 0.01 μm/24 h. This study will help further development of high-stability of frequency output sensors and IoT-based systems for scaled-up applications in the future.
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Richards, Paul L. "Analog Superconducting Electronics." Physics Today 39, no. 3 (March 1986): 54–62. http://dx.doi.org/10.1063/1.881056.
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