Relevant bibliographies by topics / AES-GCM

Academic literature on the topic 'AES-GCM'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "AES-GCM"

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Jankowski, Krzysztof, and Pierre Laurent. "Packed AES-GCM Algorithm Suitable for AES/PCLMULQDQ Instructions." IEEE Transactions on Computers 60, no. 1 (January 2011): 135–38. http://dx.doi.org/10.1109/tc.2010.147.

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Kim, Kyungho, Seungju Choi, Hyeokdong Kwon, Hyunjun Kim, Zhe Liu, and Hwajeong Seo. "PAGE—Practical AES-GCM Encryption for Low-End Microcontrollers." Applied Sciences 10, no. 9 (April 30, 2020): 3131. http://dx.doi.org/10.3390/app10093131.

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An optimized AES (Advanced Encryption Standard) implementation of Galois Counter Mode of operation (GCM) on low-end microcontrollers is presented in this paper. Two optimization methods are applied to proposed implementations. First, the AES counter (CTR) mode of operation is speed-optimized and ensures constant timing. The main idea is replacing expensive AES operations, including AddRound Key, SubBytes, ShiftRows, and MixColumns, into simple look-up table access. Unlike previous works, the look-up table does not require look-up table updates during the entire encryption life-cycle. Second, the core operation of Galois Counter Mode (GCM) is optimized further by using Karatsuba algorithm, compact register utilization, and pre-computed operands. With above optimization techniques, proposed AES-GCM on 8-bit AVR (Alf and Vegard’s RISC processor) architecture from short-term, middle-term to long-term security levels achieved 415, 466, and 477 clock cycles per byte, respectively.
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S. Bader, Ahmad, and Ali Makki Sagheer. "Modification on AES-GCM to Increment Ciphertext Randomness." International Journal of Mathematical Sciences and Computing 4, no. 4 (November 8, 2018): 34–40. http://dx.doi.org/10.5815/ijmsc.2018.04.03.

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Zhang, Yong, Ning Wu, Fang Zhou, Xiaoqiang Zhang, and Jinbao Zhang. "High performance AES-GCM implementation based on efficient AES and FR-KOA multiplier." IEICE Electronics Express 15, no. 14 (2018): 20180559. http://dx.doi.org/10.1587/elex.15.20180559.

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Abdellatif, Karim M., Roselyne Chotin-Avot, and Habib Mehrez. "AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations." Journal of Signal Processing Systems 88, no. 1 (January 29, 2016): 1–12. http://dx.doi.org/10.1007/s11265-016-1104-y.

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Li, Xiaoming, and James Huang. "Cache-collision side-channel analysis and attacks against AES-GCM." International Journal of Big Data Intelligence 7, no. 4 (2020): 211. http://dx.doi.org/10.1504/ijbdi.2020.10036404.

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Huang, James, and Xiaoming Li. "Cache-collision side-channel analysis and attacks against AES-GCM." International Journal of Big Data Intelligence 7, no. 4 (2020): 211. http://dx.doi.org/10.1504/ijbdi.2020.113875.

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Sajjan, Rajani S., and Vijay R. Ghorpade. "GCM-AES-VR A Scheme for Cloud Data Confidentiality and Authenticity." International Journal of Computer Sciences and Engineering 6, no. 12 (December 31, 2018): 86–94. http://dx.doi.org/10.26438/ijcse/v6i12.8694.

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Jamaluddin, Jamaluddin, Naikson Saragih, Roni Simamora, and Rimbun Siringoringo. "Konsep Pengamanan Video Conference Dengan Enkripsi AES-GCM Pada Aplikasi Zoom." METHOMIKA: Jurnal Manajemen Informatika dan Komputerisasi Akuntansi 4, no. 1 (October 17, 2020): 109–13. http://dx.doi.org/10.46880/jmika.v4i2.211.

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The conditions of the Covid-19 pandemic, which began to plague at the end of 2019, brought about major changes to the patterns of interaction in society. Activities that have been carried out directly have begun to shift to activities carried out online. The use of technology, especially in applications for online interaction patterns such as video conferencing applications, is an alternative. The Zoom Cloud Meeting application is widely used by people who initially had doubts about its security system. By implementing end-to-end encryption with AES-256-GCM, it has been able to convince clients on the information security side to keep using the Zoom Cloud Meeting application.
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Mozaffari-Kermani, Mehran, and Arash Reyhani-Masoleh. "Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM." IEEE Transactions on Computers 61, no. 8 (August 2012): 1165–78. http://dx.doi.org/10.1109/tc.2011.125.

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Dissertations / Theses on the topic "AES-GCM"

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Wang, Sheng. "An Architecture for the AES-GCM Security Standard." Thesis, University of Waterloo, 2006. http://hdl.handle.net/10012/2885.

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The forth recommendation of symmetric block cipher mode of operation SP800-38D, Galois/Counter Mode of Operation (GCM) was developed by David A McGrew and John Viega. GCM uses an approved symmetric key block cipher with a block size of 128 bits and a universal hashing over a binary Galois field to provide confidentiality and authentication. It is built specifically to support very high data rates as it can take advantage of pipelining and parallel processing techniques.

Before GCM, SP800-38A only provided confidentiality and SP800-38B provided authentication. SP800-38C provided confidentiality using the counter mode and authentication. However the authentication technique in SP800-38C was not parallelizable and slowed down the throughput of the cipher. Hence, none of these three recommendations were suitable for high speed network and computer system applications.

With the advent of GCM, authenticated encryption at data rates of several Gbps is now practical, permitting high grade encryption and authentication on systems which previously could not be fully protected. However there have not yet been any published results on actual architectures for this standard based on FPGA technology.

This thesis presents a fully pipelined and parallelized hardware architecture for AES-GCM which is GCM running under symmetric block cipher AES on a FPGA multi-core platform corresponding to the IPsec ESP data flow.

The results from this thesis show that the round transformations of confidentiality and hash operations of authentication in AES-GCM can cooperate very efficiently within this pipelined architecture. Furthermore, this AES-GCM hardware architecture never unnecessarily stalls data pipelines. For the first time this thesis provides a complete FPGA-based high speed architecture for the AES-GCM standard, suitable for high speed embedded applications.
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Tordsson, Pontus. "Partitioning oracle attacks against variants of AES-GCM and ChaCha20-Poly1305." Thesis, Linnéuniversitetet, Institutionen för matematik (MA), 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-104355.

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We investigate so-called partitioning oracle attacks against AES-GCM and ChaCha20-Poly1305 along with some improvements. Such attacks against these two cryptosystems are efficient because they can be reduced to solving linear systems of equations over finite fields. We show, with some randomness assumptions, that such linear systems must have at least as many columns as rows. We have also chosen two finite (non-field) rings, as replacement for the respective fields used by AES-GCM and ChaCha20-Poly1305 for message authentication. These rings make the problem of linear system arrangement in a partitioning oracle attack extremely hard for large linear system dimensions.
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Šlenker, Samuel. "Akcelerace vektorových a krytografických operací na platformě x86-64." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-317206.

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The aim of this thesis was to study and subsequently process a comparison of older and newer SIMD processing units of modern microprocessors on the x86-64 platform. The thesis provides an overview of the fastest computations of vector operations with matrices and vectors, including corresponding source codes. Furthermore, the thesis is focused on authenticated encryption, specifically on block cipher AES operating in Galois Counter Mode, and on a discussion of possibilities of instruction sets for cryptographic support.
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Sundberg, Sarah. "Data Link Layer Security for Spacecraft Communication Implementation on FPGA." Thesis, Linköpings universitet, Informationskodning, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-168808.

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With increasing awareness of potential security threats there is a growing interest in communication security for spacecraft control and data. Traditionally commercial and scientific missions have relied on their uniqueness to prevent security breaches. During time the market has changed with open systems for mission control and data distribution, increased connectivity and the use of existing and shared infrastructure. Therefore security layers are being introduced to protect spacecraft communication. In order to mitigate the perceived threats, the Consultative Committee for Space Data Systems (CCSDS) has proposed the addition of communication security in the various layers of the communication model. This thesis describes and discuss their proposal and look into how this application should be implemented into the data link layer of the communication protocol to protect from timing attacks. An implementation of AES-CTR+GMAC is constructed in software to compare different key lengths and another implementation is constructed in synthesized VHDL for use on hardware to investigate the impact on area consumption on the FPGA as well as if it is possible to secure it from cache-timing attacks.
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Lundberg, Carl. "Whiteboxrouter för små kontorsnätverk - En prestandajämförelse." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-39516.

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Inom nätverksbranchen finns en strävan att gå från proprietära lösningar till en öppen standard för hård- och mjukvara. En term för detta är Whiteboxing och det innebär att användaren ges möjlighet att plocka ihop komponenter efter behov, och själv välja vilken mjukvara som används. I sin enklaste form byggs en Whiteboxrouter av en konventionell PC med två nätverkskort och en mjukvarubaserad routingapplikation. Företaget ÅF är intresserade av att veta hur Whitebox-lösningar för routrar står sig prestandamässigt i relation till konventionella routerlösningar med Application Specific Integrated Circuit. Detta arbete har undersökt prestandan genom att mäta throughput och goodput hos en Cisco 2911-router, en Whiteboxrouter med mjukvaran pfSense, samt en Whiteboxrouter som körde pfSense virtualiserat på ESXi. Dessutom undersöktes respektive konfigurations prestanda när trafiken skickades över IPsec VPN. För mätningarna användes filöverföringar med FTP och mätprogrammet Iperf3. Målet med arbetet var att skapa ett beslutsunderlag som klargjorde eventuella prestandaskillnader och utarbetade rekommendationer för framtida val av routerlösning. Resultatet visade att vid generell paketförmedling var prestandan mellan routrarna relativt jämn, dock rekommenderas den virtualiserade Whiteboxroutern då den fick det bästa resultatet. När trafiken sedan krypterades med IPsec VPN var det stora prestandaskillnader mellan enheterna. Bäst prestanda fick Whiteboxroutern. Författaren ser en vinning med Whitebox-tekniken i stort då den medger att serverutrustning som ska utrangeras på grund av prestandakrav, istället kan fungera som nätverksutrustning (routrar och brandväggar) och fortsätta användas under en större del av den tekniska livslängden. Detta kan på sikt leda till minskad miljöpåverkan och besparingar för företaget.
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Koranda, Karel. "Akcelerace šifrování přenosu síťových dat." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2013. http://www.nusl.cz/ntk/nusl-236192.

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This thesis deals with the design of hardware unit used for acceleration of the process of securing network traffic within Lawful Interception System developed as a part of Sec6Net project. First aim of the thesis is the analysis of available security mechanisms commonly used for securing network traffic. Based on this analysis, SSH protocol is chosen as the most suitable mechanism for the target system. Next, the thesis aims at introduction of possible variations of acceleration unit for SSH protocol. In addition, the thesis presents a detailed design description and implementation of the unit variation based on AES-GCM algorithm, which provides confidentiality, integrity and authentication of transmitted data. The implemented acceleration unit reaches maximum throughput of 2,4 Gbps.
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Chen, Yu-Jia, and 陳昱嘉. "Frobenius Additive FFT and Its Application to AES-GCM." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/4frqf4.

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碩士
國立臺灣大學
電機工程學研究所
106
In ISSAC 2018, Li et al. presented Frobenius additive fast Fourier transform (FAFFT), which generalizes Frobenius FFT to additive FFT. To the best of their knowledge, it was the first time that FFT-based binary polynomial multiplication outperforms KOA-based binary polynomial multiplication at such a low degree-bound 231 in respect of the number of bit operations. Up to now, there is no hardware application of the Frobenius additive fast Fourier transform. In this work, we design a pipelined finite field multiplier (FFM) based on FAFFT, and we use it to present a high throughput AES-GCM hardware implementation on FPGAs. Then we compare our implementations with previous implementations with FFM based on the Karatsuba-Ofman algorithm (KOA), which is a method most often used to speed up the polynomial multiplication.
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Owen, Donald Edward Jr. "The feasibility of memory encryption and authentication." 2013. http://hdl.handle.net/2152/21519.

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This thesis presents an analysis of the implementation feasibility of RAM authentication and encryption. Past research as used simulations to establish that it is possible to authenticate and encrypt the contents of RAM with reasonable performance penalties by using clever implementations of tree data structures over the contents of RAM. However, previous work has largely bypassed implementation issues such as power consumption and silicon area required to implement the proposed schemes, leaving implementation details unspecified. This thesis studies the implementation cost of AES-GCM hardware and software solutions for memory authentication and encryption and shows that software solutions are infeasible because they are too costly in terms of performance and power, whereas hardware solutions are more feasible.
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Teixeira, Dany José Correia. "Improving Safety of an Automotive AES-GCM Core and its Impact on Side-Channel Protection." Dissertação, 2020. https://hdl.handle.net/10216/132868.

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O incremento do número de componentes eletrónicos e o correspondente aumento do fluxo de dados no setor automóvel levou a uma preocupação crescente com a garantia de segurança dos sistemas eletrónicos, especialmente em sistemas críticos cuja violação seja passível de colocar em causa a integridade do sistema e a segurança das pessoas. A utilização de sistemas que implementam o Advanced Encryption Standard (AES) foi vista como uma solução para este problema, impedindo o acesso indevido aos dados dos veículos, através da sua encriptação. O algoritmo AES não possui atualmente nenhuma vulnerabilidade efetiva, mas o mesmo não acontece com as suas implementações, as quais estão sujeitas a ataques ditos side-channel, onde informações que resultam da operação destas implementações são exploradas na tentativa de descobrir os dados encriptados. A aplicação de núcleos IP no setor automóvel requer que as suas implementações cumpram a norma ISO-26262 de forma a garantir que a sua operação não compromete a segurança do veículo e dos ocupantes. Este cumprimento implica alterações na arquitetura dos sistemas que podem influenciar as características de operação que são normalmente exploradas em ataques para obter informação que eventualmente permita ganhar conhecimento sobre os dados encriptados. Assim, o desenvolvimento das componentes de segurança, na perspetiva da segurança informática da informação e no que se refere à segurança de operação do veículo e dos seus ocupantes, que são ainda consideradas como componentes independentes, podem na verdade estar relacionadas, já que as melhorias introduzidas para incrementar a resiliência a falhas e consequentemente a integridade de operação dos sistemas, podem aumentar a fragilidade do sistema a ataques que comprometam a segurança informática dos dados. O presente trabalho tem como objetivo desenvolver uma arquitetura capaz de atingir as métricas para o nível mais alto de certificação em segurança de acordo com a norma ISSO-26262 (certificação ASIL-D), a partir de uma arquitetura já existente, e comparar as duas arquiteturas em termos de vulnerabilidade a ataques ditos side-channel que exploram o seu consumo de potência dinâmica. Os resultados demonstram que para a arquitetura ASIL-D a identificação de pontos de interesse e de dados relevantes no consumo de potência é mais evidente, o que sugere existir uma maior vulnerabilidade da arquitetura desenvolvida a ataques informáticos desenvolvidos por esse processo.
The increase in electronic components and the corresponding increment in the data flow among electronic systems in automotive applications made security one of the main concerns in this sector. The use of IP cores that implement the Advanced Encryption Standard (AES) was seen as a solution to this problem, preventing improper access to vehicle data, through its encryption. The AES algorithm does not currently have any effective vulnerability, but the same does not happen with its implementations, which are subject to side-channel attacks, where information that results from the operation of these implementations is exploited in an attempt to discover the encrypted data. The application of IP cores in the automotive sector requires that the implementations comply with the ISO-26262 standard in order to ensure that their operation does not compromise the vehicle's safety. This compliment implies changes in the core architecture that can influence the characteristics of operation that are normally exploited in attacks. Thus, the development of safety and security components in the automotive sector, which are still considered as independent processes, may be related because safety improvements may cause changes in the system's vulnerability to attacks that can compromise its security. This work aims to develop an architecture capable of reaching the metrics for the highest level of safety certification (ASIL-D), based on an existing architecture, and compare the two architectures in terms of vulnerability to side-channel attacks that exploit their dynamic power consumption. The results show that for the ASIL-D architecture, the identification of points of interest and relevant data on the power consumption traces is more evident, which suggests greater effectiveness of the attacks performed in this architecture.
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Teixeira, Dany José Correia. "Improving Safety of an Automotive AES-GCM Core and its Impact on Side-Channel Protection." Master's thesis, 2020. https://hdl.handle.net/10216/132868.

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O incremento do número de componentes eletrónicos e o correspondente aumento do fluxo de dados no setor automóvel levou a uma preocupação crescente com a garantia de segurança dos sistemas eletrónicos, especialmente em sistemas críticos cuja violação seja passível de colocar em causa a integridade do sistema e a segurança das pessoas. A utilização de sistemas que implementam o Advanced Encryption Standard (AES) foi vista como uma solução para este problema, impedindo o acesso indevido aos dados dos veículos, através da sua encriptação. O algoritmo AES não possui atualmente nenhuma vulnerabilidade efetiva, mas o mesmo não acontece com as suas implementações, as quais estão sujeitas a ataques ditos side-channel, onde informações que resultam da operação destas implementações são exploradas na tentativa de descobrir os dados encriptados. A aplicação de núcleos IP no setor automóvel requer que as suas implementações cumpram a norma ISO-26262 de forma a garantir que a sua operação não compromete a segurança do veículo e dos ocupantes. Este cumprimento implica alterações na arquitetura dos sistemas que podem influenciar as características de operação que são normalmente exploradas em ataques para obter informação que eventualmente permita ganhar conhecimento sobre os dados encriptados. Assim, o desenvolvimento das componentes de segurança, na perspetiva da segurança informática da informação e no que se refere à segurança de operação do veículo e dos seus ocupantes, que são ainda consideradas como componentes independentes, podem na verdade estar relacionadas, já que as melhorias introduzidas para incrementar a resiliência a falhas e consequentemente a integridade de operação dos sistemas, podem aumentar a fragilidade do sistema a ataques que comprometam a segurança informática dos dados. O presente trabalho tem como objetivo desenvolver uma arquitetura capaz de atingir as métricas para o nível mais alto de certificação em segurança de acordo com a norma ISSO-26262 (certificação ASIL-D), a partir de uma arquitetura já existente, e comparar as duas arquiteturas em termos de vulnerabilidade a ataques ditos side-channel que exploram o seu consumo de potência dinâmica. Os resultados demonstram que para a arquitetura ASIL-D a identificação de pontos de interesse e de dados relevantes no consumo de potência é mais evidente, o que sugere existir uma maior vulnerabilidade da arquitetura desenvolvida a ataques informáticos desenvolvidos por esse processo.
The increase in electronic components and the corresponding increment in the data flow among electronic systems in automotive applications made security one of the main concerns in this sector. The use of IP cores that implement the Advanced Encryption Standard (AES) was seen as a solution to this problem, preventing improper access to vehicle data, through its encryption. The AES algorithm does not currently have any effective vulnerability, but the same does not happen with its implementations, which are subject to side-channel attacks, where information that results from the operation of these implementations is exploited in an attempt to discover the encrypted data. The application of IP cores in the automotive sector requires that the implementations comply with the ISO-26262 standard in order to ensure that their operation does not compromise the vehicle's safety. This compliment implies changes in the core architecture that can influence the characteristics of operation that are normally exploited in attacks. Thus, the development of safety and security components in the automotive sector, which are still considered as independent processes, may be related because safety improvements may cause changes in the system's vulnerability to attacks that can compromise its security. This work aims to develop an architecture capable of reaching the metrics for the highest level of safety certification (ASIL-D), based on an existing architecture, and compare the two architectures in terms of vulnerability to side-channel attacks that exploit their dynamic power consumption. The results show that for the ASIL-D architecture, the identification of points of interest and relevant data on the power consumption traces is more evident, which suggests greater effectiveness of the attacks performed in this architecture.
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Book chapters on the topic "AES-GCM"

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Schönberger, Georg, and Jürgen Fuß. "GPU-Assisted AES Encryption Using GCM." In Communications and Multimedia Security, 178–85. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-24712-5_16.

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Käsper, Emilia, and Peter Schwabe. "Faster and Timing-Attack Resistant AES-GCM." In Lecture Notes in Computer Science, 1–17. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-04138-9_1.

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Arunkumar, B., and G. Kousalya. "Analysis of AES-GCM Cipher Suites in TLS." In Advances in Intelligent Systems and Computing, 102–11. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-68385-0_9.

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Abdellatif, Karim M., R. Chotin-Avot, and H. Mehrez. "FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm." In Lecture Notes in Computer Science, 13–24. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-05960-0_2.

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Hori, Yohei, Akashi Satoh, Hirofumi Sakane, and Kenji Toda. "Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems." In Advances in Information and Computer Security, 261–78. Berlin, Heidelberg: Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-89598-5_18.

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Zhou, Gang, Harald Michalik, and László Hinsenkamp. "Improving Throughput of AES-GCM with Pipelined Karatsuba Multipliers on FPGAs." In Lecture Notes in Computer Science, 193–203. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-00641-8_20.

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Boston, Brett, Samuel Breese, Joey Dodds, Mike Dodds, Brian Huffman, Adam Petcher, and Andrei Stefanescu. "Verified Cryptographic Code for Everybody." In Computer Aided Verification, 645–68. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-81685-8_31.

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Abstract We have completed machine-assisted proofs of two highly-optimized cryptographic primitives, AES-256-GCM and SHA-384. We have verified that the implementations of these primitives, written in a mix of C and x86 assembly, are memory safe and functionally correct, by which we mean input-output equivalent to their algorithmic specifications. Our proofs were completed using SAW, a bounded cryptographic verification tool which we have extended to handle embedded x86. The code we have verified comes from AWS LibCrypto. This code is identical to BoringSSL and very similar to OpenSSL, from which it ultimately derives. We believe we are the first to formally verify these implementations, which protect the security of nearly everybody on the internet.
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Bellare, Mihir, and Björn Tackmann. "The Multi-user Security of Authenticated Encryption: AES-GCM in TLS 1.3." In Advances in Cryptology – CRYPTO 2016, 247–76. Berlin, Heidelberg: Springer Berlin Heidelberg, 2016. http://dx.doi.org/10.1007/978-3-662-53018-4_10.

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Lapid, Ben, and Avishai Wool. "Cache-Attacks on the ARM TrustZone Implementations of AES-256 and AES-256-GCM via GPU-Based Analysis." In Selected Areas in Cryptography – SAC 2018, 235–56. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-10970-7_11.

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Bose, Priyanka, Viet Tung Hoang, and Stefano Tessaro. "Revisiting AES-GCM-SIV: Multi-user Security, Faster Key Derivation, and Better Bounds." In Advances in Cryptology – EUROCRYPT 2018, 468–99. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-78381-9_18.

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Conference papers on the topic "AES-GCM"

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Koteshwara, Sandhya, Amitabh Das, and Keshab K. Parhi. "Performance comparison of AES-GCM-SIV and AES-GCM algorithms for authenticated encryption on FPGA platforms." In 2017 51st Asilomar Conference on Signals, Systems, and Computers. IEEE, 2017. http://dx.doi.org/10.1109/acssc.2017.8335570.

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Gueron, Shay, and Vlad Krasnov. "The Fragility of AES-GCM Authentication Algorithm." In 2014 Eleventh International Conference on Information Technology: New Generations (ITNG). IEEE, 2014. http://dx.doi.org/10.1109/itng.2014.31.

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Abdellatif, Karim M., R. Chotin-Avot, and H. Mehrez. "Efficient AES-GCM for VPNs using FPGAs." In 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2013. http://dx.doi.org/10.1109/mwscas.2013.6674921.

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Abdellatif, Karim M., R. Chotin-Avot, and H. Mehrez. "Improved method for parallel AES-GCM cores using FPGAs." In 2013 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, 2013. http://dx.doi.org/10.1109/reconfig.2013.6732299.

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Henzen, Luca, and Wolfgang Fichtner. "FPGA parallel-pipelined AES-GCM core for 100G Ethernet applications." In ESSCIRC 2007 - 33rd European Solid-State Circuits Conference. IEEE, 2010. http://dx.doi.org/10.1109/esscirc.2010.5619894.

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Zhou, Gang, Harald Michalik, and Laszlo Hinsenkamp. "Efficient and High-Throughput Implementations of AES-GCM on FPGAs." In 2007 International Conference on Field-Programmable Technology. IEEE, 2007. http://dx.doi.org/10.1109/fpt.2007.4439248.

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Sung, Byung-Yoon, Ki-Bbeum Kim, and Kyung-Wook Shin. "An AES-GCM authenticated encryption crypto-core for IoT security." In 2018 International Conference on Electronics, Information, and Communication (ICEIC). IEEE, 2018. http://dx.doi.org/10.23919/elinfocom.2018.8330586.

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Yohei Hori, Akashi Satoh, Hirofumi Sakane, and Kenji Toda. "Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems." In 2008 International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2008. http://dx.doi.org/10.1109/fpl.2008.4629902.

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Vliegen, Jo, Oscar Reparaz, and Nele Mentens. "Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA." In 2017 IEEE 2nd International Verification and Security Workshop (IVSW). IEEE, 2017. http://dx.doi.org/10.1109/ivsw.2017.8031559.

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Chen, Tianshan, Wenjie Huo, and Zhenglin Liu. "Design and Efficient FPGA Implementation of Ghash Core for AES-GCM." In 2010 International Conference on Computational Intelligence and Software Engineering (CiSE). IEEE, 2010. http://dx.doi.org/10.1109/cise.2010.5676905.

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Reports on the topic "AES-GCM"

1

Gueron, S., A. Langley, and Y. Lindell. AES-GCM-SIV: Nonce Misuse-Resistant Authenticated Encryption. RFC Editor, April 2019. http://dx.doi.org/10.17487/rfc8452.

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Housley, R. Using AES-CCM and AES-GCM Authenticated Encryption in the Cryptographic Message Syntax (CMS). RFC Editor, November 2007. http://dx.doi.org/10.17487/rfc5084.

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Salowey, J., A. Choudhury, and D. McGrew. AES Galois Counter Mode (GCM) Cipher Suites for TLS. RFC Editor, August 2008. http://dx.doi.org/10.17487/rfc5288.

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Mattsson, J., and D. Migault. ECDHE_PSK with AES-GCM and AES-CCM Cipher Suites for TLS 1.2 and DTLS 1.2. RFC Editor, September 2018. http://dx.doi.org/10.17487/rfc8442.

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McGrew, D., and K. Igoe. AES-GCM Authenticated Encryption in the Secure Real-time Transport Protocol (SRTP). RFC Editor, December 2015. http://dx.doi.org/10.17487/rfc7714.

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Rescorla, E. TLS Elliptic Curve Cipher Suites with SHA-256/384 and AES Galois Counter Mode (GCM). RFC Editor, August 2008. http://dx.doi.org/10.17487/rfc5289.

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You might also be interested in the extended bibliographies on the topic 'AES-GCM' for particular source types:
Journal articles
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