Relevant bibliographies by topics / Adaptive Phase Lock Loop

Academic literature on the topic 'Adaptive Phase Lock Loop'

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Published: 14 March 2023

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Journal articles on the topic "Adaptive Phase Lock Loop"

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Taheri, H. E. "A 4-4.8GHz Adaptive Bandwidth, Adaptive Jitter Phase Locked Loop." Engineering, Technology & Applied Science Research 7, no. 2 (April 24, 2017): 1473–77. http://dx.doi.org/10.48084/etasr.1099.

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A low power, low phase noise adaptive bandwidth phase locked loop is presented in this paper. The proposed structure benefits from a novel lock status monitor unit (LSMU) that determines loop operation and loop bandwidth. The loop filter resistance and charge pump current are inversely proportional and bandwidth to reference frequency is maintained fixed. This structure is simulated in 0.18 μm CMOS technology and simulation results are presented.
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Cortés, Iñigo, Johannes Rossouw van der Merwe, Jari Nurmi, Alexander Rügamer, and Wolfgang Felber. "Evaluation of Adaptive Loop-Bandwidth Tracking Techniques in GNSS Receivers." Sensors 21, no. 2 (January 12, 2021): 502. http://dx.doi.org/10.3390/s21020502.

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Global navigation satellite system (GNSS) receivers use tracking loops to lock onto GNSS signals. Fixed loop settings limit the tracking performance against noise, receiver dynamics, and the current scenario. Adaptive tracking loops adjust these settings to achieve optimal performance for a given scenario. This paper evaluates the performance and complexity of state-of-the-art adaptive scalar tracking techniques used in modern digital GNSS receivers. Ideally, a tracking channel should be adjusted to both noisy and dynamic environments for optimal performance, defined by tracking precision and loop robustness. The difference between the average tracking jitter of the discriminator’s output and the square-root Cramér-Rao bound (CRB) indicates the loops’ tracking capability. The ability to maintain lock characterizes the robustness in highly dynamic scenarios. From a system perspective, the average lock indicator is chosen as a metric to measure the performance in terms of precision, whereas the average number of visible satellites being tracked indicates the system’s robustness against dynamics. The average of these metrics’ product at different noise levels leads to a reliable system performance metric. Adaptive tracking techniques, such as the fast adaptive bandwidth (FAB), the fuzzy logic (FL), and the loop-bandwidth control algorithm (LBCA), facilitate a trade-off for optimal performance. These adaptive tracking techniques are implemented in an open software interface GNSS hardware receiver. All three methods steer a third-order adaptive phase locked loop (PLL) and are tested in simulated scenarios emulating static and high-dynamic vehicular conditions. The measured tracking performance, system performance, and time complexity of each algorithm present a detailed analysis of the adaptive techniques. The results show that the LBCA with a piece-wise linear approximation is above the other adaptive loop-bandwidth tracking techniques while preserving the best performance and lowest time complexity. This technique achieves superior static and dynamic system performance being 1.5 times more complex than the traditional tracking loop.
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Won, Jong-Hoon. "A Novel Adaptive Digital Phase-Lock-Loop for Modern Digital GNSS Receivers." IEEE Communications Letters 18, no. 1 (January 2014): 46–49. http://dx.doi.org/10.1109/lcomm.2013.111113.131849.

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Joonsuk Lee and Beomsup Kim. "A low-noise fast-lock phase-locked loop with adaptive bandwidth control." IEEE Journal of Solid-State Circuits 35, no. 8 (August 2000): 1137–45. http://dx.doi.org/10.1109/4.859502.

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CHAU, YAWGENG A., and CHEN-FENG CHEN. "ON THE DESIGN OF ADAPTIVE-BANDWIDTH ALL-DIGITAL PHASE-LOCKED LOOPS." Journal of Circuits, Systems and Computers 20, no. 06 (October 2011): 1037–49. http://dx.doi.org/10.1142/s0218126611007748.

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The second-order adaptive-bandwidth all-digital phase-locked loop (ADB-ADPLL) is designed and analyzed by using a new design procedure. Based on a discrete-time analogy of a continuous-time PLL (CTPLL) with the z-transform, the design criterion of the ADB-ADPLL is derived and a design procedure is developed. Following the design criterion, the ADB-ADPLL can adapt its system parameters to balance the loop noise bandwidth and lock-in time. According to the design criterion, the ratio of the loop bandwidth to the reference input frequency can be maintained as a constant if the sampling frequency is a fixed multiplier of the input frequency. An example is given to illustrate the design procedure and simulation results are presented to validate the adaptive characteristics with respect to the phase noise and varying bands of input frequency.
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Hu, Yu Feng, Bin Liu, and Jun Liu. "PFC Controller Based on Self-Adaptive Proportional-Resonant Control." Advanced Materials Research 588-589 (November 2012): 1533–38. http://dx.doi.org/10.4028/www.scientific.net/amr.588-589.1533.

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Proportional-resonant is introduced in PFC controller design and the coefficients are easy to tune. Zero-tracking-error can be achieved for the fundamental frequency and selective harmonic compensation can be achieved as well. Also a novel Phase-Loop-Lock controller is given based on which a self-adaptive proportional resonant PFC controller is induced at last.
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Zhang, Youming, Xusheng Tang, Zhennan Wei, Kaiye Bao, and Nan Jiang. "A Ku-Band Fractional-N Frequency Synthesizer with Adaptive Loop Bandwidth Control." Electronics 10, no. 2 (January 7, 2021): 109. http://dx.doi.org/10.3390/electronics10020109.

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This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key modules of the frequency synthesizer such as broadband voltage-controlled oscillator (VCO) with auto frequency calibration (AFC) and programable frequency divider/charge pump/loop filter are designed for integrity and flexible configuration. The proposed frequency synthesizer is fabricated in 0.13 μm CMOS technology occupying 1.14 × 1.18 mm2 area including ESD/IOs and pads, and the area of the ALBC is only 55 × 76 μm2. The out frequency can cover from 11.37 GHz to 14.8 GHz with a frequency tuning range (FTR) of 26.2%. The phase noise is −112.5 dBc/Hz @ 1 MHz and −122.4 dBc/Hz @ 3 MHz at 13 GHz carrier frequency. Thanks to the proposed ALBC, the lock-time can be shortened by about 30% from about 36 μs to 24 μs. The chip area and power consumption of the proposed ALBC technology are slight, but the beneficial effect is significant.
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Zhang, Youming, Xusheng Tang, Zhennan Wei, Kaiye Bao, and Nan Jiang. "A Ku-Band Fractional-N Frequency Synthesizer with Adaptive Loop Bandwidth Control." Electronics 10, no. 2 (January 7, 2021): 109. http://dx.doi.org/10.3390/electronics10020109.

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This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key modules of the frequency synthesizer such as broadband voltage-controlled oscillator (VCO) with auto frequency calibration (AFC) and programable frequency divider/charge pump/loop filter are designed for integrity and flexible configuration. The proposed frequency synthesizer is fabricated in 0.13 μm CMOS technology occupying 1.14 × 1.18 mm2 area including ESD/IOs and pads, and the area of the ALBC is only 55 × 76 μm2. The out frequency can cover from 11.37 GHz to 14.8 GHz with a frequency tuning range (FTR) of 26.2%. The phase noise is −112.5 dBc/Hz @ 1 MHz and −122.4 dBc/Hz @ 3 MHz at 13 GHz carrier frequency. Thanks to the proposed ALBC, the lock-time can be shortened by about 30% from about 36 μs to 24 μs. The chip area and power consumption of the proposed ALBC technology are slight, but the beneficial effect is significant.
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Liu, G., and L. Wang. "JOINT TRACKING GPS AND LEO SIGNALS WITH ADAPTIVE VECTOR TRACKING LOOP IN CHALLENGING ENVIRONMENTS." International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences XLVI-3/W1-2022 (April 22, 2022): 119–24. http://dx.doi.org/10.5194/isprs-archives-xlvi-3-w1-2022-119-2022.

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Abstract. Navigation from LEO satellites own many merits and attracts increasing popularity recently. In addition to increasing the signal availability, the low signal strength loss and fast satellite geometry change from LEO satellite are particularly appealing in challenging environments. Recently, a few researchers attempt to navigate with non-cooperative signals from LEO satellites with pure phase lock loop (PLL) or frequency lock loop (FLL), while a more practical solution to utilizing LEO navigation is joint positioning with the existing GNSS signals which has not been seriously studied. In this study, we proposed a joint GPS and LEO navigation signal tracking strategy that employs a vector tracking loop (VTL) with fully considering the high dynamic characteristics of the LEO signals. In order to solve the high dynamics problem, the second-order deviation parameters were considered in the extended Kalman filter, which is more adaptive to the non-linear variation of the signal acceleration. In addition, a carrier-to-noise ratio (C/N0) based observation noise determination strategy is employed to adapt different observation conditions. The proposed method was verified with different simulation data and the results indicate the adaptive vector tracking loop is capable of tracking GPS and LEO signals simultaneously and robustly. The benefit is particularly in the weak signal scenarios. The experiment results also reveal that the joint vector tracking loop improves positioning accuracy in GNSS challenging environments.
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Wang, Binghui, Haigang Yang, and Yiping Jia. "A 1-to-3 GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28 nm CMOS." Electronics 11, no. 13 (June 22, 2022): 1954. http://dx.doi.org/10.3390/electronics11131954.

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Based on a self-biased architecture, this paper presents a novel adaptive fast-locking, wide operating range and low-jitter phase-locked loop (PLL). A current injection and adaptive bandwidth technology with minimum area overhead is employed to speed up the loop equilibrium acquisition process, without any adverse impact on the steady-state loop dynamics and the jitter performance. The proposed start-up circuit resets the loop to an appropriate initial state in order to shorten the initial ramp-up interval of the voltage-controlled oscillator (VCO), also resulting in cutting down the pull-in time. In addition, a proportional factor is introduced to give some kind of flexibility in the circuit design optimization. The proposed adaptive fast-locking self-biased PLL (AFL-SPLL) is designed and realized in a prototype based on TSMC 28 nm CMOS process, having a supply voltage of 0.9 V and an area of 0.0281 mm2. This PLL demonstrates a tuning range of 1 to 3 GHz and power consumptions from 0.91 mW at 1 GHz to 4.6 mW at 3 GHz operating frequency. The experimental results show that the capture process has been accelerated by up to 84.7% over large division ratios, yet the capture performance did not deteriorate at all for small division ratios. Meanwhile, the circuit implementation gave almost no area increase and yet achieved a reduction in the lock-in time of about 6.5 times, namely from 23.5 μs (without the adaptive locking) to only 3.6 μs (with the adaptive locking) on the maximum operation frequency condition of 3 GHz.
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Dissertations / Theses on the topic "Adaptive Phase Lock Loop"

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Myers, Michael D. "THE DEVELOPMENT OF A NONLINEAR PHASE-LOCK LOOP WITH ADAPTIVE GAIN CONTROL BASED ON MODERN CONTROL THEORY." Wright State University / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=wright1204823575.

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UGAZIO, SABRINA. "High-performance velocity, frequency and time estimation using GNSS." Doctoral thesis, Politecnico di Torino, 2013. http://hdl.handle.net/11583/2513765.

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GNSS (Global Navigation Satellite System) receivers provide PVT solution, where PVT stands for Position, Velocity and Time. In general, the main interest of the common GNSS user is on the position solution and as a consequence the main focus of the research is the improvement of the position solution accuracy. However, many applications exist in which the measurement of both velocity and/or time is crucial and this is the reason why the focus of this thesis is on the Velocity and Time solution. The PVT solution is computed through trilateration techniques, based on a TOA (Time Of Arrival) ranging technique, therefore the PVT solution is correlated to the measurement of time. In particular, the position solution is related to a time measurement while the velocity solution is correlated to a frequency measurement. Different factors that affect the velocity estimate on one side and the time estimate on the other side are taken into account in this thesis, that in classic PVT solution are usually neglected. In the velocity/frequency estimate, the significant measurement is the change in the user-satellite distance, i.e. a relative measurement, thus the measurements errors that remain constant during the time interval over which the velocity is estimated cancel out. Carrier-phase difference solution enables velocity accuracy in the order of 1 mm/s, a high-level accuracy which is crucial for many applications, including Inertial Measurement Unit (IMU) calibration, motion compensation for Synthetic Aperture Radar (SAR) and flight reference systems. Thanks to the cancellation of the common errors, that in the position solution represents the very larger error sources, in the velocity solution other minor effects become the limiting error sources. The first goal investigated in this thesis is to look for the accuracy limit that can be achieved in the velocity/frequency solution. The second objective is to investigate the problem of high- accuracy time solution. As well as the position, the time is an absolute measurement, affected by large error sources. Furthermore, the clock error is in common to all the satellite measurements, and due to this, the common errors among the satellites are not told apart and are in general attributed to the clock measurement. As a result, lots of error sources that are not involved in the position solution become dominant in the time solution. A main limiting factor in the timing accuracy is represented by the errors in ionospheric delay estimate, where many error sources are involved, in particular the unknown bias due to the receiver hardware. After a part to introduce GNSS and its basic principles, with the focus on the aspects that are more relevant for the dissertation and that allow one to outline the motivations of the work, the thesis is divided in three main parts, two regarding in particular the velocity/frequency solution and the last one focused on the high-accuracy time solution. The first step to improve the velocity solution was to notice how the performance is much worse on the vertical solution than on the horizontal and how highly correlated the vertical solution is to the local frequency estimate. This is due to the geometry of GNSS, that implies that users on the Earth or close to the Earth (as aircrafts) can see satellites all around them on the horizontal direction, but they cannot see satellites under them, which is rejected in a poorer geometry on the vertical direction. Due to this characteristic, an error on the pseudorange, as the clock error is, reflects on the vertical solution more heavily than on the other dimensions. As a result, the vertical solution can be about three times worse than the horizontal and from the covariance matrix of the solution it can be seen how the correlation is high in particular between the vertical and the clock solution. This fact is true both for the position and for the velocity solution, which means that the vertical velocity accuracy is highly correlated to the local oscillator frequency. As a result, a way to improve the vertical velocity accuracy is to obtain a better estimate of the local frequency. In this thesis, models for the local oscillators and ways to integrate the frequency estimate in the GNSS solution are investigated. Another important aspect to improve the performance of the velocity measurement is to improve the accuracy of the GNSS measurement. Since the measurement used to obtain precise velocity is the carrier phase, which enables accuracy in the order of 1 mm/s, the goal to improve the accuracy on the carrier-phase measurement is crucial. With this objective, novel Digital Phase Lock Loops (DPLLs) has been designed, both of second and third order, with an adaptive bandwidth algorithm. The objective was to tune the loop bandwidth according to the input signal dynamics and noise, and use a bandwidth small enough to reduce the noise effects as much as possible, but wide enough to properly track the input dynamics. Since the PLL is designed for precise velocity measurement, the performance in terms of dynamics tracking ability is crucial. The last part of the analysis concerns the time solution. In most of cases in GNSS, high importance is given to the position accuracy, while the residual common biases are included in the receiver clock error. This approach makes the time solution not very accurate. Since the main bias which affects the time solution is the ionosphere delay, in this thesis the accuracy of the Total Electron Content (TEC) estimate is investigated, with the focus on the measurement bias. All the measurements which this thesis refers to are made using GPS (Global Positioning System) only, nevertheless sometimes in the thesis it is talked about GNSS in general. This is because the approaches considered in this thesis are tested here using GPS, but they can be applied to all the GNSSs.
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Hussain, Zahir M. "Adaptive instantaneous frequency estimation: Techniques and algorithms." Thesis, Queensland University of Technology, 2002. https://eprints.qut.edu.au/36137/7/36137_Digitised%20Thesis.pdf.

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This thesis deals with the problem of the instantaneous frequency (IF) estimation of sinusoidal signals. This topic plays significant role in signal processing and communications. Depending on the type of the signal, two major approaches are considered. For IF estimation of single-tone or digitally-modulated sinusoidal signals (like frequency shift keying signals) the approach of digital phase-locked loops (DPLLs) is considered, and this is Part-I of this thesis. For FM signals the approach of time-frequency analysis is considered, and this is Part-II of the thesis. In part-I we have utilized sinusoidal DPLLs with non-uniform sampling scheme as this type is widely used in communication systems. The digital tanlock loop (DTL) has introduced significant advantages over other existing DPLLs. In the last 10 years many efforts have been made to improve DTL performance. However, this loop and all of its modifications utilizes Hilbert transformer (HT) to produce a signal-independent 90-degree phase-shifted version of the input signal. Hilbert transformer can be realized approximately using a finite impulse response (FIR) digital filter. This realization introduces further complexity in the loop in addition to approximations and frequency limitations on the input signal. We have tried to avoid practical difficulties associated with the conventional tanlock scheme while keeping its advantages. A time-delay is utilized in the tanlock scheme of DTL to produce a signal-dependent phase shift. This gave rise to the time-delay digital tanlock loop (TDTL). Fixed point theorems are used to analyze the behavior of the new loop. As such TDTL combines the two major approaches in DPLLs: the non-linear approach of sinusoidal DPLL based on fixed point analysis, and the linear tanlock approach based on the arctan phase detection. TDTL preserves the main advantages of the DTL despite its reduced structure. An application of TDTL in FSK demodulation is also considered. This idea of replacing HT by a time-delay may be of interest in other signal processing systems. Hence we have analyzed and compared the behaviors of the HT and the time-delay in the presence of additive Gaussian noise. Based on the above analysis, the behavior of the first and second-order TDTLs has been analyzed in additive Gaussian noise. Since DPLLs need time for locking, they are normally not efficient in tracking the continuously changing frequencies of non-stationary signals, i.e. signals with time-varying spectra. Nonstationary signals are of importance in synthetic and real life applications. An example is the frequency-modulated (FM) signals widely used in communication systems. Part-II of this thesis is dedicated for the IF estimation of non-stationary signals. For such signals the classical spectral techniques break down, due to the time-varying nature of their spectra, and more advanced techniques should be utilized. For the purpose of instantaneous frequency estimation of non-stationary signals there are two major approaches: parametric and non-parametric. We chose the non-parametric approach which is based on time-frequency analysis. This approach is computationally less expensive and more effective in dealing with multicomponent signals, which are the main aim of this part of the thesis. A time-frequency distribution (TFD) of a signal is a two-dimensional transformation of the signal to the time-frequency domain. Multicomponent signals can be identified by multiple energy peaks in the time-frequency domain. Many real life and synthetic signals are of multicomponent nature and there is little in the literature concerning IF estimation of such signals. This is why we have concentrated on multicomponent signals in Part-H. An adaptive algorithm for IF estimation using the quadratic time-frequency distributions has been analyzed. A class of time-frequency distributions that are more suitable for this purpose has been proposed. The kernels of this class are time-only or one-dimensional, rather than the time-lag (two-dimensional) kernels. Hence this class has been named as the T -class. If the parameters of these TFDs are properly chosen, they are more efficient than the existing fixed-kernel TFDs in terms of resolution (energy concentration around the IF) and artifacts reduction. The T-distributions has been used in the IF adaptive algorithm and proved to be efficient in tracking rapidly changing frequencies. They also enables direct amplitude estimation for the components of a multicomponent
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Martin, Daniel. "Analysis and Design of Phase Lock Loop Based Islanding Detection Methods." Thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/32967.

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As distributed generation penetrates the electric power grid at higher power levels, grid interface issues with distributed generation must be addressed. The current power system consists of central power generators, while the future power system will include many more distributed resources. The centralized power generation system is controlled by utility operators, but many distributed resources will not be controlled by utility operators. Distributed generation must use smart control techniques for high reliability and ideal grid interface. This thesis discusses the grid interface issue of anti-islanding. An electric island occurs when a circuit breaker in the electric power system trips. The distributed resource should disconnect from the electric grid for safety reasons. This thesis will give an overview of the possible methods. Each method will be analyzed using the ability to detect under the non-detection zone and the economic feasibility of the method. This thesis proposes two addition cases for analysis that exist in the electric power system: the effect of multiple methods in parallel in the non-detection zone and the possibility of a false trip caused by a load step. Multiple methods in parallel are possible because the islanding detection method is patentable, so each grid interface inverter company is likely to implement a different islanding detection method. The load step represents a load change when a load is switched on.
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Johannes, Michael T. "A fixed-point phase lock loop in a software defined radio." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2002. http://library.nps.navy.mil/uhtbin/hyperion-image/02sep%5FJohannes.pdf.

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Hardwicke, K. R. "A SELF TUNING PHASE-LOCKED LOOP." International Foundation for Telemetering, 1992. http://hdl.handle.net/10150/608941.

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International Telemetering Conference Proceedings / October 26-29, 1992 / Town and Country Hotel and Convention Center, San Diego, California
The uncertainty in the gain of voltage controlled crystal oscillators (VCXOs) used in the implementation of certain analog phase-locked loops (PLLs) suggests some form of automatic tuning algorithm, both for pretuning and during operation. This paper proposes an adaptive PLL (APLL) algorithm to fill this need for PLLs used in the recovery of tones in noise. This algorithm makes use of a resonant error algorithm to remove the effects of VCXO noise, measurement noise, and parasitic poles. Both classical convergence theorems and robustness theorems that indicate the functionality of the proposed algorithm are given. Finally, the implementation of this algorithm is considered.
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Kokel, Samuel John. "Retrodirective phase-lock loop controlled phased array antenna for a solar power satellite system." Texas A&M University, 2004. http://hdl.handle.net/1969.1/3047.

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This thesis proposes a novel technique using a phase-lock loop (PLL) style phase control loop to achieve retrodirective phased array antenna steering. This novel approach introduces the concept of phase scaling and frequency translation. It releases the retrodirective transmit-receive frequency ratio from integer constraints and avoids steering approximation errors. The concept was developed to achieve automatic and precise beam steering for the solar power satellite (SPS). The testing was performed using a transceiver converting a pair of received 2.9 GHz signals down to 10 MHz, and up converting two 10 MHz signals to 5.8 GHz. Phase scaling and conjugation was performed at the 10 MHz IF using linear XOR phase detectors and a PLL loop to synthesize a 10 MHz signal with conjugate phase. A phase control loop design is presented using PLL design theory achieving a full 2π steering range. The concept of retrodirective beam steering is also presented in detail. Operational theory and techniques of the proposed method are presented. The prototype circuit is built and the fabrication details are presented. Measured performance is presented along with measurement techniques. Pilot phase detectors and PCL achieve good linearity as required. The achieved performance is benchmarked with standards derived from likely performance requirements of the SPS and beam steering of small versus large arrays are considered.
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Bishop, Andrew J. "An adaptive phase-locked loop for a video CODEC /." Thesis, McGill University, 1992. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=69584.

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This dissertation will outline the integrated circuit design of an adaptive phase-locked loop that will be used to synchronize the sampling clock for a video speed analog to digital converter. The adaptive phase-locked loop (PLL) that will be described has not previously been used in the application of video synchronization. We shall demonstrate that this type of PLL will be able to out perform a static PLL in terms of its acquisition time, while still achieving a comparable noise performance. The PLL we shall describe will also be designed to be integrated on a single sub-micron BiCMOS chip. It is desired to place on this same chip a video-speed filter, and an analog to digital converter. For this reason we shall also provide some data to better evaluate the feasibility of designing a single chip that will perform these three functions.
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Tang, Yiwu. "Adaptive phase locked loop in multi-standard frequency synthesizers /." The Ohio State University, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=osu1486401895208464.

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Rideout, Howard. "A true-time delay beamforming system incorporating a wavelength tunable optical phase-lock loop." Thesis, University of Ottawa (Canada), 2007. http://hdl.handle.net/10393/27550.

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This thesis presents the study of a frequency-discriminator-aided optical phase-lock loop (OPLL) and its application to a fiber-Bragg-grating-based true-time delay (TTD) module for the purpose of phased-array antenna (PAA) beamforming. The TTD module uses uniform fiber Bragg gratings (FBGs) to form the delay lines of an FBG prism. The wavelengths from two external cavity laser diodes are phase-locked by the OPLL and applied to the FBG prism to achieve tunable time delays. The performance of the system is evaluated using a time-delay measurement experiment. The experimental time delays generated are compared with the theoretically designed values and are found to be in close agreement. Simulations of the radiation patterns generated from the measured time delays are found to closely match the steering angle designed for the system. To the best of our knowledge, this is the first time an OPLL has been used in conjunction with an FBG-based TTD beamforming module.
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Books on the topic "Adaptive Phase Lock Loop"

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Ruggles, Stephen L. Phase-lock-loop application for fiber optic receiver. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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W, Wills Robert, and Langley Research Center, eds. Phase-lock-loop application for fiber optic receiver. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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W, Wills Robert, and Langley Research Center, eds. Phase-lock-loop application for fiber optic receiver. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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Steblay, Bernard J. Evaluation of pulsed-phase-lock-loop technology applied to mine roof bolt load measurement. Washington, D.C: U.S. Dept. of the Interior, Bureau of Mines, 1990.

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Steblay, Bernard J. Evaluation of pulsed-phase-lock-loop technology applied to mine roof bolt load measurement. Washington, DC: Dept. of the Interior, 1989.

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Phase-lock-loop application for fiber optic receiver. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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National Aeronautics and Space Administration (NASA) Staff. Phase-Lock-Loop Application for Fiber Optic Receiver. Independently Published, 2018.

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Nikkhoo, Nasim. Phase-locked loop with adaptive supply noise cancellation. 2007.

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A Fixed-Point Phase Lock Loop in a Software Defined Radio. Storming Media, 2002.

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Book chapters on the topic "Adaptive Phase Lock Loop"

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Dhurga Devi, J. "Design of a Third Order Self Biased Adaptive Bandwidth Phase Lock Loop." In Lecture Notes in Electrical Engineering, 331–41. Singapore: Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-2999-8_27.

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Weik, Martin H. "phase-lock loop." In Computer Science and Communications Dictionary, 1261. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_13921.

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Ahuja, Bhupendra K. "Phase Lock Loop Design Techniques." In Selected Topics in RF, Analog and Mixed Signal Circuits and Systems, 71–93. New York: River Publishers, 2022. http://dx.doi.org/10.1201/9781003339441-4.

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Damzen, Michael J. "Self-Adaptive Loop Resonators with Gain Gratings." In Phase Conjugate Laser Optics, 367–406. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2005. http://dx.doi.org/10.1002/0471728446.ch11.

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Buchwald, Aaron, and Kenneth W. Martin. "6-GHz Phase-Lock Loop Using AlGaAs/GaAs HBTs." In Integrated Fiber-Optic Receivers, 415–33. Boston, MA: Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2243-0_9.

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Mukherjee, Arindum, Shuvajit Roy, and B. N. Biswas. "Effect of Transmission Delay in a Modified Hybrid Long Loop Phase Lock Loop." In Advances in Intelligent Systems and Computing, 9–14. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-74808-5_2.

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Thakre, Mohan P., and Nishant P. Matale. "Design and Development of Phase Lock Loop (PLL) Premised Islanding Investigative Techniques." In Control and Measurement Applications for Smart Grid, 279–97. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-7664-2_23.

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Teixeira, C. A., B. Direito, A. Dourado, M. P. Santos, and M. C. Loureiro. "A Phase Lock Loop (PLL) System for Frequency Variation Tracking during General Anesthesia." In IFMBE Proceedings, 1527–30. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-00846-2_377.

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Abeloos, Gaëtan, Martin Volvert, and Gaëtan Kerschen. "Experimental Characterization of Superharmonic Resonances Using Phase-Lock Loop and Control-Based Continuation." In Nonlinear Structures & Systems, Volume 1, 131–33. Cham: Springer International Publishing, 2012. http://dx.doi.org/10.1007/978-3-031-04086-3_19.

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Zhang, Liwei, Dongqing Zhao, Shaolei Peng, Caijie Zhu, and Zhongpan Li. "The Divergence Analysis of Kalman Filter Phase Lock Loop and Unbiased Correction of Frequency." In Lecture Notes in Electrical Engineering, 467–76. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-0029-5_41.

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Conference papers on the topic "Adaptive Phase Lock Loop"

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Al-Araji, Saleh R., and Kahtan A. Mezher. "Adaptive dual loop phase lock loop with improved performance." In 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS). IEEE, 2011. http://dx.doi.org/10.1109/newcas.2011.5981240.

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Almutairi, Fatima T., and Reem T. Almutairi. "Fast-lock phase-locked loop with adaptive controller in 0.18-μm CMOS." In 2016 5th International Conference on Electronic Devices, Systems and Applications (ICEDSA). IEEE, 2016. http://dx.doi.org/10.1109/icedsa.2016.7818470.

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Huang, Haiying, and Yayu Hew. "Wireless Vibration Sensing Without a Battery." In ASME 2012 Conference on Smart Materials, Adaptive Structures and Intelligent Systems. American Society of Mechanical Engineers, 2012. http://dx.doi.org/10.1115/smasis2012-8206.

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Abstract:
This paper presents the implementation and characterization of a low power wireless vibration sensor that can be powered by a flash light. The wireless system consists of two components, namely the wireless sensor node and the wireless interrogation unit. The wireless sensor node includes a wireless strain gauge that consumes around 6 mW, a signal modulation circuit, and a light energy harvesting unit. To achieve ultra-low power consumption, the signal modulation circuit was implemented using a voltage-controlled oscillator (VCO) to convert the strain gauge output to an intermediate frequency (IF) signal, which is then used to alter the impedance of the sensor antenna and thus achieves amplitude modulation of the backscattered antenna signal. A generic solar panel with energy harvesting circuit is used to power the strain sensor node continuously. The wireless interrogation unit transmits the interrogation signal and receives the amplitude modulated antenna backscattering, which can be down-converted to recover the IF signal. In order to measure the strains dynamically, a Phase Lock Loop (PLL) circuit was implemented at the interrogator to track the frequency of the IF signal and provide a signal that is directly proportional to the measured strain. The system features ultra-low power consumption, complete wireless sensing, solar powering, and portability. The application of this low power wireless strain system for vibration measurement is demonstrated and characterized.
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Reis, Antonio D., Jose F. Rocha, Atilio S. Gameiro, and Jose P. Carvalho. "Synchronizers based on carrier phase lock Loop and on symbol phase lock loop." In 2008 15th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2008). IEEE, 2008. http://dx.doi.org/10.1109/icecs.2008.4674845.

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Malyon, D. J., D. W. Smith, and R. Wyatt. "Semiconductor laser homodyne phase lock loop." In Conference on Lasers and Electro-Optics. Washington, D.C.: OSA, 1986. http://dx.doi.org/10.1364/cleo.1986.thj1.

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Carr, John P., and Brian M. Frank. "A 27 GHZ Phase-Lock Loop Phase Detector." In 2006 Canadian Conference on Electrical and Computer Engineering. IEEE, 2006. http://dx.doi.org/10.1109/ccece.2006.277679.

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Frigyik, Béla A., Zoltán Szabó, and Géza Kolumbán. "FALSE LOCK IN NARROWBAND SAMPLING PHASE-LOCKED LOOP." In Proceedings of the IEEE Workshop. WORLD SCIENTIFIC, 2000. http://dx.doi.org/10.1142/9789812792662_0059.

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Gorevoy, Andrew V. "Frequency modulation in microwave phase lock loop synthesizers." In 2009 International Siberian Conference on Control and Communications (SIBCON 2009). IEEE, 2009. http://dx.doi.org/10.1109/sibcon.2009.5044871.

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Lu, Weitao, Wenge Yang, and Jiacai Hong. "Analysis on Phase Lock Loop with frequency and phase dual assistance." In 2013 6th International Congress on Image and Signal Processing (CISP). IEEE, 2013. http://dx.doi.org/10.1109/cisp.2013.6743854.

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Salvia, J., R. Melamud, S. Chandorkar, H. K. Lee, Y. Q. Qu, S. F. Lord, B. Murmann, and T. W. Kenny. "Phase Lock Loop based Temperature Compensation for MEMS Oscillators." In 2009 IEEE 22nd International Conference on Micro Electro Mechanical Systems (MEMS). IEEE, 2009. http://dx.doi.org/10.1109/memsys.2009.4805469.

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Reports on the topic "Adaptive Phase Lock Loop"

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Rosignoli, D., and J. Rose. Design and test of a phase shifter utilizing phase loop lock (PLL). Office of Scientific and Technical Information (OSTI), October 1994. http://dx.doi.org/10.2172/1118897.

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