Relevant bibliographies by topics / 4H-SiC

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Academic literature on the topic '4H-SiC'

Author: Grafiati
Published: 4 June 2021
Last updated: 9 June 2025

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Journal articles on the topic "4H-SiC"

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Shilpa, A., S. Singh, and N. V. L. Narasimha Murty. "Spectroscopic performance of Ni/4H-SiC and Ti/4H-SiC Schottky barrier diode alpha particle detectors." Journal of Instrumentation 17, no. 11 (November 1, 2022): P11014. http://dx.doi.org/10.1088/1748-0221/17/11/p11014.

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Abstract Advancement in the growth of 4H-SiC with low micropipe densities (∼ 0.11 cm-2) in achieving high pure epitaxial layers, enabled the development of high-resolution 4H-SiC alpha particle Schottky radiation detectors for harsh environments. In particular, the study considers two types of 4H-SiC radiation detectors having Ni and Ti as Schottky contacts. They are fabricated by depositing Ni and Ti on 25 μm thick n-type 4H-SiC by epitaxially growing on 350 μm thick conducting SiC substrates. Electrical characterization and alpha spectral measurements performed on Ni/4H-SiC and Ti/4H-SiC SBDs are reported in this work. The spectral measurements were carried out using 241Am alpha emitting radioactive source. Ni/ 4H-SiC Schottky detector showed a better spectral response with 22.87 keV FWHM (∼ 0.416%) at a reverse bias of 150 V for 5.48 MeV alpha particles while Ti/4H-SiC Schottky detector achieved a resolution of 38.25 keV FWHM (∼ 0.697%) at 170 V reverse bias. This work presented spectral broadening analysis to understand the various factors affecting the energy resolution of the detectors. The extracted charge collection efficiencies (CCEs) are approximately 99% in both the detectors. In addition, polarization effects are not noticed in any of the fabricated detectors. The diffusion length of minority carriers (Lp ) is computed based on the drift-diffusion model by fitting the CCE curve as a function of applied bias, and the values are close to 9 μm and 7 μm for Ni/4H-SiC SBD and Ti/4H-SiC SBD detectors, respectively. Annealing at 400°C for 5 minutes in N2 ambient resulted in resolution of 23.98 keV FWHM (∼ 0.436%) for Ni/4H-SiC SBD detector at -170 V and 36.21 keV FWHM (∼ 0.661%) for Ti/4H-SiC SBD detector at -150 V. Overall Ni/4H-SiC SBD detectors showed superior spectral characteristics and superior resolution when compared to Ti/4H-SiC SBD detectors. However, the Ti/4H-SiC SBD detector fabricated in this work performed better than the previously reported work on a similar device structure. Hence, future work aimed at improving resolution of radiation detectors could also consider Ti/4H-SiC SBDs along with Ni/4H-SiC SBDs.
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Liu, Xiaoshuang, Yazhe Wang, Xi Zhang, Yunhao Lu, Rong Wang, Deren Yang, and Xiaodong Pi. "Crack healing behavior of 4H-SiC: Effect of dopants." Journal of Applied Physics 133, no. 14 (April 14, 2023): 145704. http://dx.doi.org/10.1063/5.0140922.

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We investigate the crack-healing mechanism of 4H silicon carbide (4H-SiC) and reveal the effect of dopants on the crack-healing behavior of 4H-SiC. Vickers indentation tests and thermal annealing are utilized to generate cracks and heal cracks in 4H-SiC, respectively. High-temperature thermal annealing in the air atmosphere is found to be capable of effectively healing indentation-induced cracks and releasing indentation-induced stress in undoped 4H-SiC by the formation and viscous flow of glass phase SiO2. Nitrogen (N) doping is found to assist the atomic diffusion of 4H-SiC. The crack healing of N-doped 4H-SiC is realized by the synergy of host solid diffusion and the padding of glassy SiO2. In contrast, vanadium (V) doping hinders the viscous flow of SiO2 and results in the incomplete healing of cracks in V-doped 4H-SiC. Although the generation of cracks lowers the bending strength of 4H-SiC, the healing of cracks by the padding of glassy SiO2 is found to effectively recover the bending strength of indented 4H-SiC samples. Our work opens a pathway to design thermal processing technologies to heal the cracks and enhance the mechanical properties of 4H-SiC wafers.
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Yoneda, S., Tomoaki Furusho, H. Takagi, S. Ohta, and Shigehiro Nishino. "Homoepitaxial Growth on 4H-SiC (03-38) Face by Sublimation Close Space Technique." Materials Science Forum 483-485 (May 2005): 129–32. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.129.

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For preliminary step toward fabrication of MOSFET using 4H-SiC 8) 3 (03 prepared by sublimation method, epitaxial growth of device quality 4H-SiC on 4H-SiC (0001) 8.0° off substrate was carried out and investigated. Smooth and specular surface of 4H-SiC (0001) plane was obtained by optimum growth condition. And epitaxial growth on 4H-SiC 8) 3 (03 and ) 8 3 (03 substrates were carried out with optimum growth conditions of 4H-SiC (0001). Smooth and specular surface was obtained on 4H-SiC 8) 3 (03 and ) 8 3 (03 plane. Growth rate of epilayers of 4H-SiC (0001), 8) 3 (03 and ) 8 3 (03 face were same. Oxidation rate of 4H-SiC (0001), ) 1 (000 , 8) 3 (03 and ) 8 3 (03 face was investigated. The oxidation rate was different depending on the faces. It was observed that the difference of oxidation rate of 8) 3 (03 and ) 8 3 (03 is mainly due to the difference of polarity similar to the case of reported for (0001) and ) 1 (000 .
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Yang, Guang, Hao Luo, Jiajun Li, Qinqin Shao, Yazhe Wang, Ruzhong Zhu, Xi Zhang, et al. "Discrimination of dislocations in 4H-SiC by inclination angles of molten-alkali etched pits." Journal of Semiconductors 43, no. 12 (December 1, 2022): 122801. http://dx.doi.org/10.1088/1674-4926/43/12/122801.

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Abstract Discrimination of dislocations is critical to the statistics of dislocation densities in 4H silicon carbide (4H-SiC), which are routinely used to evaluate the quality of 4H-SiC single crystals and homoepitaxial layers. In this work, we show that the inclination angles of the etch pits of molten-alkali etched 4H-SiC can be adopted to discriminate threading screw dislocations (TSDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) in 4H-SiC. In n-type 4H-SiC, the inclination angles of the etch pits of TSDs, TEDs and BPDs in molten-alkali etched 4H-SiC are in the ranges of 27°−35°, 8°−15° and 2°−4°, respectively. In semi-insulating 4H-SiC, the inclination angles of the etch pits of TSDs and TEDs are in the ranges of 31°−34° and 21°−24°, respectively. The inclination angles of dislocation-related etch pits are independent of the etching duration, which facilitates the discrimination and statistic of dislocations in 4H-SiC. More significantly, the inclination angle of a threading mixed dislocations (TMDs) is found to consist of characteristic angles of both TEDs and TSDs. This enables to distinguish TMDs from TSDs in 4H-SiC.
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Furusho, Tomoaki, Ryota Kobayashi, Taro Nishiguchi, M. Sasaki, K. Hirai, Toshihiko Hayashi, Hiroyuki Kinoshita, and Hiromu Shiomi. "Growth of Micropipe Free Crystals on 4H-SiC {03-38} Seeds." Materials Science Forum 527-529 (October 2006): 35–38. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.35.

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Growth of 4H-SiC bulk crystals on 4H-SiC {03-38} seeds was done. 4H-SiC {03-38} is obtained by inclining the c-plane toward <01-10> at a 54.7 degrees angle. Growth on the 4H-SiC {03-38} seed has the potential to achieve high quality crystals without micropipes and stacking faults. Micropipe-free c-plane 4H-SiC wafers were achieved by growth on the 4H-SiC {03-38} seed. A transmission X-ray topograph image of the micropipe free c-plane wafer revealed that there are no macroscopic defects with displacements.
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Alexander, Kazuaki Seki, Shigeta Kozawa, Yuji Yamamoto, Toru Ujihara, and Yoshikazu Takeda. "Polytype Stability of 4H-SiC Seed Crystal on Solution Growth." Materials Science Forum 679-680 (March 2011): 24–27. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.24.

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We investigated the polytype transition process from 4H-SiC to 6H-SiC during solution growth from the viewpoint of growth mode. The polarity dependence of the dominant grown polytype was similar to those of the sublimation growth and the CVD growth that 4H-SiC relatively grew stably on the C-face. Moreover, the polytype transition occurred during spiral growth. The 6H-SiC expanded to periphery overgrowing on the 4H-SiC. In contrast, there is no sign that 4H-SiC grew on 6H-SiC.
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Kojima, Kazutoshi, Akira Nakajima, Hisashi Yamada, and Shinsuke Harada. "(Invited) Improvement of Surface Morphology of Vicinal Off Angled 4H-SiC Epitaxial Wafer for GaN/SiC Hybrid Devices." ECS Meeting Abstracts MA2024-02, no. 36 (November 22, 2024): 2525. https://doi.org/10.1149/ma2024-02362525mtgabs.

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Wide gap semiconductor materials like SiC, GaN, and Ga2O3 are well-known as one of key technologies for realizing carbon neutrality. Indeed, SiC devices are used in many applications including electric vehicles, train systems, and consumer products. AlGaN/GaN HEMT devices also used in low voltage power source like AC adopters and 5G telecommunication systems. However, both devices have still improved issues. For SiC devices, the performance of MOS interface at the gate structure is still a big issue. On the other hand, GaN has superior performance of MOS interface and HEMT structure on the gate area. However, device processing reliability of GaN is worse compared with SiC, especially ion implantation process. So that, GaN is difficult to control avalanche characteristics compared with SiC. To solve this problem, GaN/SiC hybrid devices have been proposed [1]. In this device, a drift layer is constructed by 4H-SiC epilayer and a gate is constructed by GaN HEMT structure. By applying this structure, both superior performance of AlGaN/GaN HEMT at the gate area and controllability of avalanche characteristics of 4H-SiC drift layer can be realized. To realize this hybrid devices, AlGaN/GaN HEMT structure should be hetero epitaxially grown on 4H-SiC epilayer. This hetero epitaxial growth is a big issue on this study. As well known, the off angle of 4H-SiC substrate for GaN hetero epitaxy and 4H-SiC homo epitaxy is a quite different. The off angle for GaN is less than 0.5 degree and that for 4H-SiC is 4 degree. In our past study, we demonstrated that 4H-SiC layer could be grown on 0.75 degree off 4H-SiC Si-face substrate [2]. But this past result is not enough to grow GaN epilayers on such off angled 4H-SiC epitaxial wafers. By reducing wafer off angle less than 0.75 degree, large macro step bunching and other polytype was generated on 4H-SiC epitaxial wafer surface, and it is difficult to grow GaN layers on such 4H-SiC epitaxial wafers. In this study, we try to improve the surface morphology of 4H-SiC Si-face epitaxial wafer with off angle less than 0.5. To do this purpose, we have focused on an in-situ H2 etching process to suppress the generation of large step bunching on the grown 4H-SiC epitaxial layer surface. This in-situ H2 etching process is well known to make a risk to generate the step bunching on the 4H-SiC surface [3]. In addition, we confirmed the quality of the grown 4H-SiC epilayer by hetero epitaxially growing AlGaN/GaN HEMT layer on that grown 4H-SiC epilayer. As the result, we could obtain 4H-SiC epitaxial layer with supeclor surface morphology on 0.5 degree off 4H-SiC Si-face substrate by suppressing the in-situ H2 etching process before the growth process. From an AFM measurement, RMS values of grown 6 μm thick epitaxial layer surface are improved from about 2 nm to 0.2 nm by suppressing the in-situ H2 etching process before the growth process (Fig. 1). This value is the same as the 4H-SiC epitaxial layer grown on 4 degree off angled substrate. We also confiermed that othe polytypes were not included in grown epilayer by photoluminescenss imaging mesurement. The quality of the grown epilayer was also investigated by I-V charcterisics of Ni/4H-SiC SBD fablicated on grown epilayer surface. The blocking voltage about 600V and low n value of 1.02 were obtained as the yield of 80 % (N=10). We also hetero epitaxially grew AlGaN/GaN HEMT structures on grown 6 μm thick 4H-SiC epitaxial layer with 0.5 degree off angle. As the result, RMS values of 0.8 nm was obtained as the surface roughness of AlGaN layer which was the top layer of grown AlGaN/GaN HEMT structure. This value is the same as that layer grown on on-axis 4H-SiC substrate. We also investigated Vth dispersion from C-V measurement of capacitors fabricated on AlGaN layer of AlGaN/GaN HEMT structure. By reducing wafer off angle of 4H-SiC substrate from 4 to 0.5 degree, this dispersion was improved from ±0.98V to ±0.32V These results indicated that GaN layers with good surface morphology and high quality 4H-SiC homoepitaxial layer can be taken balance by using 0.5 off axis 4H-SiC substrate and the realization of GaN/SiC hybrid devices can be expected. [1] J. W. H. Jiang, Q. Jiang, and K. J. Chen, IEEE Trans. Electron Devices 63, 2469 (2016). [2] K. Kojima, K. Masumoto, S. Ito, A. Nagata, and H. Okumura, ECS transaction 58, 111 (2013). [3] K. Kojima, S. Kuroda, H. Okumura, and K. Arai, Mater. Sci. Forum 556-557, 85 (2007). Figure 1
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Naik, Harsh, and T. Paul Chow. "Comparison of Inversion Electron Transport Properties of (0001) 4H and 6H-SiC MOSFETs." Materials Science Forum 679-680 (March 2011): 678–81. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.678.

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The effect of using two different polytypes, 4H-SiC and 6H-SiC, on the performance of (0001) SiC MOSFETs has been studied. 4H-SiC and 6H-SiC MOSFETs have been fabricated with deposited gate oxides followed by oxidation in dry O2 or NO. Device parameters, particularly field-effect mobility, inversion sheet carrier concentration and Hall mobility have been extracted. We have also compared the mobility-limiting mechanisms of (0001) 4H and 6H-SiC MOSFETs and found that inversion mobility can be further improved in 4H-SiC, but not 6H-SiC.
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Moon, Jeong Hyun, Da Il Eom, Sang Yong No, Ho Keun Song, Jeong Hyuk Yim, Hoon Joo Na, Jae Bin Lee, and Hyeong Joon Kim. "Electrical Properties of the La2O3/4H-SiC Interface Prepared by Atomic Layer Deposition Using La(iPrCp)3 and H2O." Materials Science Forum 527-529 (October 2006): 1083–86. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1083.

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The La2O3 and Al2O3/La2O3 layers were grown on 4H-SiC by atomic layer deposition (ALD) method. The electrical properties of La2O3 on 4H-SiC were examined using metal-insulator-semiconductor (MIS) structures of Pt/La2O3(18nm)/4H-SiC and Pt/Al2O3(10nm)/La2O3(5nm)/4H-SiC. For the Pt/La2O3(18nm)/4H-SiC structure, even though the leakage current density was slightly reduced after the rapid thermal annealing at 500 oC, accumulation capacitance was gradually increased with increasing bias voltage due to a high leakage current. On the other hand, since the leakage current in the accumulation regime was decreased for the Pt/Al2O3/La2O3/4H-SiC MIS structure owing to the capped Al2O3 layer, the capacitance was saturated. But the saturation capacitance was strongly dependent on frequency, indicating a leaky interfacial layer formed between the La2O3 and SiC during the fabrication process of Pt/Al2O3(10nm)/ La2O3(5nm)/ 4H-SiC structure.
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Yang, Xiao Li, Ya Ni Pan, Chao Gao, Qing Rui Liang, Lu Ping Wang, Jiu Yang Zhang, Yu Han Gao, Xiu Xiu Ning, and Hong Yan Zhang. "Development of High Quality 8 Inch 4H-SiC Substrates." Solid State Phenomena 344 (June 6, 2023): 41–46. http://dx.doi.org/10.4028/p-x44871.

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8 inch 4H-silicon carbide (SiC) development faces challenges first from obtaining high-quality 8 inch SiC seed substrate, then reducing grown-in crystal residual stress and defects in the following crystal growth process. Here we report the diameter expansion process from 6 inch 4H-SiC seed substrate to 8 inch 4H-SiC crystal. Based on simulation and experimental results, it is deduced that an optimized radial temperature gradient (RTG) zone in the range of 0.10-0.12 °C/mm is essential for high-quality and efficient SiC crystal diameter expansion. According to the RTG calculation, diameter expansion process is designed and 8 inch 4H-SiC crystal as well as seed substrate is achieved. With the obtained seed substrate, high-quality 8 inch 4H-SiC crystal is developed and the following polished 4H-SiC substrate quality is characterized.
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Dissertations / Theses on the topic "4H-SiC"

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Florentín, Matthieu. "Irradiation impact on optimized 4H-SiC MOSFETs." Doctoral thesis, Universitat Politècnica de Catalunya, 2016. http://hdl.handle.net/10803/395187.

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Silicon (Si) power device’ technologies have reached a high maturity level, but current limitations on mechanic, temperature operation and electric performances require to investigate other semiconductor materials that can potentially compete with and overcome those border issues. This is the case of Silicon Carbide (SiC) and Gallium Nitride (GaN) which are becoming serious competitors to the Si due to their superior physical properties. Concerning SiC, the 4Hpolytype seems to be the best suitable candidate for high power MOSFETs according to its band gap, electric field strength, electron bulk mobility, and attainable threshold voltage, among others. But still, technological processes must be optimized in order to SiC MOSFETS can compete with their Si counterparts. This is the case of the gate oxidation process. A reduction of interface charge density is required for threshold voltage stability, and further improvements of the interface quality are also needed for high inversion mobility values. Once solved these problems, a path toward new perspectives of high power applications will be opened. This work is the direct continuation of the Aurore Constant’s work. It is focused on 4HSiC based devices, more specifically on the gate oxidation processes and their behaviour under different harsh environments. Up to now, most of the works carried out were focused on the improvement of the Silicon Dioxide-Silicon Carbide (SiO2/SiC) interface quality. Solving those problems would allow designing high-speed and low-switching losses MOSFETs. In the past work, the main strength was focused on a new surface pre-treatment and on a gate oxidation process. Results showed improved electrical performances. However, we are convinced that better values can be obtained by optimizing the post-oxidation annealing step, by performing surface counter doping or by performing special irradiation treatments. All the efforts of this work will oriented to the development of reliable SiC MOSFETs with improved electrical parameters, which can operate under harsh environments (like high temperature or proton/electron irradiated environment). Thus, the mains guidelines of this Ph. D. Thesis are in accordance with the following lines: 1. State of the art on various SiC related fields. 2. Electrical characterization processes. 3. Proton irradiation impact on 4H-SiC MOSFETs and charge build-up mechanisms theory at the SiO2/SiC interface. 4. Electron irradiation impact on 4H-SiC MOSFETs. 5. Gate oxidation and implantation processes optimization. 6. Robustness limit of the improved processes under irradiation environments.<br>Las tecnologías de dispositivos de potencia en silicio (Si) han alcanzado una gran madurez. Sin embargo, las limitaciones del Si debidas a sus restricciones mecánicas, térmicas y eléctricas hacen necesario otros materiales semiconductores que puedan competir con el Si y superar sus limitaciones. Este es el caso del Carburo de Silicio (SiC) y del Nitruro de Galio (GaN) que ya comienzan a ser serios competidores del Si debido a sus mejores propiedades físicas. En lo que respecta al SiC, el politipo 4H es el candidato más adecuado para la integración de MOSFETs de potencia debido, entre otros, a los valores del bandgap, campo eléctrico crítico, movilidad volumíca de los electrones y tensión umbral alcanzable. A pesar de estas ventajas teóricas del material, es necesario optimizar cada uno de los procesos tecnológicos involucrados en la fabricación de un MOSFET en SiC para que realmente pueda competir con su contrapartida en Si. Este es el caso del proceso de oxidación para la formación del dieléctrico de puerta. Concretamente, una buena estabilidad de la tensión umbral del componente requiere disminuir la densidad de cargas en la interfase óxido/semiconductor, y mejoras adicionales en la calidad de esta interfase son también necesarias para obtener altos valores de la movilidad de los portadores en el canal de inversión. La solución de los problemas tecnológicos anteriormente enunciados abrirá nuevas perspectivas a las aplicaciones de alta potencia. Este trabajo es una continuación directa del de Aurore Constant. Se centra en dispositivos basados en 4H-SiC, y más específicamente en los procesos de oxidación de puerta, y de sus comportamientos eléctricos en diferente ambientes de trabajo hostiles. Hasta la fecha, la mayor parte de la investigación se ha centrado en la mejora de la calidad de la interfase dióxido de silicio/carburo de silicio (SiO2/SiC). La solución de estos problemas debería permitir el diseño de MOSFETs muy rápidos y con pérdidas de conmutación muy bajas. El objetivo del trabajo previo de Aurore Constant fue encontrar un nuevo procedimiento de limpieza de la superficie antes de realizar la oxidación, y en definir un nuevo proceso de oxidación para la formación del dieléctrico de puerta. Los resultados obtenidos mostraron claras mejoras del comportamiento eléctrico de los componentes. Sin embargo, estamos convencidos que la mejora podría ser aún mayor optimizando la etapa del recocido post-oxidación, utilizando un proceso adicional de dopaje superficial, o realizando un adecuado proceso de irradiación. Todos los esfuerzos de este trabajo se han dirigido al desarrollo de MOSFETs en SiC fiables, con mejores características eléctricas, y capaces de trabajar en ambientes de alta temperatura y de irradiación protónica o electrónica. En resumen, las principales líneas de esta Tesis son las siguientes: 1. Estado del arte de los diferentes dominios de trabajo del SiC. 2. Procesos y técnicas de caracterización eléctrica. 3. Impacto de la irradiación de protones en MOSFETs fabricados en 4H-SiC, y descripción teórica de los mecanismos de creación de carga en la interfase SiO2/SiC. 4. Impacto de la irradiación electrónica en MOSFETs fabricados en 4H-SiC. 5. Optimización de los procesos de oxidación y de implantación. 6. Límite de robustez de los procesos tecnológicos optimizados en ámbitos irradiados.
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Robert, Teddy. "Spectroscopie des fautes d'empilement dans 4H-SiC." Montpellier 2, 2009. http://www.theses.fr/2009MON20166.

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Li, Mingyu Williams John R. "Ohmic contacts to implanted (0001) 4H-SiC." Auburn, Ala., 2009. http://hdl.handle.net/10415/1960.

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Haasmann, Daniel Erwin. "Active Defects in 4H–SiC MOS Devices." Thesis, Griffith University, 2015. http://hdl.handle.net/10072/367037.

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The research findings presented in this thesis have provided several key contributions towards a better understanding of the SiC–SiO2 interface in SiC MOS structures. The electrically active defects directly responsible for degrading the channel-carrier mobility in 4H–SiC MOSFETs have been identified and a novel technique to detect these defects in 4H–SiC MOS capacitors has been proposed and experimentally demonstrated. With a better understanding of defects at the SiC–SiO2 interface two alternative gate oxide growth processes have been proposed to overcome the practical limitations associated with current NO-nitridation techniques in high-volume, production based oxidation furnaces. This work therefore contributes to the wider research effort towards improving the performance of SiC MOSFETs in several ways. The following paragraphs summarise the key conclusions that have been obtained as a result of this study. Electrically Active Defects and the Channel-Carrier Mobility (Chapter 3) A critical review of defects at the SiC–SiO2 interface exposed a few key discrepancies in both the current understanding of the dominant defects responsible for channel-carrier mobility degradation in 4H–SiC MOSFETs and in the current approach to characterise and evaluate the SiC–SiO2 interface. Firstly, it was recognised that the Shockley-Read-Hall statistical model, based on thermally activated transport for traps spatially located at the semiconductor-oxide interface, cannot be directly applied to describe the transfer mechanism between free conduction band electrons and the shallow NITs near EC. This implication tends to suggest that the NITs near EC in SiC MOS structures cannot be accurately examined using traditional MOS characterisation techniques that are based on this statistical model. Secondly, in accordance with the studies conducted by Saks et. al. [1-3], it was realized that channel-carrier mobility degradation in 4H–SiC MOSFETs is primarily due to the significantly reduced free electron density in the inversion channel. In light of this understanding, the interfacial defects that actively trap channel electrons under strong inversion conditions were considered to be dominant in these devices as opposed to the NITs near EC that are typically examined using conventional MOS characterisation techniques on N-type MOS capacitors in depletion. To further support this hypothesis, a theoretical analysis of the inversion carrier concentration using the charge sheet model was conducted to demonstrate that the NITs with energy levels corresponding to strong inversion are of key importance to the channel-carrier mobility.<br>Thesis (PhD Doctorate)<br>Doctor of Philosophy (PhD)<br>Griffith School of Engineering<br>Science, Environment, Engineering and Technology<br>Full Text
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Horita, Masahiro. "Isopolytypic Growth of Nonpolar 4H-AlN on 4H-SiC and Its Device Applications." 京都大学 (Kyoto University), 2009. http://hdl.handle.net/2433/81830.

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Sejil, Selsabil. "Optimisation de l'épitaxie VLS du semiconducteur 4H-SiC : Réalisation de dopages localisés dans 4H-SiC par épitaxie VLS et application aux composants de puissance SiC." Thesis, Lyon, 2017. http://www.theses.fr/2017LYSE1170/document.

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L'objectif du projet VELSIC a été de démontrer la faisabilité de jonctions p+/n- profondes dans le semiconducteur 4H-SiC, de haute qualité électrique, comprenant une zone p++ réalisée par un procédé original d'épitaxie localisée à basse température (1100 – 1200°C), en configuration VLS (Vapeur - Liquide - Solide). Cette technique innovante de dopage par épitaxie utilise le substrat de SiC mono cristallin comme un germe de croissance sur lequel un empilement enterré de Al - Si est porté à fusion pour constituer un bain liquide, lequel est alimenté en carbone par la phase gazeuse. Cette méthode se positionne comme une alternative avantageuse à l'implantation ionique, actuellement utilisée par tous les fabricants de composants en SiC, mais qui présente des limitations problématiques encore non résolues à ce jour. Les travaux de thèse ont exploré toutes les facettes du processus complet de fabrication de diodes de test, avec une attention particulière portée sur l'optimisation de la gravure de cuvettes dans le substrat SiC. Le cœur des travaux a été concentré sur l'optimisation de l'épitaxie VLS localisée. L'étude a confirmé la nécessité de limiter la vitesse de croissance vers 1 µm/h pour conserver une bonne cristallinité du matériau épitaxié. Elle a également mis en évidence l'action directe du champ électromagnétique radiofréquence sur la phase liquide, conduisant à une très forte influence du diamètre des cuvettes gravées sur l'épaisseur du SiC déposé. Un remplissage quasiment complet des cuvettes de 1 µm de profondeur à très fort dopage p++ a été démontré. À partir des couches VLS optimisées, des démonstrateurs de types diodes p+/n- ont été fabriqués. Sur les meilleurs échantillons, sans passivation ni protection périphérique, des tensions de seuil en régime direct (entre 2,5 et 3 V) ont, pour la première fois, été mesurées, sans recourir à un recuit haute température après épitaxie. Elles correspondent aux valeurs attendues pour une vraie jonction p-n sur 4H-SiC. Des densités de courant de plusieurs kA/cm2 ont également pu être injectées pour des tensions situées autour de 5 - 6 V. En régime de polarisation inverse, aucun claquage n'est observé jusqu'à 400 V et les densités de courant de fuite à faible champ électrique dans la gamme 10-100 nA/cm2 ont été mesurées. Toutes ces avancées si situent au niveau de l'état de l'art pour des composants SiC aussi simples, toutes techniques de dopage confondues<br>The objective of the VELSIC project has been to demonstrate the feasibility of 1 µm deep p+/n- junctions with high electrical quality in 4H-SiC semiconductor, in which the p++ zone is implemented by an original low-temperature localized epitaxy process ( 1100 - 1200 °C ), performed in the VLS (Vapor - Liquid - Solid) configuration. This innovative epitaxy doping technique uses the monocrystalline SiC substrate as a crystal growth seed. On the substrate (0001-Si) surface, buried patterns of Al - Si stack are fused to form liquid islands which are fed with carbon by C3H8 in the gas phase. This method is investigated as a possible higher performance alternative to the ion implantation process, currently used by all manufacturers of SiC devices, but which still experiences problematic limitations that are yet unresolved to date. Although the main focus of the study has been set on the optimization of localized VLS epitaxy, our works have explored and optimized all the facets of the complete process of test diodes, from the etching of patterns in the SiC substrate up to the electrical I - V characterization of true pn diodes with ohmic contacts on both sides.Our results have confirmed the need to limit the growth rate down to 1 µm/h to maintain good crystallinity of the epitaxial material. It has also highlighted the direct action of the radiofrequency electromagnetic field on the liquid phase, leading to a very strong influence of the diameter of the etched patterns on the thickness of the deposited SiC. A nearly complete filling of the 1 µm deep trenches with very high p++ doping has been demonstrated. Using optimized VLS growth parameters, p+/n- diode demonstrators have been processed and tested. On the best samples, without passivation or peripheral protection, high direct-current threshold voltages, between 2.5 and 3 V, were measured for the first time without any high-temperature annealing after epitaxy. These threshold voltage values correspond to the expected values for a true p-n junction on 4H-SiC. Current densities of several kA/cm2 have also been injected at voltages around 5 - 6 V. Under reverse bias conditions, no breakdown is observed up to 400 V and low leakage current densities at low electric field, in the range 10 - 100 nA/cm2, have been measured. All these advances align with or exceed state-of-the-art results for such simple SiC devices, obtained using any doping technique
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7

Usman, Muhammad. "Impact of Ionizing Radiation on 4H-SiC Devices." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-60763.

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Electronic components, based on current semiconductor technologies and operating in radiation rich environments, suffer degradation of their performance as a result of radiation exposure. Silicon carbide (SiC) provides an alternate solution as a radiation hard material, because of its wide bandgap and higher atomic displacement energies, for devices intended for radiation environment applications. However, the radiation tolerance and reliability of SiC-based devices needs to be understood by testing devices  under controlled radiation environments. These kinds of studies have been previously performed on diodes and MESFETs, but multilayer devices such as bipolar junction transistors (BJT) have not yet been studied. In this thesis, SiC material, BJTs fabricated from SiC, and various dielectrics for SiC passivation are studied by exposure to high energy ion beams with selected energies and fluences. The studies reveal that the implantation induced crystal damage in SiC material can be partly recovered at relatively low temperatures, for damag elevels much lower than needed for amorphization. The implantation experiments performed on BJTs in the bulk of devices show that the degradation in deviceperformance produced by low dose ion implantations can be recovered at 420 oC, however, higher doses produce more resistant damage. Ion induced damage at the interface of passivation layer and SiC in BJT has also been examined in this thesis. It is found that damaging of the interface by ionizing radiation reduces the current gain as well. However, for this type of damage, annealing at low temperatures further reduces the gain. Silicon dioxide (SiO2) is today the dielectric material most often used for gate dielectric or passivation layers, also for SiC. However, in this thesis several alternate passivation materials are investigated, such as, AlN, Al2O3 and Ta2O5. These materials are deposited by atomic layer deposition (ALD) both as single layers and in stacks, combining several different layers. Al2O3 is further investigated with respect to thermalstability and radiation hardness. It is observed that high temperature treatment of Al2O3 can substantially improve the performance of the dielectric film. A radiation hardness study furthermore reveals that Al2O3 is more resistant to ionizing radiation than currently used SiO2 and it is a suitable candidate for devices in radiation rich applications.<br>QC 20120117
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Zeng, Yutong. "Tailored Al2O3/4H-SiC interface using ion implantation." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-90233.

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The effects of ion implantation of Al2O3interface to 4H-SiC epitaxial n- and p-type layers are presented. Different fluencies of carbon and nitrogen ions are used, as well as different annealing processes, with the aim to study the effects of implanted ions at the Al2O3/SiC interface. Capacitance-Voltage (C-V) behavior for fabricated MOS capacitors is studied before and after implantation to determine the effect of the implantation. Terman‟s method was employed to extract the density of interface traps (Dit) present at the Al2O3/SiC interface. Effective oxide charges density (Neff), present inside the Al2O3,was also evaluated by comparing the theoretical (ideal) C-V curve with the experimental C-V curves. It is generally known, and also proved by this study, that Al2O3 on n-type 4H-SiC shows significantly higher effective oxide charges density (Neff) and density of interface traps (Dit=3-4×1012 eV-1cm-2) compared to n-type SiO2/SiC MOS capacitors. However, the analysis of the collected data from N and C implanted n-type Al2O3/SiC samples show Dit values around 2-9×1011 eV-1cm-2, i.e., an effective reduction has been achieved by the ion implantation. The values of Neff for N ion implanted n-type Al2O3/SiC is as high as 1013 cm-2 in some cases, but C implanted n-type Al2O3/SiC sample shows exceptionally low Neff =1.8×1011 cm-2, which is comparable to SiO2/SiC based MOS capacitor. This result suggest that using C ion implantation before the formation of the oxide layer could be a promising approach to improving both oxide and interface properties of n-type 4H-SiC MOS capacitors.
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Karalas, Charilaos-Kimonas. "Process optimization for the 4H-SiC/SiO2 interface." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-174842.

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This thesis aims to optimize the process for the 4H-SiC/SiO2 interface formations. The experiments are made on metal-oxide-semiconductor (MOS) structures, where the semiconductor is an n-type epitaxially grown 4H-SiC thin film. The oxide is fabricated either with thermal oxidation, or by using plasma-enhanced chemical vapour deposition (PeCVD), utilising two different tools, Precision 5000 Mark II (P5000) and Plasmalab 80Plus system (Pekka). The deposition temperature is varied for the thermally grown oxide, while power, pressure and gas ratio of N2O/SiH4 is investigated for the PeCVD method. Also the post deposition annealing (PDA) temperature is studied for both techniques. The oxide formation and PDA is done in N2O ambient in order to study the effect of nitrogen passivation of the traps that exist at the interface of 4H-SiC/SiO2. After the dielectric formation the structures are electrically and structurally characterized. The electrical characterization is done by capacitance-voltage (CV) and current-voltage (IV) measurements while the structural characterization is done with atomic force microscopy (AFM). The density of interface traps (Dits) is extracted using the Terman method from CV data. It is observed that the flatband voltage drops almost to zero when the samples are annealed in nitrogen rich ambient, resulting in a more electrically uniform oxide. Also, Dits can also be reduced by nitrogen treatment when the oxide is deposited by the PeCVD technique. However, it appears that the Terman method cannot determine the amount of traps along the entire bandgap and it is clear that a large amount of Dits are still present closer to the conduction band. Finally, it is found that there is a larger spread in the data extracted from the samples deposited by P5000 in comparison to Pekka, indicating that Pekka is a more reliable tool for oxide deposition in SiC substrate.
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Suvanam, Sethu Saveda. "Radiation Hardness of 4H-SiC Devices and Circuits." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-199907.

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Advances in space and nuclear technologies are limited by the capabilities of the conventional silicon (Si) electronics. Hence, there is a need to explore materials beyond Si with enhanced properties to operate in extreme environments. In this regards, silicon carbide (4H-SiC), a wide bandgap semiconductor, provides suitable solutions. In this thesis, radiation effects of 4H-SiC bipolar devices, circuits and dielectrics for SiC are investigated under various radiation types. We have demonstrated for the first time the radiation hardness of 4H-SiC logic circuits exposed to extremely high doses (332 Mrad) of gamma radiation and protons. Comparisons with previously available literature show that our 4H-SiC bipolar junction transistor (BJT) is 2 orders of magnitude more tolerant under gamma radiation to existing Si-technology. 4H-SiC devices and circuits irradiated with 3 MeV protons show about one order of magnitude higher tolerance in comparison to Si. Numerical simulations of the device showed that the ionization is most influential in the degradation process by introducing interface states and oxide charges that lower the current gain. Due to the gain reduction of the BJT, the voltage reference of the logic circuit has been affected and this, in turn, degrades the voltage transfer characteristics of the OR-NOR gates. One of the key advantages of 4H-SiC over other wide bandgap materials is the possibility to thermally grow silicon oxide (SiO2) and process device in line with advanced silicon technology. However, there are still questions about the reliability of SiC/SiO2 interface under high power, high temperature and radiation rich environments. In this regard, aluminium oxide (Al2O3), a chemically and thermally stable dielectric, has been investigated. It has been shown that the surface cleaning treatment prior to deposition of a dielectric layer together with the post dielectric annealing has a crucial effect on interface and oxide quality. We have demonstrated a new method to evaluate the interface between dielectric/4H-SiC utilizing an optical free carrier absorption technique to quantitative measure the charge carrier trapping dynamics. The radiation hardness of Al2O3/4H-SiC is demonstrated and the data suggests that Al2O3 is better choice of dielectric for devices in radiation rich applications.<br><p>QC 20170119</p>
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Books on the topic "4H-SiC"

1

Chemical Mechanical Polishing Optimization for 4H-SiC. Storming Media, 2000.

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Electrical and Optical Characterization of Intrinsic and Ion- Implantation Induced Defects in 6H- and 4H-SiC. Storming Media, 1999.

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National Aeronautics and Space Administration (NASA) Staff. Study of Bulk and Elementary Screw Dislocation Assisted Reverse Breakdown in Low-Voltage (Less Than 250 V) 4h-Sic P(+)N Junction Diodes. Part 1; DC Properties. Independently Published, 2018.

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Book chapters on the topic "4H-SiC"

1

Gudjónsson, G., Fredrik Allerstam, Per Åke Nilsson, Hans Hjelmgren, Einar O. Sveinbjörnsson, Herbert Zirath, T. Rödle, and R. Jos. "High Frequency 4H-SiC MOSFETs." In Materials Science Forum, 795–98. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.795.

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Kalinina, Evgenia, Nikita B. Strokan, Alexandr M. Ivanov, A. Sadohin, A. Azarov, V. Kossov, R. Yafaev, and S. Lashaev. "4H-SiC High Temperature Spectrometers." In Materials Science Forum, 941–44. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.941.

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Starke, Ulrich, W. Y. Lee, C. Coletti, S. E. Saddow, Robert P. Devaty, and W. J. Choyke. "SiC Pore Surfaces: Surface Studies of 4H-SiC(1-102) and 4H-SiC(-110-2)." In Silicon Carbide and Related Materials 2005, 677–80. Stafa: Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.677.

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Sveinbjörnsson, Einar O., G. Gudjónsson, Fredrik Allerstam, H. Ö. Ólafsson, Per Åke Nilsson, Herbert Zirath, T. Rödle, and R. Jos. "High Channel Mobility 4H-SiC MOSFETs." In Silicon Carbide and Related Materials 2005, 961–66. Stafa: Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.961.

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Holmestad, R., JP Morniroli, JM Zuo, JCH Spence, and A. Avilov. "Quantitative CBED studies of SiC 4H." In Electron Microscopy and Analysis 1997, 137–40. Boca Raton: CRC Press, 2022. http://dx.doi.org/10.1201/9781003063056-35.

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Shishkin, Y., Yue Ke, Fei Yan, Robert P. Devaty, W. J. Choyke, and S. E. Saddow. "CVD Epitaxial Growth of 4H-SiC on Porous SiC Substrates." In Silicon Carbide and Related Materials 2005, 255–58. Stafa: Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.255.

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Clouter, M. J., Yue Ke, Robert P. Devaty, W. J. Choyke, Y. Shishkin, and S. E. Saddow. "Raman Spectra of a 4H-SiC Epitaxial Layer on Porous and Non-Porous 4H-SiC Substrates." In Materials Science Forum, 415–18. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.415.

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Noborio, Masato, Jun Suda, Svetlana Beljakowa, Michael Krieger, and Tsunenobu Kimoto. "4H-SiC MISFETs with Nitrogen-Containing Insulators." In Silicon Carbide, 235–65. Weinheim, Germany: Wiley-VCH Verlag GmbH & Co. KGaA, 2011. http://dx.doi.org/10.1002/9783527629077.ch10.

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Gudjónsson, G., Fredrik Allerstam, H. Ö. Ólafsson, Per Åke Nilsson, Hans Hjelmgren, Kristoffer Andersson, Einar O. Sveinbjörnsson, Herbert Zirath, T. Rödle, and R. Jos. "High Power-Density 4H-SiC RF MOSFETs." In Silicon Carbide and Related Materials 2005, 1277–80. Stafa: Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.1277.

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Chandrashekhar, M. V. S., Christopher I. Thomas, Hui Li, Michael G. Spencer, and Amit Lal. "Demonstration of a 4H SiC Betavoltaic Cell." In Silicon Carbide and Related Materials 2005, 1351–54. Stafa: Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.1351.

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Conference papers on the topic "4H-SiC"

1

Shi, Xiaodong, Yaoqin Lu, Sihao Wang, Veerendra Dhyani, Sakthi Sanjeev Mohanraj, Victor Leong, Jingjing Zhang, Haiyan Ou, and Di Zhu. "Type-II second-order nonlinear processes in silicon carbide nanophotonic waveguides." In CLEO: Science and Innovations, SM4N.3. Washington, D.C.: Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_si.2024.sm4n.3.

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Silicon carbide (SiC) is a promising material for integrated nonlinear and quantum photonics. We experimentally demonstrate type-II phase-matched second-harmonic generation and sum-frequency generation in 4H-SiC-on-insulator (SiCOI) nanophotonic waveguides.
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Shen, Sihao, Cailin Wang, Zhiwei Guo, and Wuhua Yang. "Characteristic Analysis of 200V 4H-SiC RESURF LDMOS." In 2024 3rd International Symposium on Semiconductor and Electronic Technology (ISSET), 144–48. IEEE, 2024. https://doi.org/10.1109/isset62871.2024.10779831.

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Burin, Jürgen, Christopher Hahn, Philipp Gaggl, Andreas Gsponer, Simon Waid, and Thomas Bergauer. "TCAD Simulations of Radiation Damage in 4H-SiC." In 2024 Austrochip Workshop on Microelectronics (Austrochip), 1–4. IEEE, 2024. http://dx.doi.org/10.1109/austrochip62761.2024.10716221.

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Liu, Bolin, Zaixing Wang, Jiachi Jiang, Linchang Wang, Bingqi Wang, and Yi Cai. "Performance Optimization of 4H-SiC MBL MPS Diode." In 2024 6th International Conference on Electronics and Communication, Network and Computer Technology (ECNCT), 279–82. IEEE, 2024. http://dx.doi.org/10.1109/ecnct63103.2024.10704450.

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Khan, Md Asif, Pydi Ganga Bahubalindruni, Alexander May, Chiara Rossi, and Mathias Rommel. "Temperature Sensing Readout Circuits with 4H-SiC Technology." In 2024 IEEE International Symposium on Smart Electronic Systems (iSES), 60–63. IEEE, 2024. https://doi.org/10.1109/ises63344.2024.00023.

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Wright, N. G. "4H-SiC power TCAD." In IEE Colloquium on New Developments in Power Semiconductor Devices. IEE, 1996. http://dx.doi.org/10.1049/ic:19960863.

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O'Neill, A., F. Arith, J. Urresti, K. Vasilevskiy, N. Wright, and S. Olsen. "High Mobility 4H-SiC MOSFET." In 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2018. http://dx.doi.org/10.1109/icsict.2018.8564911.

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Chen, G., Z. Y. Li, S. Bai, and P. Han. "Properties of homoepitaxial 4H-SiC and characteristics of Ti/4H-SiC Schottky barrier diodes." In Sixth International Conference on Thin Film Physics and Applications. SPIE, 2008. http://dx.doi.org/10.1117/12.792156.

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Liu, Xingfang, Jinmin Li, Guosheng Sun, Jin Ning, Yongmei Zhao, Jiaye Li, Muchang Luo, and Yiping Zeng. "Visible blind p+/p/n-/n+ UV 4H-SiC photodiodes based on 4H-SiC homoepilayers." In 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings. IEEE, 2006. http://dx.doi.org/10.1109/icsict.2006.306554.

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Kosa, A., J. Benkovska, L. Stuchlikova, D. Buc, F. Dubecky, and L. Harmatha. "Radiation hardness of 4H-SiC structuresues." In 2014 10th International Conference on Advanced Semiconductor Devices & Microsystems (ASDAM). IEEE, 2014. http://dx.doi.org/10.1109/asdam.2014.6998641.

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Reports on the topic "4H-SiC"

1

Wu, Jian, J. Hu, J. H. Zhao, X. Wang, X. Li, and T. Burke. High Mobility 4H-SiC Trenched Gate MOSFETs. Fort Belvoir, VA: Defense Technical Information Center, August 2006. http://dx.doi.org/10.21236/ada507271.

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Baliga, Jayant, and Pronita Mehrotra. 4H SiC Lateral Single Zone RESURF Diodes. Fort Belvoir, VA: Defense Technical Information Center, December 1998. http://dx.doi.org/10.21236/ada358231.

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Zhang, Jiahui, Petre Alexandrov, Jian H. Zhao, and Terry Burke. 1677V, 5.7 mohm.cm2 4H-SiC Bipolar Junction Transistors. Fort Belvoir, VA: Defense Technical Information Center, November 2004. http://dx.doi.org/10.21236/ada477420.

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Neudeck, Philip G., and Christian Fazi. Positive Temperature Coefficient of Breakdown Voltage in 4H-SiC PN Junction Rectifiers. Fort Belvoir, VA: Defense Technical Information Center, January 1998. http://dx.doi.org/10.21236/ada359099.

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Katulka, Gary L. Evaluation of Electrical Resistivity Characteristics of Metalized 4H-SiC for Application to Electric Guns. Fort Belvoir, VA: Defense Technical Information Center, April 1999. http://dx.doi.org/10.21236/ada362521.

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Mitra, Souvick, Mulpuri V. Rao, N. Papanicolaou, K. A. Jones, and M. Derenge. Deep-Level Transient Spectroscopy Study on Double Implanted N(+)-p and p(+)-n 4H-SiC Diodes. Fort Belvoir, VA: Defense Technical Information Center, January 2004. http://dx.doi.org/10.21236/ada424908.

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Swab, Jeffrey J., James W. McCauley, Brady Butler, Daniel Snoha, Donovan Harris, Andrew A. Wereszczak, and Mattison K. Ferber. Knoop Hardness on the (0001) Plane of 4H and 6H SiC Single Crystals Fabricated by Physical Vapor Transport. Fort Belvoir, VA: Defense Technical Information Center, May 2014. http://dx.doi.org/10.21236/ada600386.

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