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Journal articles on the topic '12-bit'

Author: Grafiati

Published: 30 June 2021

Last updated: 4 February 2022

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1

Kaur, Amandeep, Deepak Mishra, and Mukul Sarkar. "A 12-bit, 2.5-bit/Phase Column-Parallel Cyclic ADC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, no. 1 (January 2019): 248–52. http://dx.doi.org/10.1109/tvlsi.2018.2871341.

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2

Srivastava, Amit K., Atish Sharma, Tushar Raval, and D. Chenna Reddy. "CAMAC based 4-channel 12-bit digitizer." Journal of Physics: Conference Series 208 (February 1, 2010): 012022. http://dx.doi.org/10.1088/1742-6596/208/1/012022.

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3

Kolluri, M. P. V. "A 12-bit 500-ns subranging ADC." IEEE Journal of Solid-State Circuits 24, no. 6 (1989): 1498–506. http://dx.doi.org/10.1109/4.44985.

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4

Wells, S. C., G. J. Williamson, and S. E. Carrie. "Dithering for 12-bit true-color graphics." IEEE Computer Graphics and Applications 11, no. 5 (September 1991): 18–29. http://dx.doi.org/10.1109/38.90564.

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5

Sahoo, Bibhu Datta, and Behzad Razavi. "A 12-Bit 200-MHz CMOS ADC." IEEE Journal of Solid-State Circuits 44, no. 9 (September 2009): 2366–80. http://dx.doi.org/10.1109/jssc.2009.2024809.

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6

Neal, Brent. "Photoshop and 12-bit Digital Microscope Camera Images." Microscopy Today 12, no. 2 (March 2004): 24–25. http://dx.doi.org/10.1017/s1551929500051956.

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One problem facing owners of high-end digital microscope cameras and scanners is dealing with 12-bit TIFF format images. Because of a vagueness in the TIFF specification [1], some prograins do not load 12-bit TIFF images at all, or do not handle them gracefully. Unfortunately, Adobe Photoshop is one such program.A common problem with 12-bit images that do load in Photoshop is that the image appears to be totally black once loaded. This occurs when the camera stores the most significant bits of the image in the lower 12-bits of a 16-bit data space. Photoshop, when converting to its internal 16-bit representation, does not scale these properly, resulting in a low contrast image. This can present problems with viewing the images, or performing any processing or measurement steps that you might desire.

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7

Jayamani, Jayapramila, Noor Diyana Osman, Abdul Aziz Tajuddin, Zaker Salehi, Mohd Hanafi Ali, and Mohd Zahri Abdul Aziz. "Determination of computed tomography number of high-density materials in 12-bit, 12-bit extended and 16-bit depth for dosimetric calculation in treatment planning system." Journal of Radiotherapy in Practice 18, no. 03 (February 19, 2019): 285–94. http://dx.doi.org/10.1017/s1460396919000013.

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AbstractAimThe main aim was to examine the effect of bit depth on computed tomography (CT) number for high-density materials. Analysis of the CT number for high-density materials using 16-bit scanners will extend the CT scale that currently exists for 12-bit scanners and thus will be beneficial for use in CT–electron density (ED) curve in radiotherapy treatment planning system (TPS). Implementation of this extended CT scale will compensate for tissue heterogeneity during CT–ED conversion in treatment planning.Materials and methodsAn in-house built phantom with 10 different metal samples was scanned using 80, 100 and 120 kVp in two different CT scanners. A region of interest was set at the centre of the material and the mean CT numbers together with data deviation were determined. Dosimetry calculation was performed by applying a direct anterior beam on 12-bit, 12-bit extended and 16-bit.ResultsHigh-density materials (>4·34 g cm−3) in 16-bit depth provide disparities up to 44% compared to Siemens’ 12-bit extended. Influence of tube voltage showed a significant difference (p<0·05) in both bit depth and CT number of the gold and amalgam saturated in 16-bit depth. A 120 kVp energy illustrated a low variation on CT number for different scanners, but dosimetry calculation showed significant disparities at the metal interface in 12-bit, 12-bit extended and 16-bit.FindingsHigh-density materials require 16-bit scanners to obtain CT number to be implemented in treatment planning in radiotherapy. This also suggests that proper tube voltage together with correct CT–ED resulted in accurate TPS algorithm calculation.

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8

FAN Ci-en, 范赐恩, 吴敏渊 WU Min-yuan, 张立国 ZHANG Li-guo, 邓德祥 DENG De-xiang, and 曹庆源 CAO Qing-yuan. "Companding transformation display for 12 bit image data." Optics and Precision Engineering 19, no. 6 (2011): 1421–28. http://dx.doi.org/10.3788/ope.20111906.1421.

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9

Lu, Jing, Ho Joon Lee, Yong-Bin Kim, and Kyung Ki Kim. "A 12-bit Hybrid Digital Pulse Width Modulator." Journal of the Korea Industrial Information Systems Research 20, no. 1 (February 28, 2015): 1–7. http://dx.doi.org/10.9723/jksiis.2015.20.1.001.

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10

Рембеза, S. Rembeza, Кононов, and V. Kononov. "12-bit buttongenerator CMOS ADC with SOI-structure." Modeling of systems and processes 6, no. 4 (January 21, 2014): 53–55. http://dx.doi.org/10.12737/4047.

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The paper architecture CMOS ADC with digital forecasting an inlet of the analog signal and signal transformation errors sectional ADCS from analog to howl convolution. It is shown that 12-bit CMOS ADC with project standards 0.18 micron provides high accuracy and speed of conversion to 600...1000 million samples/s when operating in hard conditions.

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11

R P, Sheetal, and Ameet Chavan. "12 bit Time Interleaved ADC in 65nm Technology." International Journal of Electronics and Communication Engineering 2, no. 10 (October 25, 2015): 1–7. http://dx.doi.org/10.14445/23488549/ijece-v2i10p102.

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12

Jin-Sheng Wang and Chin-Long Wey. "A 12-bit 100-ns/bit 1.9-mW CMOS switched-current cyclic A/D converter." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 46, no. 5 (May 1999): 507–16. http://dx.doi.org/10.1109/82.769799.

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13

Chou, Fang-Ting, and Chung-Chih Hung. "A compact 12-bit DAC with novel bias scheme." IEICE Electronics Express 11, no. 17 (2014): 20140572. http://dx.doi.org/10.1587/elex.11.20140572.

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14

Wu, Xue, Wu Lu, and Qi Guo. "TID Effects on 12-Bit Digital-to-Analog Converter." Advanced Materials Research 677 (March 2013): 326–33. http://dx.doi.org/10.4028/www.scientific.net/amr.677.326.

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This Paper describes ionizing irradiation effects and annealing behavior on some commercial available CMOS high speed and high resolution Digital-to-Analog Converter —AD9742. AC and DC parameters are measured before and after radiation and annealing experiment. Results show that DC parameters are more sensitive than AC parameters, and all parameters are fully recovered after room-temperature and elevated-temperature annealing behaviors. Test facilities, results and analysis are presented in this paper in details.

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15

Suthaskumar, Muneswaran. "A 12-bit Hybrid DAC with Swing Reduced Driver." IOSR Journal of VLSI and Signal Processing 3, no. 2 (2013): 35–39. http://dx.doi.org/10.9790/4200-0323539.

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16

Frater, Michael R., and John F. Arnold. "Coding of 12-bit video from thermal imaging systems." Signal Processing: Image Communication 15, no. 10 (August 2000): 907–16. http://dx.doi.org/10.1016/s0923-5965(99)00038-7.

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17

Belcher, R. "A 12 bit 125 MHz ADC using direct interpolation." Measurement 28, no. 2 (September 2000): 77–83. http://dx.doi.org/10.1016/s0263-2241(99)00047-0.

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18

Kerth, D. A., N. S. Sooch, and E. J. Swanson. "A 12-bit, 1-MHz, two-step flash ADC." IEEE Journal of Solid-State Circuits 24, no. 2 (April 1989): 250–55. http://dx.doi.org/10.1109/4.18583.

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19

Bastos, J., A. M. Marques, M. S. J. Steyaert, and W. Sansen. "A 12-bit intrinsic accuracy high-speed CMOS DAC." IEEE Journal of Solid-State Circuits 33, no. 12 (1998): 1959–69. http://dx.doi.org/10.1109/4.735536.

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20

Tan, BTG, and LP Tay. "12-bit digital audio time delay using the 6809." Microprocessors and Microsystems 10, no. 9 (November 1986): 500–505. http://dx.doi.org/10.1016/0141-9331(86)90179-1.

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21

Xin-ye, Ni, Gao Liugang, Fang Mingming, and Lin Tao. "Application of Metal Implant 16-Bit Imaging: New Technique in Radiotherapy." Technology in Cancer Research & Treatment 16, no. 2 (June 23, 2016): 188–94. http://dx.doi.org/10.1177/1533034616649530.

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Objective: This study aimed to evaluate the computed tomography number and the variation of dose distribution based on 12-bit, 16-bit, and revised 16-bit images while the metal bars were inserted. Methods: The phantoms containing stainless steel, titanium alloy, and aluminum bar were scanned with computed tomography. These images were reconstructed with 12-bit and 16-bit imaging technologies. The “cupping artifacts” computed tomography value of the metal object revised by Matlab software was called the revised 16-bit image. The computed tomography values of these metal materials were analyzed. Two radiotherapy treatment plans were designed using the treatment plan system: (1) gantry was of 0° irradiation field and (2) gantry was of 90° and 270° for 2 opposed irradiation fields. The dose profile and dose–volume histogram of a structure of interest were analyzed in various images. The analysis was based on the radiotherapy plan differences between 3 different imaging techniques (12-bit imaging, 16-bit imaging, and revised 16-bit imaging technologies). Results: For low-density metal object (computed tomography value <3071 Hounsfield unit, HU), the radiotherapy plan results were consistent based on 3 different imaging techniques. For high-density metal object (computed tomography value >3071 HU), the difference in radiotherapy plan results was obvious. The dose of 12-bit was 15.9% higher than revised 16-bit on average for the downstream of titanium rod. For stainless steel, this number reached up to 42.7%. Conclusion: A 16-bit imaging technology of metal implants can distinguish the computed tomography value of different metal materials. Furthermore, the revised 16-bit imaging technology can improve the dose computational accuracy of radiotherapy plan with high-density metal implants.

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22

AB-AZIZ, M. T. S., A. MARZUKI, and Z. A. A. AZIZ. "12-BIT PSEUDO-DIFFERENTIAL CURRENT-SOURCE RESISTOR-STRING HYBRID DAC." Journal of Circuits, Systems and Computers 20, no. 04 (June 2011): 709–25. http://dx.doi.org/10.1142/s0218126611007566.

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This paper discusses a hybrid Digital-Analog Converter (DAC) architecture which is a combination of a binary-weighted resistor approach for eight bits in the least-significant-bit and thermometer coded approach for four bits in the most-significant-bit. The proposed design combines advantages of the binary-weighted resistor approach and thermometer coded approach. The final design is composed of two 12-bit DACs to achieve a pseudo differential output signal. The converter was designed with a Silterra 0.18 μm 1.8 V/3.3 V CMOS process technology. The post-layout simulation results show that this design achieves 12-bit resolution with INL and DNL of 0.375 LSB and 0.25 LSB, respectively. The power consumption is 6.291 mW when the designed DAC is biased with supply voltage equal to 3 V. The performance is accomplished with a design area of 230 μm × 255 μm.

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23

Smith, H. J., S. J. Bakke, B. Smevik, J. K. Hald, G. Moen, B. Rudenhed, and A. Abildgaard. "Comparison of 12-Bit and 8-Bit Gray Scale Resolution in MR Imaging of the CNS." Acta Radiologica 33, no. 6 (November 1, 1992): 505–11. http://dx.doi.org/10.3109/02841859209173201.

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24

Smith, H. J., S. J. Bakke, B. Smevik, J. K. Hald, G. Moen, B. Rudenhed, and A. Abildgaard. "Comparison of 12-Bit and 8-Bit Gray Scale Resolution in MR Imaging of the CNS." Acta Radiologica 33, no. 6 (January 1992): 505–11. http://dx.doi.org/10.1080/02841859209173201.

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25

Smith, H. J., S. J. Bakke, B. Smevik, J. K. Hald, G. Moen, B. Rudenhed, and A. Abildgaard. "Comparison of 12-Bit and 8-Bit Gray Scale Resolution in Mr Imaging of the CNS." Acta Radiologica 33, no. 6 (November 1992): 505–11. http://dx.doi.org/10.1177/028418519203300601.

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A reduction in gray scale resolution of digital images from 12 to 8 bits per pixel usually means halving the storage space needed for the images. Theoretically, important diagnostic information may be lost in the process. We compared the sensitivity and specificity achieved by 4 radiologists in reading laser-printed films of original 12-bit MR images and cathode ray tube displays of the same images which had been compressed to 8 bits per pixel using a specially developed computer program. Receiver operating characteristic (ROC) curves showed no significant differences between film reading and screen reading. A paired 2-tailed t-test, applied on the data for actually positive cases, showed that the combined, average performance of the reviewers was significantly better at screen reading than at film reading. No such differences were found for actually negative cases. Some individual differences were found, but it is concluded that gray scale resolution of MR images may be reduced from 12 to 8 bits per pixel without any significant reduction in diagnostic information.

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26

Vandenberg, JD, and Stefano Andriani. "A Review of 3D-LUT Performance in 10-bit and 12-bit HDR BT.2100 PQ." SMPTE Motion Imaging Journal 129, no. 2 (March 2020): 59–70. http://dx.doi.org/10.5594/jmi.2020.2965022.

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27

Halazonetis, Demetrios J. "What do 8-bit and 12-bit grayscale mean and which should I use when scanning?" American Journal of Orthodontics and Dentofacial Orthopedics 127, no. 3 (March 2005): 387–88. http://dx.doi.org/10.1016/j.ajodo.2004.07.025.

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28

Lee, Ho-Yong, Min-Soo Shim, Jongwhan Lee, Byung Seong Bae, and Kwang Sub Yoon. "A CMOS two-way time interleaved 12-bit SAR ADC with 6-bit MSBs sharing technique." Analog Integrated Circuits and Signal Processing 103, no. 2 (April 22, 2020): 337–43. http://dx.doi.org/10.1007/s10470-020-01655-4.

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29

Han, Jiaqi, Long Li, Guangyao Liu, Zhao Wu, and Yan Shi. "A Wideband 1 bit 12 × 12 Reconfigurable Beam-Scanning Reflectarray: Design, Fabrication, and Measurement." IEEE Antennas and Wireless Propagation Letters 18, no. 6 (June 2019): 1268–72. http://dx.doi.org/10.1109/lawp.2019.2914399.

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30

Harris, Richard W., Robert H. Brey, Yuan-Shu Chang, B. Diann Soria, and Laurence M. Hilton. "The Effects of Digital Quantization Error on Speech Intelligibility and Perceived Speech Quality." Journal of Speech, Language, and Hearing Research 34, no. 1 (February 1991): 189–96. http://dx.doi.org/10.1044/jshr.3401.189.

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The effects of digital quantization error upon speech intelligibility and perceived speech quality, for normally hearing subjects, were investigated for digitized speech processed to simulate 6-, 8-, 10-, 12-, 14-, and 16-bit integer conversion and 2-, 3-, 4-, 5-, 6-, and 7-bit floating-point conversion. For the integer data, there were no significant differences in speech intelligibility for 8- to 16-bit conversion. Only 6-bit integer conversion at 55 dB SPL resulted in a significant degradation in speech intelligibility. For the floating-point data, there were no significant differences in speech intelligibility for 2- to 7-bit floating-point conversion. However, results of the perceived quality experiment appeared to be more sensitive to differences among the various conditions. Speech processed using 12-, 14-, and 16-bit integer conversion was judged to be superior to speech processed using the 6-, 8-, and 10-bit integer conditions. Speech processed using 5-, 6-, and 7-bit floating-point conversion was judged to be superior to speech processed using 2-, 3-, and 4-bit floating-point conversion.

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31

Malik, Seema, and Sunil Nandal. "Design of 12 bit Successive Approximation Analog-to-Digital Converter." International Journal of Computer Applications 74, no. 6 (July 26, 2013): 1–6. http://dx.doi.org/10.5120/12886-9627.

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32

Fan, Xiang Ning, Hao Zheng, Yu Tao Sun, and Xiang Yan. "Design and Implementation of a 12-Bit 100MS/s ADC." Applied Mechanics and Materials 229-231 (November 2012): 1507–10. http://dx.doi.org/10.4028/www.scientific.net/amm.229-231.1507.

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In this paper, a 12-bit 100MS/s pipelined ADC is designed. Capacitance flip-around structure is used in sample and hold circuit, and bootstrap structure is adopted in sampling switch which has high linearity. Progressively decreasing technology is used to reduce power consumption and circuit area, where 2.5bit/stage structure is used in the first two stages, 1.5bit/stage structure is used for 3rd to 8th stages, and at the end of the circuit is a 2bit-flash ADC. Digital calibration is designed to eliminate the offset of comparators. Switched-capacitor dynamic comparator structure is used to further reduce the power consumption. The ADC is implemented by using TSMC 0.18m CMOS process with die area be 1.23mm×2.3mm. SNDR and SFDR are 65dB and 71.3dB, when sampling at 100MHz sampling clock. The current of the circuit is 96mA under 1.8V power supply.

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33

Zhihe Zhou and G. S. La Rue. "A 12-Bit Nonlinear DAC for Direct Digital Frequency Synthesis." IEEE Transactions on Circuits and Systems I: Regular Papers 55, no. 9 (October 2008): 2459–68. http://dx.doi.org/10.1109/tcsi.2008.920981.

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34

Seong, Myeong-U. "Design of a Low Area 12-bit 1MSps SAR ADC." Journal of Korean Institute of Information Technology 13, no. 2 (February 28, 2015): 1. http://dx.doi.org/10.14801/jkiit.2015.13.2.1.

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35

XIA, FAN, YIQIANG ZHAO, and GONGYUAN ZHAO. "A 12-bit 200-MHz CURRENT-STEERING DAC WITH CALIBRATION." Journal of Circuits, Systems and Computers 23, no. 04 (April 2014): 1450053. http://dx.doi.org/10.1142/s0218126614500534.

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In this paper, a 12-bit current-steering digital-to-analog converter (DAC) with high static and dynamic linearity is proposed. Compared to traditional intrinsic-accuracy DACs, the static linearity is obtained by a series of subsidiary DACs which can shorten the calibration cycle with smaller additional circuits. The presented DAC is based on the segmented architecture and layout has been carefully designed so that better synchronization among the current sources can be achieved. The DAC is implemented in a standard 0.18-μm CMOS technology and the current source block occupies less than 0.5 mm2. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) performance is ± 0.3 LSB and ± 0.5 LSB, respectively, and the spurious free dynamic range (SFDR) is 75 dB at 1 MHz signal frequency and 200 MHz sampling frequency.

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36

Hotta, M., T. Shimizu, K. Maio, K. Nakazato, and S. Ueda. "A 12-mW 6-bit video-frequency A/D converter." IEEE Journal of Solid-State Circuits 22, no. 6 (December 1987): 939–43. http://dx.doi.org/10.1109/jssc.1987.1052841.

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37

De Venuto, Daniela, David Tio Castro, Youri Ponomarev, and Eduard Stikvoort. "0.8μW 12-bit SAR ADC sensors interface for RFID applications." Microelectronics Journal 41, no. 11 (November 2010): 746–51. http://dx.doi.org/10.1016/j.mejo.2010.06.019.

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38

Rho, Sung-Chan, and Shin-Il Lim. "A 12-bit 100kS/s SAR ADC for Biomedical Application." International Journal of u- and e- Service, Science and Technology 9, no. 8 (August 31, 2016): 17–22. http://dx.doi.org/10.14257/ijunesst.2016.9.8.02.

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39

Zhu, Ruidong, Haiwei Chen, and Shin-Tson Wu. "Achieving 12-bit perceptual quantizer curve with liquid crystal display." Optics Express 25, no. 10 (May 2, 2017): 10939. http://dx.doi.org/10.1364/oe.25.010939.

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40

Baskoro, F., E. Sulistiyo, I. Basuki, A. Widodo, and A. P. Nurdiansyah. "Design of function generator using arduino due 12 bit dac." Journal of Physics: Conference Series 1569 (July 2020): 032097. http://dx.doi.org/10.1088/1742-6596/1569/3/032097.

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41

Ese, Zehra, and Waldemar Zylka. "Influence of 12-bit and 16-bit CT values of metals on dose calculation in radiotherapy using PRIMO, a Monte Carlo code for clinical linear accelerators." Current Directions in Biomedical Engineering 5, no. 1 (September 1, 2019): 597–600. http://dx.doi.org/10.1515/cdbme-2019-0150.

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AbstractIn this paper, the effect of computed tomography (CT) values of metals in 12-bit and 16-bit extended Hounsfield Unit (EHU) scale on dose calculations in radiotherapy treatment planning systems (TPS) were quantified. Dose simulations for metals in water environment were performed with the software PRIMO in 6MV photon mode. The depth dose profiles were analysed and the relative dose differences between the metals determined with 12-bit and 16-bit CT imaging, respectively, were calculated. Maximum dose differences of ΔAl = 3.0%, ΔTi = 4.5%, ΔCr = 6.2% and ΔCu = 11.6% were measured. In order to increase the accuracy of dose calculation on patients with implants, CT imaging in the EHU scale is recommended.

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42

Rikan, Behnam, Sang-Yun Kim, Hamed Abbasizadeh, Arash Hejazi, Reza Rad, Khuram Shehzad, Keum Hwang, Youngoo Yang, Minjae Lee, and Kang-Yoon Lee. "A 10- and 12-Bit Multi-Channel Hybrid Type Successive Approximation Register Analog-to-Digital Converter for Wireless Power Transfer System." Energies 11, no. 10 (October 8, 2018): 2673. http://dx.doi.org/10.3390/en11102673.

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This paper presents a successive approximation register (SAR) analog-to-digital converter (ADC) designed for a wireless power transfer system. This is a four–channel SAR ADC structure with 10-bit resolution for each channel, which can also be applied as a single 12-bit ADC. To reduce the area and the number of the required devices in the ADC module, a hybrid-type structure with capacitor and resistor DACs is applied, in which the resistor DAC is shared between channels and determines the seven least significant bits (LSB)s, while the capacitor DAC determines the three most significant bits (MSBs). For the 12-bit operation mode, and to reduce the number of capacitors required in the capacitor DAC, the capacitors of the four channels are shared to determine the five MSBs. A foreground calibration is applied to the capacitor DAC to remedy the gain and offset errors after fabrication. An additional low resistive path is also implemented in the resistor DAC for error correction. The conversion speed for 10- and 12-bit operations reaches up to 1 and 0.5 MS/s, respectively. The prototype ADC is designed in a 180 nm complementary metal-oxide semiconductor (CMOS) process. For 10- and 12-bit operating modes, this ADC module achieves up to 9.71 and 11.76 effective number of bits (ENOBs), respectively.

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43

LEE, Hyunui, Masaya MIYAHARA, and Akira MATSUZAWA. "A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E96.A, no. 12 (2013): 2508–15. http://dx.doi.org/10.1587/transfun.e96.a.2508.

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44

Jia, Hua-Yu, Gui-Can Chen, and Hong Zhang. "A high performance low power 12-bit 40MS/s pipelined ADC." IEICE Electronics Express 5, no. 11 (2008): 400–404. http://dx.doi.org/10.1587/elex.5.400.

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45

Cannone, Francesco, and Gianfranco Avitabile. "A 12-bit track and hold amplifier for giga-sample applications." Analog Integrated Circuits and Signal Processing 85, no. 3 (May 15, 2015): 451–60. http://dx.doi.org/10.1007/s10470-015-0556-5.

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46

Barnabà, O., G. Musitelli, R. Nardò, G. L. Raselli, and C. Tintori. "A 12-bit ADC with independent gates for fast neutron spectrometry." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 484, no. 1-3 (May 2002): 233–41. http://dx.doi.org/10.1016/s0168-9002(01)02052-6.

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47

Ostrem, Geir S., Oystein Moldsvor, and Oddvar Aaserud. "Compact 3 V, 70 MW, 12-bit video-speed CMOS ADC." Computer Standards & Interfaces 21, no. 2 (June 1999): 103. http://dx.doi.org/10.1016/s0920-5489(99)91941-4.

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48

Iroaga, Echere, and Boris Murmann. "A 12-Bit 75-MS/s Pipelined ADC Using Incomplete Settling." IEEE Journal of Solid-State Circuits 42, no. 4 (April 2007): 748–56. http://dx.doi.org/10.1109/jssc.2007.892154.

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49

Bacrania, K. "A 12-bit successive-approximation-type ADC with digital error correction." IEEE Journal of Solid-State Circuits 21, no. 6 (December 1986): 1016–25. http://dx.doi.org/10.1109/jssc.1986.1052644.

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50

Saputra, N., M. A. P. Pertijs, K. A. A. Makinwa, and J. H. Huijsing. "12-bit accurate voltage-sensing ADC with curvature-corrected dynamic reference." Electronics Letters 46, no. 6 (2010): 397. http://dx.doi.org/10.1049/el.2010.3337.

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