Zeitschriftenartikel: „Wafer-Scale mapping“

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Tajima, Michio, E. Higashi, Toshihiko Hayashi, Hiroyuki Kinoshita und Hiromu Shiomi. „Characterization of SiC Wafers by Photoluminescence Mapping“. Materials Science Forum 527-529 (Oktober 2006): 711–16. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.711.

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The effectiveness of room-temperature photoluminescence (PL) mapping was demonstrated for nondestructive detection of structural defects, such as dislocations, micropipes and stacking faults, in SiC wafers. PL spectra of bulk wafers were dominated by deep-level emissions due to Si vacancies, vanadium and undefined centers like UD-1 at room temperature, while those from epitaxial wafers involved near band-edge emission. We developed a whole-wafer PL intensity mapping system with a capability of zooming in on the area of interest with a spatial resolution as high as 1 μm, and showed that the mapping patterns agree well with the etch-pit patterns originating from the structural defects both on a wafer scale and on a microscopic scale. The intensity contrast around the defects varied depending on the emission band, suggesting differences in their interactions with impurities and point defects.

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Mackenzie, David M. A., Kristoffer G. Kalhauge, Patrick R. Whelan, Frederik W. Østergaard, Iwona Pasternak, Wlodek Strupinski, Peter Bøggild, Peter U. Jepsen und Dirch H. Petersen. „Wafer-scale graphene quality assessment using micro four-point probe mapping“. Nanotechnology 31, Nr. 22 (13.03.2020): 225709. http://dx.doi.org/10.1088/1361-6528/ab7677.

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Miner, C. J. „Wafer-scale temperature mapping for molecular beam epitaxy and chemical beam epitaxy“. Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 11, Nr. 3 (Mai 1993): 998. http://dx.doi.org/10.1116/1.586910.

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Buron, Jonas D., David M. A. Mackenzie, Dirch H. Petersen, Amaia Pesquera, Alba Centeno, Peter Bøggild, Amaia Zurutuza und Peter U. Jepsen. „Terahertz wafer-scale mobility mapping of graphene on insulating substrates without a gate“. Optics Express 23, Nr. 24 (16.11.2015): 30721. http://dx.doi.org/10.1364/oe.23.030721.

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Crovetto, Andrea, Patrick Rebsdorf Whelan, Ruizhi Wang, Miriam Galbiati, Stephan Hofmann und Luca Camilli. „Nondestructive Thickness Mapping of Wafer-Scale Hexagonal Boron Nitride Down to a Monolayer“. ACS Applied Materials & Interfaces 10, Nr. 30 (06.07.2018): 25804–10. http://dx.doi.org/10.1021/acsami.8b08609.

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Meshot, Eric R., Sei Jin Park, Steven F. Buchsbaum, Melinda L. Jue, Tevye R. Kuykendall, Eric Schaible, Leonardus Bimo Bayu Aji, Sergei O. Kucheyev, Kuang Jen J. Wu und Francesco Fornasiero. „High-yield growth kinetics and spatial mapping of single-walled carbon nanotube forests at wafer scale“. Carbon 159 (April 2020): 236–46. http://dx.doi.org/10.1016/j.carbon.2019.12.023.

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Tian, Mengchuan, Ben Hu, Haifang Yang, Chengchun Tang, Mengfei Wang, Qingguo Gao, Xiong Xiong et al. „Wafer Scale Mapping and Statistical Analysis of Radio Frequency Characteristics in Highly Uniform CVD Graphene Transistors“. Advanced Electronic Materials 5, Nr. 4 (13.02.2019): 1800711. http://dx.doi.org/10.1002/aelm.201800711.

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Yao, Yong Zhao, Yukari Ishikawa, Koji Sato, Yoshihiro Sugawara, Katsunori Danno, Hiroshi Suzuki und Takeshi Bessho. „Large-Area Mapping of Dislocations in 4H-SiC from Carbon-Face (000-1) by Using Vaporized KOH Etching near 1000 °C“. Materials Science Forum 740-742 (Januar 2013): 829–32. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.829.

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To solve the problem that no preferential chemical etching is available for dislocation revelation from the carbon-face (C-face) of 4H-SiC, a novel etching technique using vaporized KOH has been developed. It was found that this etching technique can reveal the three commonly found dislocation types, i.e., threading screw dislocations (TSDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) as large hexagonal, small hexagonal and triangular, respectively. Centimeter-scale dislocation mapping has been obtained, and the pit positions on the C-face were compared with those on the Si-face, to study the dislocation propagation behaviors across the sample thickness. We have found one-to-one correlation for nearly 96% of the TSDs, indicating a dominant proportion of TSDs penetrate the whole wafer thickness. The vaporized KOH etching technique has provided an effective and inexpensive method of making inch-scale mapping of dislocation distribution for the C-face epitaxial and bulky 4H-SiC.

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Shih, Po-Chou, Chun-Chin Hsu und Fang-Chih Tien. „Automatic Reclaimed Wafer Classification Using Deep Learning Neural Networks“. Symmetry 12, Nr. 5 (02.05.2020): 705. http://dx.doi.org/10.3390/sym12050705.

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Silicon wafer is the most crucial material in the semiconductor manufacturing industry. Owing to limited resources, the reclamation of monitor and dummy wafers for reuse can dramatically lower the cost, and become a competitive edge in this industry. However, defects such as void, scratches, particles, and contamination are found on the surfaces of the reclaimed wafers. Most of the reclaimed wafers with the asymmetric distribution of the defects, known as the “good (G)” reclaimed wafers, can be re-polished if their defects are not irreversible and if their thicknesses are sufficient for re-polishing. Currently, the “no good (NG)” reclaimed wafers must be first screened by experienced human inspectors to determine their re-usability through defect mapping. This screening task is tedious, time-consuming, and unreliable. This study presents a deep-learning-based reclaimed wafers defect classification approach. Three neural networks, multilayer perceptron (MLP), convolutional neural network (CNN) and Residual Network (ResNet), are adopted and compared for classification. These networks analyze the pattern of defect mapping and determine not only the reclaimed wafers are suitable for re-polishing but also where the defect categories belong. The open source TensorFlow library was used to train the MLP, CNN, and ResNet networks using collected wafer images as input data. Based on the experimental results, we found that the system applying CNN networks with a proper design of kernels and structures gave fast and superior performance in identifying defective wafers owing to its deep learning capability, and the ResNet averagely exhibited excellent accuracy, while the large-scale MLP networks also acquired good results with proper network structures.

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Lang, Simon, Alexandra Schewski, Ignaz Eisele, Christoph Kutter und Wilfried Lerch. „(Best Paper Award) Aluminum Josephson Junction Formation on 200mm Wafers Using Different Oxidation Techniques“. ECS Meeting Abstracts MA2023-01, Nr. 29 (28.08.2023): 1791. http://dx.doi.org/10.1149/ma2023-01291791mtgabs.

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For superconducting quantum circuits with a large number of Qubits, reproducible components are crucial for reducing entanglement decoherence. Particularly for reliable industrial manufacturing on full-scale 200 mm' wafers, a very high uniformity level is required to ensure sufficient coherence times. In the present work the special focus was put on manufacturing Al/AlOx/Al Josephson junctions (JJ), which are the most important component of many quantum circuit. Fully Al-based CMOS-compatible JJ’s were produced using a double dry etch process. After patterning the first Al metallization several oxidation processes have been investigated. Static oxidation has been performed by first removing the native AlOx in a multi-chamber system with Ar milling. The final tunneling oxide was controlled by applying a specific pressure in the chamber under a pure O2 atmosphere. Afterwards, without breaking the vacuum, the second Al metallization has been deposited by sputtering. Oxide thicknesses between 1 and 2.5 nm were achieved. A full mapping of the process homogeneity will be given. On the other hand, a dynamic recipe controlled plasma oxidation process was performed, where the native AlOx was first removed by a H2 plasma followed by a defined reoxidation with an oxygen plasma. The resulting oxides had thicknesses up to 10 nm. The second Al metallization was again deposited by sputtering. Both oxidation processes were carefully studied to understand the initial oxidation process of the aluminum surface. Special attention was devoted to the non-destructive removal of the native AlOx with respect to the Al interface. Because the oxide thicknesses varied between 1 and 10 nm, the transition between direct and Fowler-Nordheim tunneling could be investigated. The process-stability on full scale 200 mm wafers and on chip size could be determined via test structures as well as the resistance variation of the Josephson junctions. Furthermore, the electrical properties of the different oxides could be measured and analyzed on wafer level. These studies provide insight into the structure and composition of the aluminum oxides and the applicability for Qubits.

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Yates, Luke, Andrew T. Binder, Anthony Rice, Andrew M. Armstrong, Jeffrey Steinfeldt, Vincent M. Abate, Michael L. Smith et al. „(Invited) Recent Progress in Medium-Voltage Vertical GaN Power Devices“. ECS Meeting Abstracts MA2023-02, Nr. 35 (22.12.2023): 1682. http://dx.doi.org/10.1149/ma2023-02351682mtgabs.

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Vertical gallium nitride (GaN) power devices continue to garner interest in multiple power conversion applications requiring a medium-voltage (1.2 – 20 kV) capability. Currently, silicon carbide (SiC) is addressing this voltage range, however, with a comparable critical electric field and superior mobility, GaN is expected to offer advantages in applications where fast switching and avalanche breakdown response times are desired. While uses in electric vehicles, solid-state transformers, and renewable energy conversion are being actively explored, the potential of a vertical GaN device for electric grid protection in the form of an electromagnetic pulse arrestor is a unique proposition that requires very fast transient capabilities (<1 µs pulse widths with rise-times on the order of 10 ns). However, vertical GaN devices are significantly less mature than present SiC offerings. Specifically, low-doped, thick epitaxial growth of GaN via metal-organic chemical vapor deposition (MOCVD) still presents many challenges, and advancements in processing, manufacturability, and failure analysis are needed. In this work, we describe our efforts to address the above issues and advance the state-of-the-art in vertical GaN PN diode development. We have successfully demonstrated an MOCVD-grown, 50 µm thick, low-doped (<1015 cm-3) drift region on a GaN substrate that was processed into relatively large-area (1 mm2) PN diodes capable of achieving a 6.7 kV breakdown. Temperature-dependent breakdown was observed, consistent with the avalanche process. The devices consisted of a 4-zone step-etched junction termination extension (JTE), where the breakdown region was visualized via electroluminescence (EL) imaging. Ongoing work aims to scale the current capability of the medium-voltage diodes through a parallel interconnect design that negates defective or poor performing diodes. Further investigation of edge termination structures was explored using a bevel approach, where we studied the relationship between the bevel angle and p-doping. It was found that a very shallow angle of only 5° accompanied by a 500 nm p-region consisting of 3×1017 cm-3 Mg concentration resulted in a consistent 1.2 kV breakdown for an 8 µm thick, 1.6×1016 cm-3 doped drift region. EL imaging confirmed uniform breakdown, and temperature dependence was demonstrated. The bevel approach was then implemented on a diode structure with a 20 µm thick drift region capable of 3.3 kV breakdown, where an unclamped inductive switching (UIS) test was performed to evaluate the impact of a field plate design on avalanche uniformity and ruggedness. A parallel effort to establish a foundry process for vertical GaN devices has been underway. Initially, this focus was on comprehensive studies of GaN wafer metrology using capacitance-voltage (C-V) mapping, optical profilometry, and x-ray diffraction (XRD) mapping. A machine learning algorithm was implemented to identify defective regions and produce a yield prediction for each GaN wafer prior to processing. A hybrid edge termination structure consisting of implanted guard rings (GR) and JTEs was developed in coordination with a controlled experiment that varied the anode thickness, and therefore the remaining p-GaN after implantation. It was observed that thinner p-GaN regions under the JTE/GR region resulted in a significant (>100x) reduction in leakage current under reverse-bias conditions. This process has resulted in 1.2-kV-class devices with up to 18 A forward current for a 1 mm2 device with a specific on-resistance of 1.2 mOhm-cm2. The foundry effort has since been extended to 3.3-kV-class devices that utilize 25 µm thick drift layers with ~2-4×1015 cm-3 doping. These devices have demonstrated up to 3.8 kV breakdown with leakage currents <1 nA up to 3 kV. More than 40 wafers have been processed to date, resulting in >20,000 devices. Statistical variations in I-V and C-V characteristics will be discussed. Packaging process development and analysis are underway to develop electrical stress procedures and identify fundamental failure mechanisms. Finally, a pulse arrested spark discharge (PASD) setup, capable of up to 15 kV pulsed operation in 100 V steps, was implemented to quantify the time response of avalanche breakdown. Initial results on a packaged 800 V device showed a ~1 ns response time during breakdown, which reinforces the potential EMP grid protection applicability. This work was supported by the ARPA-E OPEN+ Kilovolt Devices Cohort directed by Dr.Isik Kizilyalli. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy of the United States Government.

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Yang, Dongxun, Jesse Henri Laarman und Masayoshi Tonouchi. „Sensitive Characterization of the Graphene Transferred onto Varied Si Wafer Surfaces via Terahertz Emission Spectroscopy and Microscopy (TES/LTEM)“. Materials 17, Nr. 7 (26.03.2024): 1497. http://dx.doi.org/10.3390/ma17071497.

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Graphene shows great potential in developing the next generation of electronic devices. However, the real implementation of graphene-based electronic devices needs to be compatible with existing silicon-based nanofabrication processes. Characterizing the properties of the graphene/silicon interface rapidly and non-invasively is crucial for this endeavor. In this study, we employ terahertz emission spectroscopy and microscopy (TES/LTEM) to evaluate large-scale chemical vapor deposition (CVD) monolayer graphene transferred onto silicon wafers, aiming to assess the dynamic electronic properties of graphene and perform large-scale graphene mapping. By comparing THz emission properties from monolayer graphene on different types of silicon substrates, including those treated with buffered oxide etches, we discern the influence of native oxide layers and surface dipoles on graphene. Finally, the mechanism of THz emission from the graphene/silicon heterojunction is discussed, and the large-scale mapping of monolayer graphene on silicon is achieved successfully. These results demonstrate the efficacy of TES/LTEM for graphene characterization in the modern graphene-based semiconductor industry.

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Abid, Poonam Sehrawat, Christian M. Julien und Saikh S. Islam. „Interface Kinetics Assisted Barrier Removal in Large Area 2D-WS2 Growth to Facilitate Mass Scale Device Production“. Nanomaterials 11, Nr. 1 (16.01.2021): 220. http://dx.doi.org/10.3390/nano11010220.

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Growth of monolayer WS2 of domain size beyond few microns is a challenge even today; and it is still restricted to traditional exfoliation techniques, with no control over the dimension. Here, we present the synthesis of mono- to few layer WS2 film of centimeter2 size on graphene-oxide (GO) coated Si/SiO2 substrate using the chemical vapor deposition CVD technique. Although the individual size of WS2 crystallites is found smaller, the joining of grain boundaries due to sp2-bonded carbon nanostructures (~3–6 nm) in GO to reduced graphene-oxide (RGO) transformed film, facilitates the expansion of domain size in continuous fashion resulting in full coverage of the substrate. Another factor, equally important for expanding the domain boundary, is surface roughness of RGO film. This is confirmed by conducting WS2 growth on Si wafer marked with few scratches on polished surface. Interestingly, WS2 growth was observed in and around the rough surface irrespective of whether polished or unpolished. More the roughness is, better the yield in crystalline WS2 flakes. Raman mapping ascertains the uniform mono-to-few layer growth over the entire substrate, and it is reaffirmed by photoluminescence, AFM and HRTEM. This study may open up a new approach for growth of large area WS2 film for device application. We have also demonstrated the potential of the developed film for photodetector application, where the cycling response of the detector is highly repetitive with negligible drift.

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Wadhwa, Riya, Sanjeev Thapa, Sonia Deswal, Pradeep Kumar und Mukesh Kumar. „Wafer-scale controlled growth of MoS2 by magnetron sputtering: from in-plane to inter-connected vertically-aligned flakes“. Journal of Physics: Condensed Matter, 19.01.2023. http://dx.doi.org/10.1088/1361-648x/acb4d1.

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Abstract Recently, Molybdenum disulfide (MoS2) has attracted great attention due to its unique characteristics and potential applications in various fields. The advancements in the field have substantially improved at the laboratory scale however, a synthesis approach that produces large area growth of MoS2 on a wafer scale is the key requirement for the realization of commercial two-dimensional technology. Herein, we report tunable MoS2 growth with varied morphologies via RF sputtering by controlling growth parameters. The controlled growth from in-plane to vertically-aligned MoS2 flakes has been achieved on a variety of substrates (Si, Si/SiO2, sapphire, quartz, and carbon fiber). Moreover, the growth of vertically-aligned MoS2 is highly reproducible and is fabricated on a wafer scale. The flakes synthesized on the wafer show high uniformity, which is corroborated by the spatial mapping using Raman over the entire 2-inch Si/SiO2 wafer. The detailed morphological, structural, and spectroscopic analysis reveals the transition from in-plane MoS2 to vertically-aligned MoS2 flakes. This work presents a facile approach to directly synthesize layered materials by sputtering technique on wafer scale. This paves the way for designing mass production of high-quality 2D materials, which will advance their practical applications by integration into device architectures in various fields.

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Chen, Fu Der, Ankita Sharma, David A. Roszko, Tianyuan Xue, Xin Mu, Xianshu Luo, Hongyao Chua, Patrick Guo-Qiang Lo, Wesley D. Sacher und Joyce Poon. „Development of wafer-scale multifunctional nanophotonic neural probes for brain activity mapping“. Lab on a Chip, 2024. http://dx.doi.org/10.1039/d3lc00931a.

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Optical techniques, such as optogenetic stimulation and functional fluorescence imaging, have been revolutionary for neuroscience by enabling neural circuit analysis with cell-type specificity. To probe deep brain regions, implantable light...

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Lagowski, Jacek, und Piotr Edelman. „Non-Contact Mapping of Fe Contamination in Oxidized Si Wafers with Sensitivity in Part-Per-Trillion Range“. MRS Proceedings 428 (1996). http://dx.doi.org/10.1557/proc-428-449.

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AbstractTraces of iron contamination as minute as one part per trillion atom fraction can be detrimental to the gate oxide integrity of the very thin oxides, 10 nm or less, used in the most advanced ICs. Fe contamination monitoring discussed in this paper is done with the surface photovoltage (SPV) technique which measures the minority carrier diffusion length, L, before and after the recombination efficiency of iron is enhanced by optical splitting of the iron-boron pairs. Wafer-scale mapping of iron gives fingerprints of contaminating tools and processes. In this paper, we also present an extension of SPV to oxidized wafers. In the past, such measurements were rendered impossible due to optical interference in the SiO2.The apparatus incorporates a whole wafer, optical Fe activation station and it provides whole wafer maps of Fe in a total time of 6 to 20 minutes per wafer, depending on probing density.

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Dinh, Khac Huy, Kevin Robert, Joelle Thuriot-Roukos, Marielle Huvé, Pardis Simon, David Troadec, Christophe Lethien und Pascal Roussel. „Wafer-Scale Performance Mapping of Magnetron-Sputtered Ternary Vanadium Tungsten Nitride for Microsupercapacitors“. Chemistry of Materials, 13.10.2023. http://dx.doi.org/10.1021/acs.chemmater.3c01803.

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Faifer, Vladimir N., Michael I. Current, Wojtek Walecki, Vitali Souchkov, Georgy Mikhaylov, Phuc Van, Tim Wong et al. „Non-contact Electrical Measurements of Sheet Resistance and Leakage Current Density for Ultra-shallow (and other) Junctions“. MRS Proceedings 810 (2004). http://dx.doi.org/10.1557/proc-810-c11.9.

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ABSTRACTA novel, non-contact method for determination of ultra-shallow junction sheet resistance and leakage current density has been developed based on monitoring the dynamics of photo-generated carriers by means of spatially separated capacitive probes. At light modulation frequencies of about 100 kHz, spatially resolved surface voltage signals give a direct measure of the junction sheet resistance, independent of the junction depth. At lower light modulation frequencies, the junction leakage current density is determined. Combining capacitive monitoring of modulated photo-generated free carriers with a precision wafer motion stage allows for rapid acquisition of sheet resistance and leakage data for efficient wafer-scale mapping applications.

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Lee, Brian, Duane S. Boning, Winthrop Baylies, Noel Poduje und John Valley. „Modeling and Mapping of Nanotopography Interactions with CMP“. MRS Proceedings 732 (2002). http://dx.doi.org/10.1557/proc-732-i1.5.

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AbstractAs the demand for planarity increases with advanced IC technologies, nanotopography has arisen as an important concern in shallow trench isolation (STI) chemical mechanical polishing (CMP) processes. Previous work has shown that nanotopography, or small surface height variations on raw wafers 20 to 50 nm in amplitude extending across millimeter scale lateral distances, can result in substantial CMP-induced localized thinning of surface films such as oxides or nitrides used in STI [1]. This interaction with CMP depends both on characteristics of the wafer such as heights and spatial wavelengths of the nanotopography, and characteristics of the CMP process including the planarization length or pad stiffness.In this paper we review and extend the previous work on modeling of nanotopography. Three approaches to predicting the post-CMP oxide thinning due to nanotopography are compared. The first approach is the simplest, where a statistical aggregate effect is computed. Following the work of Schmolke [2], a transfer coefficient α is found which captures the portion of the nanotopography that is correlated with the final oxide thinning. The second approach is the most detailed, depending on explicit numerical simulation of pad elastic properties. In this case, a contact wear simulation is used to produce a detailed map of oxide thickness corresponding to any given pre-measured nanotopography wafer surface. The third approach is a signal processing method, sitting somewhere between the previous two extremes in terms of approximation and complexity. In this last case, a two-dimensional transfer function is extracted which captures the spatial smoothing accomplished by CMP. This filter can then be applied efficiently to premeasured nanotopography maps for other wafers to predict the final oxide thicknesses.We also propose a predictive mapping of post-CMP oxide or nitride thicknesses to provide insight into the relative goodness of a wafer measured for nanotopography which is to be subjected to a CMP process. Specifically, we suggest that for post-CMP impact, maps and computation of areas having insufficient oxide clearing, or having final nitride thickness outside of required ranges, are useful and practical. Such device failure potential maps complement the fundamental nanotopography height map data and metrics based directly on that data, and enable evaluation, comparison, and development of improved wafers and STI CMP processes.

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Edelman, Piotr, Jacek Lagowski und Lubek Jastrzebski. „Surface Charge Imaging in Semiconductor Wafers by Surface Photovoltage (SPV)“. MRS Proceedings 261 (1992). http://dx.doi.org/10.1557/proc-261-223.

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ABSTRACTWe present fast, wafer-scale imaging of the surface charge achieved via non-contact measurement of the surface potential barrier by surface photovoltage (SPV) under high excitation levels. The approach is capable of resolving surface charge differences as small as 108 q/cm2. Fundamentals of surface charge imaging are discussed, and the method is compared with standard SPV contamination mapping. Examples include problems relevant to silicon IC fabrication and surface charge maps of GaAs and InP.

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Su, Chanmin, Shuiqing Hu, Yan Hu, Natalia Erina und Andrea Slade. „Quantitative Mechanical Mapping of Biomolecules in Fluid“. MRS Proceedings 1261 (2010). http://dx.doi.org/10.1557/proc-1261-u01-05.

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AbstractThough atomic force microscopy (AFM) interrogates biological materials through mechanical interactions, achieving quantitative mechanical information such as modulus and adhesion at high resolution has been a challenging task. A technology for nanometer scale mechanical property mapping, peak force tapping (PFT), was developed to achieve high resolution imaging and quantitative mechanical measurements simultaneously. PFT controls instantaneous interaction force and record force spectroscopy at each pixel to calculate mechanical properties. A feedback loop maintains a constant peak force, a local maximum point in the force spectroscopy, at the level of Pico Newtons throughout the imaging process. Such high precision force controls enable application of ultra-sharp probe to image biological samples in vitro and achieve molecular resolution in protein membranes. More importantly a full suite of mechanical properties, modulus, adhesion, energy dissipation and deformation are mapped concurrent with topographic imaging. To calculate nanomechanical properties reliably cantilever spring constant and tip shape were calibrated systematically. A method to accurately determine cantilever spring constant, capable of wafer scale cantilever calibration, was developed and tested against traceable force methods. With the knowledge of tip shape, derived from morphological dilation method using a reference sample, mechanical properties measured at the nanometer scale was compared with bench mark materials ranging from 0.7 MPa to 70 GPa. The same method was also applied to OmpG membranes, Lambda DNA strings, as well as live cells. The limitation of the measurement accuracy in biology samples will be discussed.

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Whelan, Patrick R., Domenico De Fazio, Iwona Pasternak, Joachim D. Thomsen, Steffen Zelzer, Martin O. Mikkelsen, Timothy J. Booth et al. „Mapping nanoscale carrier confinement in polycrystalline graphene by terahertz spectroscopy“. Scientific Reports 14, Nr. 1 (07.02.2024). http://dx.doi.org/10.1038/s41598-024-51548-z.

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AbstractTerahertz time-domain spectroscopy (THz-TDS) can be used to map spatial variations in electrical properties such as sheet conductivity, carrier density, and carrier mobility in graphene. Here, we consider wafer-scale graphene grown on germanium by chemical vapor deposition with non-uniformities and small domains due to reconstructions of the substrate during growth. The THz conductivity spectrum matches the predictions of the phenomenological Drude–Smith model for conductors with non-isotropic scattering caused by backscattering from boundaries and line defects. We compare the charge carrier mean free path determined by THz-TDS with the average defect distance assessed by Raman spectroscopy, and the grain boundary dimensions as determined by transmission electron microscopy. The results indicate that even small angle orientation variations below 5° within graphene grains influence the scattering behavior, consistent with significant backscattering contributions from grain boundaries.

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Pearton, S. J., K. M. Lee, N. M. Haegel, C. J. Huang, S. Nakahara, F. Ren, V. Scarpelli, K. T. Short und S. M. Vernon. „Material and Device Properties of 3” Diameter GaAs-on-Si with Buried P-type Layers“. MRS Proceedings 144 (1988). http://dx.doi.org/10.1557/proc-144-317.

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ABSTRACTTwo problems facing MOCVD grown GaAs-on-Si are firstly, scale up to 3” and greater wafer diameter with acceptably uniform layer thicknesses and electrical and optical properties, and secondly the achievement of adequate device isolation through the use of buffer layers of low doping density (≤1014 cm−3). We have investigated the thickness uniformity and 300K photoluminescence intensity of 3” Ø, MOCVD grown GaAs layers on Si substrates by whole wafer mapping of these parameters, and correlate the variations found with the gas flow direction during deposition of the GaAs. We have overcome the high background doping densities (n =5−20 × 1015 cm2) in the material by a buried Be implant (1−5 × 1012 at 120 keV) followed by 850°C, 3 sec annealing. This provides adequate isolation for MESFETS and we fabricated such devices with gm's of 160-175 mS mm−1 using our standard process. These values are similar to homoepitaxial MESFETS fabricated in the same way.

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Zhuang, Qiuna, Kuanming Yao, Mengge Wu, Zhuogui Lei, Fan Chen, Jiyu Li, Quanjing Mei et al. „Wafer-patterned, permeable, and stretchable liquid metal microelectrodes for implantable bioelectronics with chronic biocompatibility“. Science Advances 9, Nr. 22 (02.06.2023). http://dx.doi.org/10.1126/sciadv.adg8602.

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Implantable bioelectronics provide unprecedented opportunities for real-time and continuous monitoring of physiological signals of living bodies. Most bioelectronics adopt thin-film substrates such as polyimide and polydimethylsiloxane that exhibit high levels of flexibility and stretchability. However, the low permeability and relatively high modulus of these thin films hamper the long-term biocompatibility. In contrast, devices fabricated on porous substrates show the advantages of high permeability but suffer from low patterning density. Here, we report a wafer-scale patternable strategy for the high-resolution fabrication of supersoft, stretchable, and permeable liquid metal microelectrodes (μLMEs). We demonstrate 2-μm patterning capability, or an ultrahigh density of ~75,500 electrodes/cm 2 , of μLME arrays on a wafer-size (diameter, 100 mm) elastic fiber mat by photolithography. We implant the μLME array as a neural interface for high spatiotemporal mapping and intervention of electrocorticography signals of living rats. The implanted μLMEs have chronic biocompatibility over a period of eight months.

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Marinskiy, D., J. Lagowski, M. Wilson, A. Savtchouk, L. Jastrzebski und D. DeBusk. „Small Signal AC-Surface Photovoltage Technique for Non-Contact Monitoring of Near Surface Doping and Recombination-Generation in the Depletion Layer“. MRS Proceedings 591 (1999). http://dx.doi.org/10.1557/proc-591-225.

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ABSTRACTSmall signal non-contact ac-SPV method for monitoring near surface doping (NSD) in silicon has recently been introduced in commercial diagnostic tools. High chopping frequency light with a submicron penetration depth is used to generate small SPV signal and this signal is in turn monitored using a transparent pickup electrode. This technique has the advantage of producing fast, non-destructive full wafer measurement. Under certain conditions, the magnitude of this ac-SPV signal is inversely proportional to the depletion layer capacitance. If a depletion layer barrier height is known this allows the calculation of the concentration of ionized donors or acceptors in the depletion layer. NSD measurements by ac-SPV method were typically done for doping concentrations up to about 1016 cm−3. Only recently this range has been extended to 1018 cm−3, making it a very attractive technique for monitoring low and medium dose implants and especially for wafer scale mapping of implant uniformity and activation efficiency. In addition, the frequency dependence of the SPV signal provides a mean for evaluating the minority carrier lifetime in the near surface region of bulk and epitaxial wafers.The influence of surface/interface traps upon small ac-SPV signal has never been fully understood. This paper quantifies the role of interface traps in the monitoring of NSD. The effect of typical surface treatments such as HF, SCI and SCI+SC2 wafer cleans are examined.

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Fu, Wai Yuen, und Hoi Wai Choi. „Development of chipscale InGaN RGB displays using strain-relaxed nanosphere-deﬁned nanopillars“. Nanotechnology, 02.04.2022. http://dx.doi.org/10.1088/1361-6528/ac6399.

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Abstract Chip-scale red, green and blue (RGB) light emission on an InGaN/GaN multi-quantum well (MQW) wafer adopting a top-down fabrication approach is demonstrated in this study, facilitated by shadow-masked nanosphere lithography for precise site-controlled nano-patterning. Exploiting the strain relaxation mechanism by fabricating arrays of nanosphere-deﬁned nanopillars of two diﬀerent dimensions utilizing a sequential shadow-masked nanosphere coating approach into the blue and green light-emitting pixel regions on a red-light emitting InGaN/GaN wafer, RGB light emission from a monolithic chip is demonstrated. The red, green and blue light-emitting pixels emit at 645 nm – 680 nm, 510 nm – 521 nm and 475 nm – 498 nm respectively, achieving a maximum color gamut of 60% NTSC and 72% sRGB. Dimensional ﬂuctuations of the nanopillars of 73% and 71% for the green and blue light-emitting pixels, respectively, are estimated from scanning electron microscope (SEM) images of the fabricated device, corresponding to ﬂuctuations in spectral blue-shifts of 5.4 nm and 21.2 nm as estimated by strain-coupled k . p Schrödinger calculations, consistent with observations from -PL mapping which shows deviations of emission wavelengths for the red, green and blue light-emitting pixels to be 8.9 nm, 14.9 nm and 23.7 nm, respectively. The RGB pixels are also conﬁgured in a matrixaddressable conﬁguration to form an RGB microdisplay, demonstrating the feasibility of the approach towards chip-scale color displays.

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Alcer, David, Lukas Hrachowina, Dan Hessman und Magnus T. Borgström. „Processing and Characterization of Large Area InP Nanowire Photovoltaic Devices“. Nanotechnology, 12.04.2023. http://dx.doi.org/10.1088/1361-6528/accc37.

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Abstract III−V nanowire (NW) photovoltaic devices promise high efficiencies at reduced materials usage. However, research has so far focused on small devices, mostly ≤ 1 mm². In this study, the upscaling potential of axial junction InP NW photovoltaic devices is investigated. Device processing was carried out on a full 2” wafer, with device sizes up to 1 cm², which is a significant increase from the mm-scale III−V NW photovoltaic devices published previously. The short-circuit current density of the largest 1 cm² devices, in which 460 million NWs are contacted in parallel, is on par with smaller devices. This enables a record power generation of 6.0 mW under AM1.5G llumination, more than one order of magnitude higher than previous III−V NW photovoltaic devices. On the other hand, the fill factor of the larger devices is lower in comparison with smaller devices, which affects the device efficiency. By use of electroluminescence mapping, resistive losses in the indium tin oxide (ITO) front contact are found to limit the fill factor of the large devices. We use combined light-beam induced current (LBIC) and photoluminescence (PL) mapping as a powerful characterization tool for NW photovoltaic devices. From the LBIC and PL maps, local defects can be identified on the fully processed devices.

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Chu, Jinn P., Yi-Jui Yeh, Chih-Yu Liu, Yi-Xiang Yang, Alfreda Krisna Altama, Ting-Hao Chang, Wei-Hung Chiang, Pakman Yiu und Kuo-Lun Tung. „Core-shell metallic nanotube arrays for highly sensitive surface-enhanced Raman scattering (SERS) detection“. Journal of Vacuum Science & Technology A 41, Nr. 6 (17.10.2023). http://dx.doi.org/10.1116/6.0003055.

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Here, we demonstrate the application of highly ordered, periodic Ag/Au core-shell triangle nanotube arrays as an ultrasensitive and low-cost surface-enhanced Raman scattering (SERS) substrate for the first time. The arrays of core-shell nanotube, with an outer diameter of 1.5 μm, were fabricated using top-down wafer-scale lithography followed by sequential sputter deposition of Ag and Au. The SERS activity of various combinations of core-shell structures was evaluated. It was found that Ag-core nanotubes overlaid with the Au-shell resulted in the highest Raman intensity, where the enhancement factor for R6G as a probe molecule is determined to be 1.38 × 107. Meanwhile, the limit of detections for R6G and ketoprofen analytes was evaluated to be 10−10 and 10−6 M, respectively. Linear correlations between the SERS signal intensities and logarithmical scale of both analytes in different concentrations were also established, ranging 10−4–10−10 and 10−2–10−6 M for R6G and ketoprofen, respectively. The Raman R6G peak intensity mapping suggests our metal nanotube arrays act as effective plasmonic hotspots and, thus, are useful for SERS sensing applications.

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Biswas, Sujit K., Sandra B. Schujman, Robert Vajtai, Bingqing Wei, Allen Parker, Leo J. Schowalter und Pulickel M. Ajayan. „AFM-based Electrical Characterization of Nano-structures“. MRS Proceedings 738 (2002). http://dx.doi.org/10.1557/proc-738-g9.2.

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ABSTRACTCarbon nanotubes have the potential of being used as interconnects and active semiconducting material in future electronic circuits. It is necessary to study such nano-scale circuits with probes that can make measurements with molecular precision. We describe results using two nanoprobe techniques, namely scanning surface potential microscopy (SSPM), and conductive tip atomic force microscopy (CT-AFM), in the investigation of electrical properties of nanotube circuits. Vertical arrays of multi-walled nanotubes, grown in a porous alumina template with a metal back contact were analyzed. Current mapping confirmed that the nanotubes were electrically connected to the back contact. Isolated single-walled nanotube bundles deposited on an oxidized silicon wafer, and contacted electrically through chromium electrodes were also studied. Contact potential differences between the metal and nanotubes, and the current in some connected nanotubes were measured. Measurements of contact potential with different metals, and the nature of microscopic transport is crucial. Contact potential measurements can also provide fast and reliable characterization of junctions between metallic and semiconducting nanotubes and metals electrodes.

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Biswas, Sujit K., Sandra B. Schujman, Robert Vajtai, Bingqing Wei, Allen Parker, Leo J. Schowalter und Pulickel M. Ajayan. „AFM-based Electrical Characterization of Nano-structures“. MRS Proceedings 761 (2002). http://dx.doi.org/10.1557/proc-761-nn6.2/g9.2.

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ABSTRACTCarbon nanotubes have the potential of being used as interconnects and active semiconducting material in future electronic circuits. It is necessary to study such nano-scale circuits with probes that can make measurements with molecular precision. We describe results using two nanoprobe techniques, namely scanning surface potential microscopy (SSPM), and conductive tip atomic force microscopy (CT-AFM), in the investigation of electrical properties of nanotube circuits. Vertical arrays of multi-walled nanotubes, grown in a porous alumina template with a metal back contact were analyzed. Current mapping confirmed that the nanotubes were electrically connected to the back contact. Isolated single-walled nanotube bundles deposited on an oxidized silicon wafer, and contacted electrically through chromium electrodes were also studied. Contact potential differences between the metal and nanotubes, and the current in some connected nanotubes were measured. Measurements of contact potential with different metals, and the nature of microscopic transport is crucial. Contact potential measurements can also provide fast and reliable characterization of junctions between metallic and semiconducting nanotubes and metals electrodes.

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Yama, Nicholas S., I‐Tung Chen, Srivatsa Chakravarthi, Bingzhao Li, Christian Pederson, Bethany E. Matthews, Steven R. Spurgeon et al. „Silicon‐Lattice‐Matched Boron‐Doped Gallium Phosphide: A Scalable Acousto‐Optic Platform“. Advanced Materials, 03.09.2023. http://dx.doi.org/10.1002/adma.202305434.

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AbstractThe compact size, scalability, and strongly confined fields in integrated photonic devices enable new functionalities in photonic networking and information processing, both classical and quantum. Gallium phosphide (GaP) is a promising material for active integrated photonics due to its high refractive index, wide band gap, strong nonlinear properties, and large acousto‐optic figure of merit. In this work we demonstrate that silicon‐lattice‐matched boron‐doped GaP (BGaP), grown at the 12‐inch wafer scale, provides similar functionalities as GaP. BGaP optical resonators exhibit intrinsic quality factors exceeding 25,000 and 200,000 at visible and telecom wavelengths respectively. We further demonstrate the electromechanical generation of low‐loss acoustic waves and an integrated acousto‐optic (AO) modulator. High‐resolution spatial and compositional mapping, combined with ab initio calculations indicate two candidates for the excess optical loss in the visible band: the silicon‐GaP interface and boron dimers. These results demonstrate the promise of the BGaP material platform for the development of scalable AO technologies at telecom and provide potential pathways toward higher performance at shorter wavelengths.This article is protected by copyright. All rights reserved

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Snure, Michael, Eric W. Blanton, Vitali Soukhoveev, Timothy Vogt, Andrei Osinsky, Timothy Prusnick, W. Joshua Kennedy und Nicholas R. Glavin. „Spalling induced van der Waals lift-off and transfer of 4-in. GaN epitaxial films“. Journal of Applied Physics 134, Nr. 2 (14.07.2023). http://dx.doi.org/10.1063/5.0153634.

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Epitaxial lift-off (ELO) of high-quality GaN layers allows for integration with a variety of materials enabling improved performance, reduced costs, and development of new electronics. Of the ELO technologies, two-dimensional (2D) material-based lift-off offers great promise but is still in the early stages of development and has yet to demonstrate the scale and yield of other ELO technologies. Here, we demonstrate the potential of this process's scalability, speed, and yield through epitaxial growth and lift-off of 4-in. GaN films using a 2D boron nitride (BN) van der Waals (vdW) buffer layer. Since the BN layer acts as the growth template and the mechanical release layer, both the quality and adhesion of the GaN layer are correlated with the BN morphology and uniformity. Detailed spectroscopic mapping demonstrates excellent BN uniformity, which translates into growth of high-quality GaN as shown in mapping of the x-ray rock curves (XRCs), atomic force microscopy, and photoluminescence. Scanning transmission electron microscopy and electron energy loss spectroscopy reveal abrupt chemically distinct interfaces between the sapphire, BN, and AlN/GaN layers essential for efficient lift-off. Combined with the BN/GaN vdW heterostructure, Ni spalling is used to efficiently lift-off and transfer a full 4-in. GaN layer. Post transfer characterization of a 1.9 μm thick GaN layer transferred to a SiO2/Si wafer shows a very minimal change in the XRC and photoluminescence. Strain measurements before and after transfer show that the process fully relaxes residual strain formed in the GaN during high-temperature growth. This work highlights the potential for industry scalability of an exciting 2D material-based lift-off technology, which can facilitate higher power and more efficient radio frequency devices.

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Ji, Yihong, Martin Frentrup, Xiaotian Zhang, Jakub Pongrácz, Simon M. Fairclough, Yingjun Liu, Tongtong Zhu und Rachel A. Oliver. „Porous pseudo-substrates for InGaN quantum well growth: Morphology, structure, and strain relaxation“. Journal of Applied Physics 134, Nr. 14 (10.10.2023). http://dx.doi.org/10.1063/5.0165066.

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Strain-related piezoelectric polarization is detrimental to the radiative recombination efficiency for InGaN-based long wavelength micro-LEDs. In this paper, partial strain relaxation of InGaN multiple quantum wells (MQWs) on the wafer scale has been demonstrated by adopting a partially relaxed InGaN superlattice (SL) as the pseudo-substrate. Such a pseudo-substrate was obtained through an electro-chemical etching method, in which a sub-surface InGaN/InGaN superlattice was etched via threading dislocations acting as etching channels. The degree of strain relaxation in MQWs was studied by x-ray reciprocal space mapping, which shows an increase of the in-plane lattice constant with the increase of etching voltage used in fabricating the pseudo-substrate. The reduced strain in the InGaN SL pseudo-substrate was demonstrated to be transferable to InGaN MQWs grown on top of it, and the engineering of the degree of strain relaxation via porosification was achieved. The highest relaxation degree of 44.7% was achieved in the sample with the porous InGaN SL template etched under the highest etching voltage. Morphological and structural properties of partially relaxed InGaN MQWs samples were investigated with the combination of atomic force and transmission electron microscopy. The increased porosity of the InGaN SL template and the newly formed small V-pits during QW growth are suggested as possible origins for the increased strain relaxation of InGaN MQWs.

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Lihachev, Grigory, Johann Riemensberger, Wenle Weng, Junqiu Liu, Hao Tian, Anat Siddharth, Viacheslav Snigirev et al. „Low-noise frequency-agile photonic integrated lasers for coherent ranging“. Nature Communications 13, Nr. 1 (20.06.2022). http://dx.doi.org/10.1038/s41467-022-30911-6.

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AbstractFrequency modulated continuous wave laser ranging (FMCW LiDAR) enables distance mapping with simultaneous position and velocity information, is immune to stray light, can achieve long range, operate in the eye-safe region of 1550 nm and achieve high sensitivity. Despite its advantages, it is compounded by the simultaneous requirement of both narrow linewidth low noise lasers that can be precisely chirped. While integrated silicon-based lasers, compatible with wafer scale manufacturing in large volumes at low cost, have experienced major advances and are now employed on a commercial scale in data centers, and impressive progress has led to integrated lasers with (ultra) narrow sub-100 Hz-level intrinsic linewidth based on optical feedback from photonic circuits, these lasers presently lack fast nonthermal tuning, i.e. frequency agility as required for coherent ranging. Here, we demonstrate a hybrid photonic integrated laser that exhibits very narrow intrinsic linewidth of 25 Hz while offering linear, hysteresis-free, and mode-hop-free-tuning beyond 1 GHz with up to megahertz actuation bandwidth constituting 1.6 × 1015 Hz/s tuning speed. Our approach uses foundry-based technologies - ultralow-loss (1 dB/m) Si3N4 photonic microresonators, combined with aluminium nitride (AlN) or lead zirconium titanate (PZT) microelectromechanical systems (MEMS) based stress-optic actuation. Electrically driven low-phase-noise lasing is attained by self-injection locking of an Indium Phosphide (InP) laser chip and only limited by fundamental thermo-refractive noise at mid-range offsets. By utilizing difference-drive and apodization of the photonic chip to suppress mechanical vibrations of the chip, a flat actuation response up to 10 MHz is achieved. We leverage this capability to demonstrate a compact coherent LiDAR engine that can generate up to 800 kHz FMCW triangular optical chirp signals, requiring neither any active linearization nor predistortion compensation, and perform a 10 m optical ranging experiment, with a resolution of 12.5 cm. Our results constitute a photonic integrated laser system for scenarios where high compactness, fast frequency actuation, and high spectral purity are required.

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Wachtendorf, B., R. Beccard, D. Schmitz, H. Jürgensen, O. Schön, M. Heuken und E. Woelk. „Reliable, Reproducible and Efficient MOCVD of III-Nitrides in Production Scale Reactors“. MRS Proceedings 468 (1997). http://dx.doi.org/10.1557/proc-468-7.

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ABSTRACTIn this paper we present a class of MOCVD reactors with loading capacities up to seven 2″ wafers, designed for the mass production of LED structures.Our processes yield device quality GaN with excellent PL uniformities better than 1 nm across a 2″ wafer and thickness uniformities typically better than 2%.We also present full 2″ wafer mapping data, High Resolution Photoluminescence Wafer Scanning and sheet resistivity mapping, revealing the excellent composition uniformity of the nitride compounds InGaN and AlGaN. As well we will show sheet resistivity uniformity for Si-doped GaN and Mg-doped GaN.

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