Auswahl der wissenschaftlichen Literatur zum Thema „Tunable bandpass delta sigma ADC“
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Zeitschriftenartikel zum Thema "Tunable bandpass delta sigma ADC"
Cardelli, L., L. Fanucci, V. Kempe, F. Mannozzi und D. Strle. „Tunable bandpass sigma delta modulator using one input parameter“. Electronics Letters 39, Nr. 2 (2003): 187. http://dx.doi.org/10.1049/el:20030146.
Der volle Inhalt der QuelleKim, Jae-Bung, Nam-Hee Yoo und Seong-Ik Cho. „Tunable Bandpass 4th Order SC Sigma-delta Modulator with Novel Structure“. Transactions of The Korean Institute of Electrical Engineers 60, Nr. 2 (01.02.2011): 446–50. http://dx.doi.org/10.5370/kiee.2011.60.2.446.
Der volle Inhalt der QuelleSobot, R., S. Stapleton und M. Syrzycki. „Tunable continuous-time bandpass /spl Sigma//spl Delta/ modulators with fractional delays“. IEEE Transactions on Circuits and Systems I: Regular Papers 53, Nr. 2 (Februar 2006): 264–73. http://dx.doi.org/10.1109/tcsi.2005.857085.
Der volle Inhalt der QuelleWitte, Pascal, John G. Kauffman, Joachim Becker und Maurits Ortmanns. „A Correlation-Based Background Error Estimation Technique for Bandpass Delta–Sigma ADC DACs“. IEEE Transactions on Circuits and Systems II: Express Briefs 58, Nr. 11 (November 2011): 748–52. http://dx.doi.org/10.1109/tcsii.2011.2168021.
Der volle Inhalt der QuelleMolina-Salgado, Gerardo, Alonso Morgado, Gordana Jovanovic Dolecek und Jose M. de la Rosa. „LC-Based Bandpass Continuous-Time Sigma-Delta Modulators With Widely Tunable Notch Frequency“. IEEE Transactions on Circuits and Systems I: Regular Papers 61, Nr. 5 (Mai 2014): 1442–55. http://dx.doi.org/10.1109/tcsi.2013.2289412.
Der volle Inhalt der QuelleRaghavan, G., J. F. Jensen, J. Laskowski, M. Kardos, M. G. Case, M. Sokolich und S. Thomas. „Architecture, design, and test of continuous-time tunable intermediate-frequency bandpass delta-sigma modulators“. IEEE Journal of Solid-State Circuits 36, Nr. 1 (2001): 5–13. http://dx.doi.org/10.1109/4.896223.
Der volle Inhalt der QuelleMaurino, R., und P. Mole. „A 200-MHz IF 11-bit fourth-order bandpass /spl Delta//spl Sigma/ ADC in SiGe“. IEEE Journal of Solid-State Circuits 35, Nr. 7 (Juli 2000): 959–67. http://dx.doi.org/10.1109/4.848204.
Der volle Inhalt der QuelleXu, Yang, Xinwang Zhang, Zhihua Wang und Baoyong Chi. „A Flexible Continuous-Time $\Delta \Sigma $ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures“. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, Nr. 3 (März 2017): 872–80. http://dx.doi.org/10.1109/tvlsi.2016.2611518.
Der volle Inhalt der QuelleKaplan, T. S., J. F. Jensen, C. H. Fields und M. C. F. Chang. „A 2-GS/s 3-bit /spl Delta//spl Sigma/-modulated DAC with tunable bandpass mismatch shaping“. IEEE Journal of Solid-State Circuits 40, Nr. 3 (März 2005): 603–10. http://dx.doi.org/10.1109/jssc.2005.843708.
Der volle Inhalt der QuelleAfifi, M., Y. Manoli und M. Keller. „A study of excess loop delay in tunable continuous-time bandpass delta–sigma modulators using RC-resonators“. Analog Integrated Circuits and Signal Processing 79, Nr. 3 (10.04.2014): 555–68. http://dx.doi.org/10.1007/s10470-014-0294-0.
Der volle Inhalt der QuelleDissertationen zum Thema "Tunable bandpass delta sigma ADC"
Badran, Tamer. „Balayage de spectre utilisant les récepteurs radio logicielle“. Electronic Thesis or Diss., Sorbonne université, 2020. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2020SORUS264.pdf.
Der volle Inhalt der QuelleSpectrum sensing applications cover wide variety, such as efficient utilization of frequency spectrum, and in medical applications. The conventional architecture used by all the previous publications for spectrum sensing receiver is based on baseband ADC, hence it has high power consumption, higher complexity, and suffers from circuit mismatches and nonlinearity. In this work, we propose using an RF receiver based on bandpass delta-sigma ADC. It is much more convenient to have a tunable BP ΔΣ ADC to simplify the spectrum sweeping task. The previously reported tunable BP ΔΣ ADC’s are implementing tunability in a complex manner. We present an efficient implementation of tunable BP ΔΣ ADC with fixed ratio between the sampling frequency and center frequency. That fixed ratio further simplifies the implementation of the down conversion mixer and decimation filter which serve as the digital backend of the receiver. A spectrum sensing receiver, based on the power-efficient RF front end architecture proposed in this thesis, is also proposed. The proposed complete receiver does not suffer from I/Q imbalance that highly affect the spectrum sensing performance. Simulation results to show the circuit nonlinearity impact on the performance are presented. A circuit implementation of a digital backend of the proposed system is presented. This implementation comprises an efficient down conversion mixer, decimation filter, custom FFT block, and energy detection module. The implementation was validated on Altera FPGA using the on-chip logic analyzer via the SignalTab tool.Studies to show the impact of I/Q imbalance on spectrum sensing performance were previously published. Nevertheless, those publications presented only either analytical or simulation results. In this work, we present the first hardware measurement of the I/Q imbalance on spectrum sensing performance using a commercial SDR transceiver platform.In the medical field, we also present for the first time a study of the effect of RF-EMF exposure on neonates by performing a simultaneous acquisition of RF signals along with recording the physiological parameters of neonates. Using R-Studio, the stationarity of the signals to be correlated was checked, a transformation was performed on the non-stationary signals. Finally, cross correlation between the acquired RF signal (average of the whole spectrum or in a specific band) and each of the recorded physiological parameters did not show an observable impact of RF-EMF exposure on neonates
Svensson, Hanna. „Study on a second-order bandpass Σ∆-modulator for flexible AD-conversion“. Thesis, Linköping University, Department of Electrical Engineering, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-12105.
Der volle Inhalt der QuelleAn important component in many communication system is the digital to analog converter. The component is needed in order to convert real world analog quantities to digital quantities which are easier to process. As the market for hand held devices with wireless communication with the outer world has increased new approaches for sharing the frequency spectrum are needed. Therefore it would be interesting to look at the possibility to design an analog to digital converter that, in runtime, can change the frequency band converted, and hence the used standard. This thesis study one of the possibilities to design such an ADC, as a Σ∆ modulator, and more precise the structure called Cascade of resonators with distributed feedback and input (CRFB). The order of the modulator in this study is two.
McGinnis, Ryan Edward. „Flexible Sigma Delta Time-Interleaved Bandpass Analog-to-Digital Converter“. Wright State University / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=wright1152542196.
Der volle Inhalt der QuelleThandri, Bharath Kumar. „Design of RF/IF analog to digital converters for software radio communication receivers“. Texas A&M University, 2003. http://hdl.handle.net/1969.1/5774.
Der volle Inhalt der QuelleLiu, Xuemei. „Design of a 125 mhz tunable continuous-time bandpass modulator for wireless IF applications“. Texas A&M University, 2004. http://hdl.handle.net/1969.1/3257.
Der volle Inhalt der QuelleMariano, André Augusto. „Mixed Simulations and Design of a Wideband Continuous-Time Bandpass Delta-Sigma Converter Dedicated to Software Dfined Radio Applications“. Thesis, Bordeaux 1, 2008. http://www.theses.fr/2008BOR13644/document.
Der volle Inhalt der QuelleWireless front-end receivers of last generation mobile devices operate at least two frequency translations before I/Q demodulation. Frequency translation increases the system complexity, introducing several problems associated with the mixers (dynamic range limitation, noise injection from the local oscillator, etc.). Herein, the position of the analog-to-digital interface in the receiver chain can play an important role. Moving the analog-to-digital converter (ADC) as near as possible to the antenna, permits to simplify the overall system design and to alleviate requirements associated with analog functions (filters, mixers). These currently requirements have led to a great effort in designing improved architectures as Continuous-Time Delta-Sigma ADCs. The behavioural modeling this converter, although the circuit design of the main blocks has been the subject of this thesis. The use of an advanced design methodology, allowing the mixed simulation at different levels of abstraction, allows to validate both the circuit design and the overall system conversion. Using a multi-feedback architecture associated with a multi-bit quantizer, the continuous-time Bandpass Delta-Sigma converter achieves a SNR of about 76 dB in a wide band of 20MHz
Akram, Waqas. „Tunable mismatch shaping for bandpass Delta-Sigma data converters“. Thesis, 2011. http://hdl.handle.net/2152/ETD-UT-2011-05-3575.
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Chang-Huan, Chen. „A Double Sampling Bandpass Delta-Sigma Modulator with Tunable Center Frequency“. 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0002-1407200502291100.
Der volle Inhalt der QuelleChen, Chang-Huan, und 陳昌煥. „A Double Sampling Bandpass Delta-Sigma Modulator with Tunable Center Frequency“. Thesis, 2005. http://ndltd.ncl.edu.tw/handle/80729274422072133405.
Der volle Inhalt der Quelle淡江大學
電機工程學系碩士班
93
A Bandpass ∆Σ modulators are widely used in inter-mediate frequency (IF) and radio frequency (RF) communication systems. In order to avoid the low frequency noise in zero IF receiver and prevent the mismatch of the circuits from degrading the receiver performance, the single IF architecture is a good candidate. Since the signal, which is received and down-converted, may be varied due to process variations, a tunable bandpass ∆Σ modulator is required to improve the performance of the receiver. There are so many efforts are devoted in tunable continuous-time (CT) ∆Σ modulator by the modifying the transconductance of OTA in the resonator. However, an elaborate tuning scheme and an additional cost are demanded in the tunable continuous-time ∆Σ modulator. Since the mismatch among capacitors is very small, the SC ∆Σ modulators are popular in narrow band data converter. In this paper, a tunable bandpass ∆Σ modulator by one parameter only is adopted to optimize modulator performance. To achieve a tunable resonator in the modulator, a multiple path SC scheme is applied for the adjustments of the center frequency. A wide tuning range from 5MHz to 30MHz is preformed to demonstrate the flexibility of the modulator. Furthermore, a double sampling technique is used to relax the requirements of opamp performance. A tunable switched-capacitor (SC) bandpass delta sigma (∆Σ) modulator using double sampling by one input parameter is proposed. The center frequency of the modulator can be varied from 5MHz to 30MHz at a sampling frequency of 70MHz. Its performance can be hence improved by fine tuning the center frequency. The purposed modulator was implemented in 0.35-µm 2P4M CMOS standard technology with the core area of 2.8×1.5 mm2. The measured dynamic range of 68dB within 200 kHz bandwidth can be achieved. Its power consumption is 58mW under a 3.3-V supply voltage.
Chalvatzis, Theodoros. „Tunable RF bandpass delta-sigma digital receivers with millimetre-wave sampling clocks“. 2008. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=742559&T=F.
Der volle Inhalt der QuelleKonferenzberichte zum Thema "Tunable bandpass delta sigma ADC"
Flemming, Jesko, Bernhard Wicht und Pascal Witte. „Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC Architectures“. In 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). IEEE, 2023. http://dx.doi.org/10.1109/smacd58065.2023.10192145.
Der volle Inhalt der QuelleAkram, Waqas, und Earl E. Swartzlander. „Tunable mismatch shaping for quadrature bandpass delta-sigma data converters“. In 2010 IEEE Workshop On Signal Processing Systems (SiPS). IEEE, 2010. http://dx.doi.org/10.1109/sips.2010.5624787.
Der volle Inhalt der QuelleSakr, Khaled, Mohamed Dessouky und Abd-El Halim Zekry. „Design of tunable continuous-time quadrature bandpass delta-sigma modulators“. In 2011 IEEE 6th International Design and Test Workshop (IDT). IEEE, 2011. http://dx.doi.org/10.1109/idt.2011.6123110.
Der volle Inhalt der QuelleSchreier, R., H. Shibata, P. Hendriks, M. Aliroteh, V. Kozlov, H. K. Tong, A. Del Muro et al. „An IF digitizer IC employing a continuous-time bandpass delta-sigma ADC“. In 2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2012. http://dx.doi.org/10.1109/rfic.2012.6242291.
Der volle Inhalt der QuelleHuang, Shu-Chuan, und Chia-Te Fu. „A tunable SC bandpass delta-sigma modulator for multi-standard applications“. In APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE, 2008. http://dx.doi.org/10.1109/apccas.2008.4746230.
Der volle Inhalt der QuelleAkram, Waqas, und Earl E. Swartzlander. „Tunable N-path mismatch shaping for multibit bandpass delta-sigma modulators“. In 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers. IEEE, 2009. http://dx.doi.org/10.1109/acssc.2009.5469938.
Der volle Inhalt der QuelleAfifi, M., M. Keller, Y. Manoli und M. Ortmanns. „Excess loop delay compensation technique for tunable bandpass delta sigma modulators“. In 2009 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2009. http://dx.doi.org/10.1109/mwscas.2009.5236078.
Der volle Inhalt der QuelleHuang, Shu-Chuan, und Ting-Yen Wang. „A tunable SC bandpass delta-sigma modulator with noise-coupled architecture“. In 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2011. http://dx.doi.org/10.1109/mwscas.2011.6026518.
Der volle Inhalt der QuelleGuelaz, Rachid, Patricia Desgreys und Patrick Loumeau. „A sigma-delta bandpass ADC modelling in superconducting RSFQ technology with VHDL-AMS“. In Design Languages (FDL). IEEE, 2008. http://dx.doi.org/10.1109/fdl.2008.4641427.
Der volle Inhalt der QuelleAfifi, Mohamed, Ahmed Shahein, Michael Maurer, Matthias Keller und Yiannos Manoli. „A self calibration technique for tunable continuous-time bandpass delta-sigma modulators“. In 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012. IEEE, 2012. http://dx.doi.org/10.1109/iscas.2012.6271943.
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