Zeitschriftenartikel: „Transistor effect“

1

Horng. „Thin Film Transistor“. Crystals 9, Nr. 8 (09.08.2019): 415. http://dx.doi.org/10.3390/cryst9080415.

Annotation:

The special issue is "Thin Film Transistor". There are eight contributed papers. They focus on organic thin film transistors, fluorinated oligothiophenes transistors, surface treated or hydrogen effect on oxide-semiconductor-based thin film transistors, and their corresponding application in flat panel displays and optical detecting. The present special issue on “Thin Film Transistor” can be considered as a status report reviewing the progress that has been made recently on thin film transistor technology. These papers can provide the readers with more research information and corresponding application potential about Thin Film Transistors.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

2

Kim, Taegeon, und Changhwan Shin. „Effects of Interface Trap on Transient Negative Capacitance Effect: Phase Field Model“. Electronics 9, Nr. 12 (14.12.2020): 2141. http://dx.doi.org/10.3390/electronics9122141.

Der volle Inhalt der Quelle

Annotation:

Ferroelectric materials have received significant attention as next-generation materials for gates in transistors because of their negative differential capacitance. Emerging transistors, such as the negative capacitance field effect transistor (NCFET) and ferroelectric field-effect transistor (FeFET), are based on the use of ferroelectric materials. In this work, using a multidomain 3D phase field model (based on the time-dependent Ginzburg–Landau equation), we investigate the impact of the interface-trapped charge (Qit) on the transient negative capacitance in a ferroelectric capacitor (i.e., metal/Zr-HfO2/heavily doped Si) in series with a resistor. The simulation results show that the interface trap reinforces the effect of transient negative capacitance.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

3

Kumar, Prateek, Maneesha Gupta, Naveen Kumar, Marlon D. Cruz, Hemant Singh, Ishan und Kartik Anand. „Performance Evaluation of Silicon-Transition Metal Dichalcogenides Heterostructure Based Steep Subthreshold Slope-Field Effect Transistor Using Non-Equilibrium Green’s Function“. Sensor Letters 18, Nr. 6 (01.06.2020): 468–76. http://dx.doi.org/10.1166/sl.2020.4236.

Der volle Inhalt der Quelle

Annotation:

With technology invading nanometer regime performance of the Metal-Oxide-semiconductor Field Effect Transistor is largely hampered by short channel effects. Most of the simulation tools available do not include short channel effects and quantum effects in the analysis which raises doubt on their authenticity. Although researchers have tried to provide an alternative in the form of tunnel field-effect transistors, junction-less transistors, etc. but they all suffer from their own set of problems. Therefore, Metal-Oxide-Semiconductor Field-Effect Transistor remains the backbone of the VLSI industry. This work is dedicated to the design and study of the novel tub-type Metal-Oxide-Semiconductor Field-Effect Transistor. For simulation Non-Equilibrium Green’s Function is used as the primary model of simulation. The device is analyzed under different physical variations like work function, permittivity, and interface trap charge. This work uses Silicon-Molybdenum Disulphide heterojunction and Silicon-Tungsten Disulphide heterojunction as channel material. Results for both the heterojunctions are compared. It was analyzed that Silicon-Molybdenum Disulphide heterojunction provides better linearity and Silicon-Tungsten Disulphide heterojunction provides better switching speed than conventional Metal-Oxide-Semiconductor Field-Effect Transistor.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

4

Elamin, Abdenabi Ali, und Waell H. Alawad. „Effect of Gamma Radiation on Characteristic of bipolar junction Transistors (BJTs )“. Journal of The Faculty of Science and Technology, Nr. 6 (12.01.2021): 1–9. http://dx.doi.org/10.52981/jfst.vi6.597.

Der volle Inhalt der Quelle

Annotation:

This paper describes the effects of 60Cogamma radiation hardness of characteristic and parameters of Bipolar Junction Transistors in order to analyze the performance changes of the individual devices used in nuclear field. Bipolar Junction Transistor (BJT) of the type (BC-301) (npn) silicon, Transistor was irradiated by gamma radiation using 60Cosource at different doses (1, 2, 3, 4, and 5) KGy. The characteristics and parameter of Bipolar Junction Transistor was studied before and after irradiated by using Transistor Characteristics Apparatus with regulated power supplies. Obtained result showed that, the saturation voltage VCE(sat) of Bipolar Junction Transistor decreased because of the gain degradation of the transistor and increased silicon resistivity, Another parameter of a bipolar junction transistor affected by ionizing radiation is a collector-base leakage current, a strong increase of the current is caused by the build-up charge near the junction.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

5

Luzader, Stephen, und Eduardo Sánchez‐Velasco. „Transistor effect in improperly connected transistors“. Physics Teacher 34, Nr. 2 (Februar 1996): 118–19. http://dx.doi.org/10.1119/1.2344364.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

6

Vukic, Vladimir, und Predrag Osmokrovic. „Power lateral pnp transistor operating with high current density in irradiated voltage regulator“. Nuclear Technology and Radiation Protection 28, Nr. 2 (2013): 146–57. http://dx.doi.org/10.2298/ntrp1302146v.

Der volle Inhalt der Quelle

Annotation:

The operation of power lateral pnp transistors in gamma radiation field was examined by detection of the minimum dropout voltage on heavily loaded low-dropout voltage regulators LM2940CT5, clearly demonstrating their low radiation hardness, with unacceptably low values of output voltage and collector-emitter voltage volatility. In conjunction with previous results on base current and forward emitter current gain of serial transistors, it was possible to determine the positive influence of high load current on a slight improvement of voltage regulator LM2940CT5 radiation hardness. The high-current flow through the wide emitter aluminum contact of the serial transistor above the isolation oxide caused intensive annealing of the positive oxide-trapped charge, leading to decrease of the lateral pnp transistor's current gain, but also a more intensive recovery of the small-signal npn transistors in the control circuit. The high current density in the base area of the lateral pnp transistor immediately below the isolation oxide decreased the concentration of negative interface traps. Consequently, the positive influence of the reduced concentration of the oxide-trapped charge on the negative feedback reaction circuit, together with the favourable effect of reduced interface traps concentration, exceeded negative influence of the annealed oxide-trapped charge on the serial pnp transistor's forward emitter current gain.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

7

NASTAUSHEV, Yu V., T. A. GAVRILOVA, M. M. KACHANOVA, O. V. NAUMOVA, I. V. ANTONOVA, V. P. POPOV, L. V. LITVIN, D. V. SHEGLOV, A. V. LATYSHEV und A. L. ASEEV. „FIELD EFFECT NANOTRANSISTOR ON ULTRATHIN SILICON-ON-INSULATOR“. International Journal of Nanoscience 03, Nr. 01n02 (Februar 2004): 155–60. http://dx.doi.org/10.1142/s0219581x04001936.

Der volle Inhalt der Quelle

Annotation:

Peculiarities of the fabrication of field effect transistor (FET) at nanoscaled size on ultrathin silicon-on-insulator (SOI) was studied in details. Two types of FET transistor were successfully realized: in-plane-gate FET (IPGFET) with 40 nm minimum channel size and multichannel top-gate MOSFET on silicon-on-insulator. The deep submicron top-gate of Ti/Au embraces each of the conductive oxidized silicon wires placed with 400 nm pitch. The type and concentration of carries in a conductive channel of the ultrathin SOI was controlled by a bottom gate. The fabricated transistors demonstrated high transconductance and low threshold voltage. Some results of electron properties of the nano-FET transistors are presented.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

8

Qi, Cheng, Yaswanth Rangineni, Gary Goncher, Raj Solanki, Kurt Langworthy und Jay Jordan. „SiGe Nanowire Field Effect Transistors“. Journal of Nanoscience and Nanotechnology 8, Nr. 1 (01.01.2008): 457–60. http://dx.doi.org/10.1166/jnn.2008.083.

Der volle Inhalt der Quelle

Annotation:

Si0.5Ge0.5 nanowires have been utilized to fabricate source-drain channels of p-type field effect transistors (p-FETs). These transistors were fabricated using two methods, focused ion beam (FIB) and electron beam lithography (EBL). The electrical analyses of these devices show field effect transistor characteristics. The boron-doped SiGe p-FETs with a high-k (HfO2) insulator and Pt electrodes, made via FIB produced devices with effective hole mobilities of about 50 cm2V−1s−1. Similar transistors with Ti/Au electrodes made via EBL had effective hole mobilities of about 350 cm2V−1s−1.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

9

Hashim, Yasir, und Othman Sidek. „Dimensional Effect on DIBL in Silicon Nanowire Transistors“. Advanced Materials Research 626 (Dezember 2012): 190–94. http://dx.doi.org/10.4028/www.scientific.net/amr.626.190.

Der volle Inhalt der Quelle

Annotation:

Drain-induced barrier lowering (DIBL) is crucial in many applications of silicon nanowire transistors. This paper determined the effect of the dimensions of nanowires on DIBL. The MuGFET simulation tool was used to investigate the characteristics of the transistors. The transfer characteristics of transistors with different dimensions were simulated. The results show that longer nanowires with smaller diameters and lower oxide thickness decrease DIBL and tend to possess the best transistor characteristics.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

10

Werkmeister, F. X., T. Koide und B. A. Nickel. „Ammonia sensing for enzymatic urea detection using organic field effect transistors and a semipermeable membrane“. Journal of Materials Chemistry B 4, Nr. 1 (2016): 162–68. http://dx.doi.org/10.1039/c5tb02025e.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

11

Angelov, George V., Dimitar N. Nikolov und Marin H. Hristov. „Technology and Modeling of Nonclassical Transistor Devices“. Journal of Electrical and Computer Engineering 2019 (03.11.2019): 1–18. http://dx.doi.org/10.1155/2019/4792461.

Der volle Inhalt der Quelle

Annotation:

This paper presents a comprehensive outlook for the current technology status and the prospective upcoming advancements. VLSI scaling trends and technology advancements in the context of sub-10-nm technologies are reviewed as well as the associated device modeling approaches and compact models of transistor structures are considered. As technology goes into the nanometer regime, semiconductor devices are confronting numerous short-channel effects. Bulk CMOS technology is developing and innovating to overcome these constraints by introduction of (i) new technologies and new materials and (ii) new transistor architectures. Technology boosters such as high-k/metal-gate technologies, ultra-thin-body SOI, Ge-on-insulator (GOI), AIII–BV semiconductors, and band-engineered transistor (SiGe or Strained Si-channel) with high-carrier-mobility channels are examined. Nonclassical device structures such as novel multiple-gate transistor structures including multiple-gate field-effect transistors, FD-SOI MOSFETs, CNTFETs, and SETs are examined as possible successors of conventional CMOS devices and FinFETs. Special attention is devoted to gate-all-around FETs and, respectively, nanowire and nanosheet FETs as forthcoming mainstream replacements of FinFET. In view of that, compact modeling of bulk CMOS transistors and multiple-gate transistors are considered as well as BSIM and PSP multiple-gate models, FD-SOI MOSFETs, CNTFET, and SET modeling are reviewed.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

12

Hamieh, S. „Improving the RF Performance of Carbon Nanotube Field Effect Transistor“. Journal of Nanomaterials 2012 (2012): 1–7. http://dx.doi.org/10.1155/2012/724121.

Der volle Inhalt der Quelle

Annotation:

Compact model of single-walled semiconducting carbon nanotube field-effect transistors (CNTFETs) implementing the calculation of energy conduction subband minima under VHDLAMS simulator is used to explore the high-frequency performance potential of CNTFET. The cutoff frequency expected for a MOSFET-like CNTFET is well below the performance limit, due to the large parasitic capacitance between electrodes. We show that using an array of parallel nanotubes as the transistor channel combined in a finger geometry to produce a single transistor significantly reduces the parasitic capacitance per tube and, thereby, improves high-frequency performance.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

13

PERALTA, X. G., S. J. ALLEN, M. C. WANKE, N. E. HARFF, M. P. LILLY, J. A. SIMMONS, J. L. RENO et al. „ERRATA: "THz DETECTION BY RESONANT 2-D PLASMONS IN FIELD EFFECT DEVICES"“. International Journal of High Speed Electronics and Systems 12, Nr. 03 (September 2002): 925–37. http://dx.doi.org/10.1142/s0129156402001757.

Der volle Inhalt der Quelle

Annotation:

We demonstrate resonant detection of terahertz radiation by two-dimensional plasma waves in two field effect devices: a commercial field effect transistor (FET) and a double quantum well field effect transistor with a periodic grating gate. In both devices, the standing 2-D plasmon is tuned to the frequency of the THz radiation by varying the gate bias. The double quantum well field effect transistors exhibits a rich photoconductive response corresponding to spatial harmonics of the standing 2-D plasmons under the metal part of the periodic gate.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

14

Chaw, Chaw Su Nandar Hlaing, und Thiri Nwe. „Analysis on Band Layer Design and J-V characteristics of Zinc Oxide Based Junction Field Effect Transistor“. Journal La Multiapp 1, Nr. 2 (21.06.2020): 14–21. http://dx.doi.org/10.37899/journallamultiapp.v1i2.108.

Der volle Inhalt der Quelle

Annotation:

This paper presents the band gap design and J-V characteristic curve of Zinc Oxide (ZnO) based on Junction Field Effect Transistor (JFET). The physical properties for analysis of semiconductor field effect transistor play a vital role in semiconductor measurements to obtain the high-performance devices. The main objective of this research is to design and analyse the band diagram design of semiconductor materials which are used for high performance junction field effect transistor. In this paper, the fundamental theory of semiconductors, the electrical properties analysis and bandgap design of materials for junction field effect transistor are described. Firstly, the energy bandgaps are performed based on the existing mathematical equations and the required parameters depending on the specified semiconductor material. Secondly, the J-V characteristic curves of semiconductor material are discussed in this paper. In order to achieve the current-voltage characteristic for specific junction field effect transistor, numerical values of each parameter which are included in analysis are defined and then these resultant values are predicted for the performance of junction field effect transistors. The computerized analyses have also mentioned in this paper.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

15

YOUSEFI, REZA, und SEYED SALEH GHOREYSHI. „NUMERICAL STUDY OF OHMIC-SCHOTTKY CARBON NANOTUBE FIELD EFFECT TRANSISTOR“. Modern Physics Letters B 26, Nr. 15 (17.05.2012): 1250096. http://dx.doi.org/10.1142/s0217984912500960.

Der volle Inhalt der Quelle

Annotation:

MOS-like transistors are one of the transistor topologies based on the carbon nanotubes. Some modified structures have been proposed to improve their electrical characteristics, such as band to band tunneling (BTBT) and switching behavior. Unfortunately, most of them increase the transistor length due to the use of additional regions. In this paper, we propose a structure that improves the OFF state and switching behavior of the transistor without increase in the transistor length. The proposed structure is constructed by a modification of the conventional structure in a way that its drain high-doped extension part is replaced by a lightly linear doped region. Then, the proposed structure has a Schottky contact at the drain side. With a nonequilibrium Green's function (NEGF) formalism, we have studied the characteristics of the proposed device and compared them with those obtained by a conventional structure with the same channel length. The results show that the proposed structure enjoys from better switching characteristics and OFF-state behavior, especially at low currents, in comparison to the main structure and, as a result, can be a good candidate for the low-power applications.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

16

Tajarrod, Mohammad Hadi, und Hassan Rasooli Saghai. „High I on/I off current ratio graphene field effect transistor: the role of line defect“. Beilstein Journal of Nanotechnology 6 (23.10.2015): 2062–68. http://dx.doi.org/10.3762/bjnano.6.210.

Der volle Inhalt der Quelle

Annotation:

The present paper casts light upon the performance of an armchair graphene nanoribbon (AGNR) field effect transistor in the presence of one-dimensional topological defects. The defects containing 5–8–5 sp2-hybridized carbon rings were placed in a perfect graphene sheet. The atomic scale behavior of the transistor was investigated in the non-equilibrium Green's function (NEGF) and tight-binding Hamiltonian frameworks. AGNRFET basic terms such as the on/off current, transconductance and subthreshold swing were investigated along with the extended line defect (ELD). The results indicated that the presence of ELDs had a significant effect on the parameters of the GNRFET. Compared to conventional transistors, the increase of the I on/I off ratio in graphene transistors with ELDs enhances their applicability in digital devices.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

17

Volcheck, V. S., und V. R. Stempitsky. „Numerical simulation of the sensor for toxic nanoparticles based on the heterostructure field effect transistor“. Doklady BGUIR 18, Nr. 8 (27.12.2020): 62–68. http://dx.doi.org/10.35596/1729-7648-2020-18-8-62-68.

Der volle Inhalt der Quelle

Annotation:

A significant rise in the mass production of products that contain nanoparticles is of growing concern due to the detection of their toxic effects on living organisms. The standard method for analyzing the toxicity of substances, including nanomaterials, is toxicological testing, which requires the substantial consumption of time and material resources. An alternative approach is to develop models that predict the effect of nanomaterials on biological systems. In both cases, for the detection of nanoparticles an effective electronic complex consisting of a sensor with high sensitivity and a data reception/processing/transmission system is necessary. In recent times, fundamental and applied research activities aimed at the application of heterostructure field-effect transistors – high electron mobility transistors–as a base for such sensors have been undertaken. The purpose of this work is to develop a technique for modeling a sensor for toxic nanoparticles based on the heterostructure field-effect transistor. The object of the research is a gallium nitride high electron mobility transistor device structure. The subject of the research is the electrical characteristics of the transistor obtained in static mode. The calculation results show that the dependence between the concentration of the toxic nanoparticles in the test medium and the polarization charge surface density could serve as a base for modeling the sensor for toxic nanoparticles based on the heterostructure field-effect transistor. The primary advantage of the proposed technique is the use of the scaling parameter intended directly for calibrating the polarization charge density in accordance with the two-dimensional electron gas concentration. The obtained results can be utilized by the electronics industry of the Republic of Belarus for developing the hardware components of gallium nitride high-frequency electronics.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

18

Jadwiszczak, Jakub, Pierce Maguire, Conor P. Cullen, Georg S. Duesberg und Hongzhou Zhang. „Effect of localized helium ion irradiation on the performance of synthetic monolayer MoS2 field-effect transistors“. Beilstein Journal of Nanotechnology 11 (04.09.2020): 1329–35. http://dx.doi.org/10.3762/bjnano.11.117.

Der volle Inhalt der Quelle

Annotation:

Helium ion irradiation is a known method of tuning the electrical conductivity and charge carrier mobility of novel two-dimensional semiconductors. Here, we report a systematic study of the electrical performance of chemically synthesized monolayer molybdenum disulfide (MoS2) field-effect transistors irradiated with a focused helium ion beam as a function of increasing areal irradiation coverage. We determine an optimal coverage range of approx. 10%, which allows for the improvement of both the carrier mobility in the transistor channel and the electrical conductance of the MoS2, due to doping with ion beam-created sulfur vacancies. Larger areal irradiations introduce a higher concentration of scattering centers, hampering the electrical performance of the device. In addition, we find that irradiating the electrode–channel interface has a deleterious impact on charge transport when contrasted with irradiations confined only to the transistor channel.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

19

Pelella, Aniello, Alessandro Grillo, Enver Faella, Filippo Giubileo, Francesca Urban und Antonio Di Bartolomeo. „Molybdenum Disulfide Field Effect Transistors under Electron Beam Irradiation and External Electric Fields“. Materials Proceedings 4, Nr. 1 (10.11.2020): 25. http://dx.doi.org/10.3390/iocn2020-07807.

Der volle Inhalt der Quelle

Annotation:

In this work, monolayer molybdenum disulfide (MoS2) nanosheets, obtained via chemical vapor deposition onto SiO2/Si substrates, are exploited to fabricate field-effect transistors with n-type conduction, high on/off ratio, steep subthreshold slope and good mobility. We study their electric characteristics from 10−6 Torr to atmospheric air pressure. We show that the threshold voltage of the transistor increases with the growing pressure. Moreover, Schottky metal contacts in monolayer molybdenum disulfide (MoS2) field-effect transistors (FETs) are investigated under electron beam irradiation conditions. It is shown that the exposure of Ti/Au source/drain electrodes to an electron beam reduces the contact resistance and improves the transistor performance. It is shown that e-beam irradiation lowers the Schottky barrier at the contacts due to thermally induced atom diffusion and interfacial reactions. The study demonstrates that electron beam irradiation can be effectively used for contact improvement though local annealing. It is also demonstrated that the application of an external field by a metallic nanotip induces a field emission current, which can be modulated by the voltage applied to the Si substrate back-gate. Such a finding, that we attribute to gate-bias lowering of the MoS2 electron affinity, enables a new field-effect transistor based on field emission.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

20

Gerding, M., T. Musch und B. Schiek. „Generation of short electrical pulses based on bipolar transistorsny“. Advances in Radio Science 2 (27.05.2005): 7–12. http://dx.doi.org/10.5194/ars-2-7-2004.

Der volle Inhalt der Quelle

Annotation:

Abstract. A system for the generation of short electrical pulses based on the minority carrier charge storage and the step recovery effect of bipolar transistors is presented. Electrical pulses of about 90 ps up to 800 ps duration are generated with a maximum amplitude of approximately 7V at 50Ω. The bipolar transistor is driven into saturation and the base-collector and base-emitter junctions become forward biased. The resulting fast switch-off edge of the transistor’s output signal is the basis for the pulse generation. The fast switching of the transistor occurs as a result of the minority carriers that have been injected and stored across the base-collector junction under forward bias conditions. If the saturated transistor is suddenly reverse biased the pn-junction will appear as a low impedance until the stored charge is depleted. Then the impedance will suddenly increase to its normal high value and the flow of current through the junction will turn to zero, abruptly. A differentiation of the output signal of the transistor results in two short pulses with opposite polarities. The differentiating circuit is implemented by a transmission line network, which mainly acts as a high pass filter. Both the transistor technology (pnp or npn) and the phase of the transfer function of the differentating circuit influence the polarity of the output pulses. The pulse duration depends on the transistor parameters as well as on the transfer function of the pulse shaping network. This way of generating short electrical pulses is a new alternative for conventional comb generators based on steprecovery diodes (SRD). Due to the three-terminal structure of the transistor the isolation problem between the input and the output signal of the transistor network is drastically simplified. Furthermore the transistor is an active element in contrast to a SRD, so that its current gain can be used to minimize the power of the driving signal.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

21

Тарасова, Е. А., С. В. Оболенский, C. В. Хазанова, Н. Н. Григорьева, О. Л. Голиков, А. Б. Иванов und А. С. Пузанов. „Компенсация нелинейности сток-затворной вольт-амперной характеристики в полевых транзисторах с длиной затвора ~100 нм“. Физика и техника полупроводников 54, Nr. 9 (2020): 968. http://dx.doi.org/10.21883/ftp.2020.09.49841.35.

Der volle Inhalt der Quelle

Annotation:

Abstract The nonlinearity of the gate–drain current–voltage characteristics in classical Schottky transistors and two-dimensional electron gas field-effect transistors based on AlGaAs/InGaAs/GaAs and InGaAs/GaAs compounds is analyzed. The carrier velocity-overshoot effect in the transistor channel is analyzed for various doping profiles of the structures under study.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

22

Agha, Firas, Yasir Naif und Mohammed Shakib. „Review of Nanosheet Transistors Technology“. Tikrit Journal of Engineering Sciences 28, Nr. 1 (20.05.2021): 40–48. http://dx.doi.org/10.25130/tjes.28.1.05.

Der volle Inhalt der Quelle

Annotation:

Nano-sheet transistor can be defined as a stacked horizontally gate surrounding the channel on all direction. This new structure is earning extremely attention from research to cope the restriction of current Fin Field Effect Transistor (FinFET) structure. To further understand the characteristics of nano-sheet transistors, this paper presents a review of this new nano-structure of Metal Oxide Semiconductor Field Effect Transistor (MOSFET), this new device that consists of a metal gate material. Lateral nano-sheet FET is now targeting for 3nm Complementary MOS (CMOS) technology node. In this review, the structure and characteristics of Nano-Sheet FET (NSFET), FinFET and NanoWire FET (NWFET) under 5nm technology node are presented and compared. According to the comparison, the NSFET shows to be more impregnable to mismatch in ON current than NWFET. Furthermore, as comparing with other nanodimensional transistors, the NSFET has the superior control of gate all-around structures, also the NWFET realize lower mismatch in sub threshold slope (SS) and drain induced barrier lowering (DIBL).

APA, Harvard, Vancouver, ISO und andere Zitierweisen

23

Chen, J., R. Könenkamp, S. Klaumünzer und M. Ch Lux-Steiner. „Vertical Nanowire Field Effect Transistor in the Flexible Polymer Foils Based on Ion Tracks“. Solid State Phenomena 121-123 (März 2007): 507–12. http://dx.doi.org/10.4028/www.scientific.net/ssp.121-123.507.

Der volle Inhalt der Quelle

Annotation:

Fabrication of flexible device structures and nanoscale size definition are presently among the most important and ambitious development goals in the IT field. We have recently prepared the vertical nanowire field effect transistor in the flexible polymer foils based on ion tracks. The high-energetic fast heavy ions were used to irradiate the 8μm PET foils and then the chemical etching method were employed to prepare cylindrical channels in these PET foils. These channels were subsequently filled with insulator material and semiconductor, and then provided with suitable metallic contacts, to obtain a vertical field-effect transistor device. Preparation and first electronic results on this new device are reported. Typically over 107 transistors per cm2 with the devices’ diameter of ~100 nm can be obtained in this technique. The fabrication does not require lithography on the scale of a single transistor, and is suitable for large-area and flexible applications.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

24

ROTKIN, SLAVA V., HARRY E. RUDA und ALEXANDER SHIK. „FIELD-EFFECT TRANSISTOR STRUCTURES WITH QUASI-ONE-DIMENSIONAL CHANNEL“. International Journal of Nanoscience 03, Nr. 01n02 (Februar 2004): 161–70. http://dx.doi.org/10.1142/s0219581x04001948.

Der volle Inhalt der Quelle

Annotation:

Drift–diffusion model is applied for transport in a one-dimensional field effect transistor. A unified description is given for a semiconductor nanowire and a single wall nanotube basing on a self-consistent electrostatic calculations. General analytic expressions are found for basic device characteristic which differ from those for bulk transistors. We explain the difference in terms of weaker screening and specific charge density distribution in quasi-one-dimensional channel. The device characteristics are shown to be sensitive to the geometry of leads and are analyzed separately for bulk, planar and wire contacts.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

25

Grémion, E., D. Niepce, A. Cavanna, U. Gennser und Y. Jin. „Quantum Point Contact Transistor and Ballistic Field-Effect Transistors“. Journal of Physics: Conference Series 400, Nr. 4 (17.12.2012): 042013. http://dx.doi.org/10.1088/1742-6596/400/4/042013.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

26

XIAO, YUN-CHANG, WEI LUO, QING-HU ZHONG, RUI ZHU und WEN-JI DENG. „MAGNETIC FIELDS MODULATED EXTENDED SPIN FIELD EFFECT TRANSISTORS WITH UNPARALLEL FERROMAGNETIC LEADS“. Modern Physics Letters B 27, Nr. 02 (05.12.2012): 1350016. http://dx.doi.org/10.1142/s0217984913500164.

Der volle Inhalt der Quelle

Annotation:

Electron spin polarization properties of the Datta–Das spin field effect transistors are studied by taking into account the coexistence of the Rashba and Dresselhaus effects and an in-plane magnetic field. The transistor is connected to ferromagnetic leads with unparallel polarization. Transmission coefficients can be calculated and thus the Landauer–Büttiker conductance are obtained. Numerical results for the spin polarization of the conductance were discussed in detail.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

27

Tyszka, Krzysztof, Daniel Moraru, Takeshi Mizuno, Ryszard Jabłoński und Michiharu Tabe. „Kelvin Probe Force Microscope Observation of Donors’ Arrangement in Si Transistor Channel“. Advanced Materials Research 1117 (Juli 2015): 82–85. http://dx.doi.org/10.4028/www.scientific.net/amr.1117.82.

Der volle Inhalt der Quelle

Annotation:

Further development of dopant-atom-based transistors requires investigation of the effects of discrete dopant distribution on device operation. Hence, it is important to monitor dopants’ arrangement inside transistor channels. We used Kelvin Probe Force Microscope (KPFM) to measure surface potential profiles of field-effect transistor (FET) channels doped with different concentrations of phosphorus atoms. We observed three basic configurations of dopants: solitary donors, “clusters” of a few coupled donors, and “clusters” of many donors. Our systematic observation provides information about the formation of quantum dots consisting of a single donor or a number of coupled donors.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

28

Maity, Heranmoy. „A New Approach to Design and Implementation of 2-Input XOR Gate Using 4-Transistor“. Micro and Nanosystems 12, Nr. 3 (01.12.2020): 240–42. http://dx.doi.org/10.2174/1876402912666200309120205.

Der volle Inhalt der Quelle

Annotation:

Aim: This paper proposed the design and implementation of a 2-input XOR gate using 4- transistor. Method : The XOR gate can be designed using NOT gate and 2:1 multiplexer. The NOT gate is designed using two metal–oxide–semiconductor field-effect transistors MOSFETs and an approximate 2:1 multiplexer. The 2:1 multiplexer is designed using two MOSFETs. So, an XOR gate can be designed using four transistors. Results: The proposed work theoretically and experimentally describes the 2-input XOR gate using 4- transistor. The proposed work was verified using Xilinx (ISE Design Suite).

APA, Harvard, Vancouver, ISO und andere Zitierweisen

29

Belyaev, M. A., A. A. Velichko, P. P. Boriskov, N. A. Kuldin, V. V. Putrolaynen und G. B. Stefanovitch. „The Field Effect and Mott Transistor Based on Vanadium Dioxide“. Journal on Selected Topics in Nano Electronics and Computing 1, Nr. 2 (Juni 2014): 26–30. http://dx.doi.org/10.15393/j8.art.2014.3045.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

30

Hasan, Md Sakib, Samira Shamsir, Mst Shamim Ara Shawkat, Frances Garcia und Syed K. Islam. „Multivariate Regression Polynomial: A Versatile and Efficient Method for DC Modeling of Different Transistors (MOSFET, MESFET, HBT, HEMT and G4FET)“. International Journal of High Speed Electronics and Systems 27, Nr. 03n04 (September 2018): 1840016. http://dx.doi.org/10.1142/s0129156418400165.

Der volle Inhalt der Quelle

Annotation:

This work presents multivariate regression polynomial as a versatile and efficient method for DC modeling of modern transistors with very different underlying physics including MOSFET (metal-oxide-semiconductor field-effect transistor), MESFET (metal–semiconductor field-effect transistor), HBT (heterojunction bipolar transistor), HEMT (High-electron-mobility transistor) and a novel silicon-on-insulator four-gate transistors (G4FET). A set of available data from analytic solution, TCAD simulation, and experimental measurements for different operating conditions is used to empirically determine the parameters of this model and a different set of test data is used to verify its predictive accuracy. The developed model expresses the drain current as a single multivariate regression polynomial with its validity spanning across different possible operating regions as long as the chosen independent variables lie within the range of training data set. The continuity of the resulting polynomial and its first and second order derivatives make it particularly suitable for implementation in a circuit simulator. The model also provides a method for further simplification based on prior knowledge of the underlying physical mechanism and shows excellent predictive capability for different kinds of devices. This can be very useful for modeling deep-submicron emerging devices for which any closed-form analytical solution is not yet available.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

31

Lee, Ho-Shik, Yong-Pil Park und Min-Woo Cheon. „Electrical Properties of CuPc Field-effect Transistor with Different Electrodes“. Journal of the Korean Institute of Electrical and Electronic Material Engineers 21, Nr. 10 (01.10.2008): 930–33. http://dx.doi.org/10.4313/jkem.2008.21.10.930.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

32

Lan, Yann-Wen, Po-Chun Chen, Yun-Yan Lin, Ming-Yang Li, Lain-Jong Li, Yu-Ling Tu, Fu-Liang Yang, Min-Cheng Chen und Kai-Shin Li. „Scalable fabrication of a complementary logic inverter based on MoS2 fin-shaped field effect transistors“. Nanoscale Horizons 4, Nr. 3 (2019): 683–88. http://dx.doi.org/10.1039/c8nh00419f.

Der volle Inhalt der Quelle

Annotation:

Integration of both n-type and p-type MoS₂ fin-shaped field effect transistors by using a traditional implantation technique for complementary field effect transistor is demonstrated. The complementary MoS₂ inverter with high DC voltage gain of more than 20 is acquired.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

33

Халиллоев, М. M., Б. О. Жаббарова und А. А. Насиров. „Влияние формы канала на амплитуду случайных телеграфных шумов в подпороговой области беспереходного FinFET-транзистора“. Письма в журнал технической физики 45, Nr. 24 (2019): 29. http://dx.doi.org/10.21883/pjtf.2019.24.48799.18024.

Der volle Inhalt der Quelle

Annotation:

In this work it is simulated the random telegraph noise signal amplitude dependence on gate voltage overdrive for silicon on insulator junctionless FinFET transistor with fin cross section in rectangle and trapeze form. It is shown in subthreshold region the noise signal amplitude is lower in case of trapeze cross section of the fin. Besides it approximately at the same condition the noise signal amplitude is essentially lower in junctionless fin field effect transistor than in bulk, fully depleted silicon on insulator and ordinary fin field effect transistors.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

34

Abdul-Kadir, Firas Natheer, Yasir Hashim, Muhammad Nazmus Shakib und Faris Hassan Taha. „Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling“. International Journal of Electrical and Computer Engineering (IJECE) 11, Nr. 1 (01.02.2021): 780. http://dx.doi.org/10.11591/ijece.v11i1.pp780-787.

Der volle Inhalt der Quelle

Annotation:

This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors of the characteristics of tunnel field effect transistors. The Silvaco TCAD has been used to study the electrical characteristics of Si-NW TFET. Output (gate voltage-drain current) characteristics with channel dimensions were simulated. Results show that 50nm long nanowires with 9nm-18nm diameter and 3nm oxide thickness tend to have the best nanowire tunnel field effect transistor (Si-NW TFET) characteristics.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

35

Lee, Hosang, Kyoungah Cho und Sangsig Kim. „Effect of Electrode Materials on the Electrical Characteristics of Amorphous Indium-Tin-Gallium-Zinc Oxide Thin-Film Transistors“. Journal of Nanoscience and Nanotechnology 21, Nr. 8 (01.08.2021): 4325–29. http://dx.doi.org/10.1166/jnn.2021.19397.

Der volle Inhalt der Quelle

Annotation:

In this study, we investigated the effect of electrode materials on the electrical characteristics of coplanar top-gate a-ITGZO thin-film transistors, in which the gate, source, and drain electrodes were made of the same metal, Ti or Al. The field-effect mobilities of the a-ITGZO thin-film transistors with Ti and Al electrodes were 35.2 and 20.1 cm2/V·s, respectively, and the threshold voltage of the a-ITGZO thin-film transistor with Ti electrodes was −0.4 V, whereas that of the transistor with Al electrodes was −1.8; this shift is attributed to the fact that Ti has a higher work function than Al. When Ti was used as the source and drain electrode material, the channel resistance and effective channel length were reduced owing to the penetration of metal atoms into the channel region from the edge of the source/drain electrodes.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

36

Ye, Jianting, Yijin Zhang und Yoshihiro Iwasa. „Ambipolar transport in MoS2 based electric double layer transistors“. MRS Proceedings 1549 (2013): 73–78. http://dx.doi.org/10.1557/opl.2013.792.

Der volle Inhalt der Quelle

Annotation:

ABSTRACTMaking field effect transistors (FETs) on thin flake of single crystal isolated from layered materials was pioneered by the success of graphene. To overcome the difficulties of the zero band gap in graphene electronics, we report the fabrication of an electric double layer (EDL) transistor, a variant of FET, based on another layered material, MoS2. Using strong carrier tunability found in EDL coupled by ion movement, MoS2 transistor displayed an unambiguously ambipolar operation in addition to its commonly observed n-type transport. A high on/off ratio >104, large “ON” state conductivity of ∼mS, and a high reachable n2D ∼ 1×1014 cm-2 confirmed the high performance transistor operation being important for application. The high-density carriers of both holes and electrons can drive the MoS2 channel to metallic states indicating that new electronic phases could be accessed using the protocol established in making EDL gated transistors on layered materials.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

37

Ahmadi, Ramin, Mohammad Taghi Ahmadi, Seyed Saeid Rahimian Koloor und Michal Petrů. „Monolayer Twisted Graphene-Based Schottky Transistor“. Materials 14, Nr. 15 (23.07.2021): 4109. http://dx.doi.org/10.3390/ma14154109.

Der volle Inhalt der Quelle

Annotation:

The outstanding properties of graphene-based components, such as twisted graphene, motivates nanoelectronic researchers to focus on their applications in device technology. Twisted graphene as a new class of graphene structures is investigated in the platform of transistor application in this research study. Therefore, its geometry effect on Schottky transistor operation is analyzed and the relationship between the diameter of twist and number of twists are explored. A metal–semiconductor–metal twisted graphene-based junction as a Schottky transistor is considered. By employing the dispersion relation and quantum tunneling the variation of transistor performance under channel length, the diameter of twisted graphene, and the number of twists deviation are studied. The results show that twisted graphene with a smaller diameter affects the efficiency of twisted graphene-based Schottky transistors. Additionally, as another main characteristic, the ID-VGS is explored, which indicates that the threshold voltage is increased by diameter and number of twists in this type of transistor.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

38

Neudeck, Philip G., David J. Spry, Liang Yu Chen, Robert S. Okojie, Glenn M. Beheim, Roger D. Meredith und Terry L. Ferrier. „SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 °C“. Materials Science Forum 556-557 (September 2007): 831–34. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.831.

Der volle Inhalt der Quelle

Annotation:

While there have been numerous reports of short-term transistor operation at 500 °C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 °C to be considered viable for most envisioned applications. This paper reports the development of SiC field effect transistors capable of long-term electrical operation at 500 °C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 °C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 °C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 °C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 °C electrical operation.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

39

Choi, Young Jin, Jihyun Kim, Min Je Kim, Hwa Sook Ryu, Han Young Woo, Jeong Ho Cho und Joohoon Kang. „Hysteresis Behavior of the Donor–Acceptor-Type Ambipolar Semiconductor for Non-Volatile Memory Applications“. Micromachines 12, Nr. 3 (12.03.2021): 301. http://dx.doi.org/10.3390/mi12030301.

Der volle Inhalt der Quelle

Annotation:

Donor–acceptor-type organic semiconductor molecules are of great interest for potential organic field-effect transistor applications with ambipolar characteristics and non-volatile memory applications. Here, we synthesized an organic semiconductor, PDPPT-TT, and directly utilized it in both field-effect transistor and non-volatile memory applications. As-synthesized PDPPT-TT was simply spin-coated on a substrate for the device fabrications. The PDPPT-TT based field-effect transistor showed ambipolar electrical transfer characteristics. Furthermore, a gold nanoparticle-embedded dielectric layer was used as a charge trapping layer for the non-volatile memory device applications. The non-volatile memory device showed clear memory window formation as applied gate voltage increases, and electrical stability was evaluated by performing retention and cycling tests. In summary, we demonstrate that a donor–acceptor-type organic semiconductor molecule shows great potential for ambipolar field-effect transistors and non-volatile memory device applications as an important class of materials.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

40

Vu, Cao-An, und Wen-Yih Chen. „Predicting Future Prospects of Aptamers in Field-Effect Transistor Biosensors“. Molecules 25, Nr. 3 (05.02.2020): 680. http://dx.doi.org/10.3390/molecules25030680.

Der volle Inhalt der Quelle

Annotation:

Aptamers, in sensing technology, are famous for their role as receptors in versatile applications due to their high specificity and selectivity to a wide range of targets including proteins, small molecules, oligonucleotides, metal ions, viruses, and cells. The outburst of field-effect transistors provides a label-free detection and ultra-sensitive technique with significantly improved results in terms of detection of substances. However, their combination in this field is challenged by several factors. Recent advances in the discovery of aptamers and studies of Field-Effect Transistor (FET) aptasensors overcome these limitations and potentially expand the dominance of aptamers in the biosensor market.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

41

Mohammed, Bushra H., und Estabraq Talib Abdullah. „Performance Study of Pentacene based Organic Field Effect Transistor by Using monolayer, bilayer and trilayer and Gate Insulators“. Iraqi Journal of Physics (IJP) 18, Nr. 44 (27.02.2020): 85–97. http://dx.doi.org/10.30723/ijp.v18i44.512.

Der volle Inhalt der Quelle

Annotation:

In this paper, Pentacene based-organic field effect transistors (OFETs) by using monolayer , bilayer and three layers of three different gate insulators (ZrO2, PVA and CYEPL) , two layers of different gate insulators (ZrO2/PVA and ZrO2/CYEPL ) and three layers of different gate insulators (ZrO2/PVA/CYEPL) were studied its electrical performance (output (Id-Vd)and transfer(Id-Vg) characteristics)by using the gradual-channel approximation model. The device exhibits a typical output curve of a field-effect transistor (FET). Furthermore, analysis of electrical characterization was done to investigate the source-drain voltage (Vd) dependent current and note The effects of gate dielectric on electrical performance for OFET. As this work take account of effect capacitance semiconductor in performance OFETs. The values of current which calculated using MATLAB simulation exhibited a value of current increase with increasing source-drain voltage. Also the Organic Transistor modeling software was used to evaluate the transconductance calculated.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

42

Kohmyakov, A., und V. Vyurkov. „Semi-Analytical Models of Field-Effect Transistors with Low-Dimensional Channels“. Advanced Materials Research 276 (Juli 2011): 51–57. http://dx.doi.org/10.4028/www.scientific.net/amr.276.51.

Der volle Inhalt der Quelle

Annotation:

A semi-analytical model which is applicable to description of ballistic field-effect transistors with low-dimensional channels is proposed. For instance, such transistors can be manufactured on a “silicon-on-insulator” wafer. The model accounts for single-gate and double-gate structures with one-dimensional and two-dimensional channels. It differently describes the regimes of a transistor above threshold and below threshold. The first implies an essential influence of charge inside the channel on a potential distribution; the second supposes a negligible charge inside the channel. Both approaches are mainly based upon an approximate solution of the Poisson equation.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

43

Natarajamoorthy, Mathan, Jayashri Subbiah, Nurul Ezaila Alias und Michael Loong Peng Tan. „Stability Improvement of an Efficient Graphene Nanoribbon Field-Effect Transistor-Based SRAM Design“. Journal of Nanotechnology 2020 (30.04.2020): 1–7. http://dx.doi.org/10.1155/2020/7608279.

Der volle Inhalt der Quelle

Annotation:

The development of the nanoelectronics semiconductor devices leads to the shrinking of transistors channel into nanometer dimension. However, there are obstacles that appear with downscaling of the transistors primarily various short-channel effects. Graphene nanoribbon field-effect transistor (GNRFET) is an emerging technology that can potentially solve the issues of the conventional planar MOSFET imposed by quantum mechanical (QM) effects. GNRFET can also be used as static random-access memory (SRAM) circuit design due to its remarkable electronic properties. For high-speed operation, SRAM cells are more reliable and faster to be effectively utilized as memory cache. The transistor sizing constraint affects conventional 6T SRAM in a trade-off in access and write stability. This paper investigates on the stability performance in retention, access, and write mode of 15 nm GNRFET-based 6T and 8T SRAM cells with that of 16 nm FinFET and 16 nm MOSFET. The design and simulation of the SRAM model are simulated in synopsys HSPICE. GNRFET, FinFET, and MOSFET 8T SRAM cells give better performance in static noise margin (SNM) and power consumption than 6T SRAM cells. The simulation results reveal that the GNRFET, FinFET, and MOSFET-based 8T SRAM cells improved access static noise margin considerably by 58.1%, 28%, and 20.5%, respectively, as well as average power consumption significantly by 97.27%, 99.05%, and 83.3%, respectively, to the GNRFET, FinFET, and MOSFET-based 6T SRAM design.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

44

Пашенцев, В. Н. „Изменение характеристик полупроводниковых структур СВЧ-усилителей под воздействием импульсного лазерного излучения“. Журнал технической физики 91, Nr. 11 (2021): 1715. http://dx.doi.org/10.21883/jtf.2021.11.51533.43-21.

Der volle Inhalt der Quelle

Annotation:

The effect of pulsed laser radiation on the change in the parameters of semiconductor structures of field-effect transistors with a Schottky gate with an operating frequency range of 1.5–8 GHz and integrated amplifiers with an operating frequency range of 0.4–6 GHz is studied. Laser radiation with 25 ns pulse duration, incident on the transistor crystal, creates a pulsed photocurrent. It is shown that the amplitude of the pulsed photocurrent is three times higher than the operating transistor current. The current-voltage characteristics of the field-effect transistor were measured in the mode of pulsed laser radiation. The amplitude dependence of the pulsed photocurrent in semiconductor structures on the power of laser radiation for various wavelengths of 1.06 µm and 0.53 µm is studied. It is shown that as a result of the action of pulsed laser radiation on semiconductor structures, a short disappearance of the amplification of the high-frequency signal at the amplifier output occurs.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

45

Wernersson, Lars-Erik, Erik Lind, Lars Samuelson, Truls Löwgren und Jonas Ohlsson. „Nanowire Field-Effect Transistor“. Japanese Journal of Applied Physics 46, Nr. 4B (24.04.2007): 2629–31. http://dx.doi.org/10.1143/jjap.46.2629.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

46

Amman, M., K. Mullen und E. Ben‐Jacob. „The charge‐effect transistor“. Journal of Applied Physics 65, Nr. 1 (Januar 1989): 339–46. http://dx.doi.org/10.1063/1.342546.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

47

Ayasli, Y. „Field effect transistor circulators“. IEEE Transactions on Magnetics 25, Nr. 5 (1989): 3242–47. http://dx.doi.org/10.1109/20.42266.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

48

Wunderlich, J., B. G. Park, A. C. Irvine, L. P. Zarbo, E. Rozkotova, P. Nemec, V. Novak, J. Sinova und T. Jungwirth. „Spin Hall Effect Transistor“. Science 330, Nr. 6012 (23.12.2010): 1801–4. http://dx.doi.org/10.1126/science.1195816.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

49

Pfleiderer, Hans, und Wilhelm Kusian. „Ambipolar field-effect transistor“. Solid-State Electronics 29, Nr. 3 (März 1986): 317–19. http://dx.doi.org/10.1016/0038-1101(86)90210-8.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

50

Seon, Kim, Kim und Jeon. „Analytical Current-Voltage Model for Gate-All-Around Transistor with Poly-Crystalline Silicon Channel“. Electronics 8, Nr. 9 (04.09.2019): 988. http://dx.doi.org/10.3390/electronics8090988.

Der volle Inhalt der Quelle

Annotation:

Poly-crystalline silicon channel transistors have been used as a display TFT for a long time and have recently been used in a 3D vertical NAND Flash which is a transistor with 2D plane NAND upright. In addition, multi-gate transistors such as FinFETs and a gate-all-around (GAA) structure has been used to suppress the short-channel effects for logic/analog and memory applications. Compact models for poly-crystalline silicon (poly-silicon) channel planar TFTs and single crystalline silicon channel GAA MOSFETs have been developed separately, however, there are few models consider these two physics at the same time. In this work, we derived new analytical current-voltage model for GAA transistor with poly-silicon channel by considering the cylindrical coordinates and the grain boundary effect. Based on the derived formula, the compact I-V model for various operating regions and threshold voltage was proposed for the first time. The proposed model was compared with the measured data and good agreements were observed.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

Zeitschriftenartikel zum Thema „Transistor effect“

Geben Sie eine Quelle nach APA, MLA, Chicago, Harvard und anderen Zitierweisen an