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Dissertationen zum Thema „Transistor effect“
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1
Pratapgarhwala, Mustansir M. „Characterization of Transistor Matching in Silicon-Germanium Heterojunction Bipolar Transistors“. Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7536.
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Transistor mismatch is a crucial design issue in high precision analog circuits, and is investigated here for the first time in SiGe HBTs. The goal of this work is to study the effects of mismatch under extreme conditions including radiation, high temperature, and low temperature.
One portion of this work reports collector current mismatch data as a function of emitter geometry both before and after 63 MeV proton exposure for first-generation SiGe HBTs with a peak cut-off frequency of 60 GHz. However, minimal changes in device-to-device mismatch after radiation exposure were experienced.
Another part of the study involved measuring similar devices at different temperatures ranging from 298K to 377K. As a general trend, it was observed that device-to-device mismatch improved with increasing temperature.
2
Johnson, Simon. „Field effect transistor type sensors“. Thesis, Cardiff University, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.259174.
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3
Chen, Qiang. „Scaling limits and opportunities of double-gate MOSFETS“. Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/15011.
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4
Muntahi, Abdussamad. „NANOSCALE EFFECTS IN JUNCTIONLESS FIELD EFFECT TRANSISTORS“. OpenSIUC, 2018. https://opensiuc.lib.siu.edu/dissertations/1527.
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Though the concept of junctionless field effect transistor (JLFET) is old, it was not possible to fabricate a useful JLFET device, as it requires a very shallow channel region. Very recently, the emergence of new and advanced technologies has made it possible to create viable JLFET devices using nanowires. This work aims to computationally investigate the interplay of quantum size-quantization and random dopant fluctuations (RDF) effects in nanoscale JLFETs. For this purpose, a 3-D fully atomistic quantum-corrected Monte Carlo device simulator has been integrated and used in this work. The size-quantiza¬tion effect has been accounted for via a param¬eter-free effec¬tive potential scheme and benchmarked against the NEGF approach in the ballistic limit. To study the RDF effects and treat full Coulomb (electron-ion and electron-electron) interactions in the real-space and beyond the Poisson picture, the simulator implements a corrected-Coulomb electron dynamics (QC-ED) approach. The essential bandstructure and scattering parameters (energy bandgap, effective masses, and the density-of-states) have been computed using an atomistic 20-band nearest-neighbour sp3d5s* tight-binding scheme. First, an experimental device was simulated to evaluate the validity of the simulator. Because of the small dimension, quantum mechanical confinement was found to be the dominant mechanism that significantly degrades the current drive capability of nanoscale JLFETs. Surface roughness scattering is not as prominent as observed in conventional MOSFETs. Also, because of its small size, the performance of the device is prone to the effect of variability, for which a discrete doping model was proved essential. Finally, a new JLFET was designed and optimized in this work. The proposed device is based on a gate-all-around silicon nanowire. Source/drain length is 32.5 nm and channel length is 14 nm. Gate contact length is 9 nm. The EOT (equivalent oxide thickness) is 1 nm. It has a metal gate with a workfunction of 4.55 eV. The source, channel and drain regions are n-type with a doping density of 1.5×1019 cm-3. Detailed simulation shows that the two most influential mechanisms that degrade the drive capability are quantum mechanical confinement and Coulomb scattering. Surface roughness scattering is found to be very weak. In addition, thinner nanowire is more prone to Coulomb scattering exhibiting a reduced ON-current (ION). Simulation results show that silicon nanowires with a side length (width and depth) of 3 nm and a doping density of 1.5×1019 cm-3 produce satisfactory drive current.
5
Dölle, Michael. „Field effect transistor based CMOS stress sensors /“. Tönning ; Lübeck Marburg : Der Andere Verlag, 2006. http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&doc_number=016086105&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA.
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6
Takshi, Arash. „Organic metal-semiconductor field-effect transistor (OMESFET)“. Thesis, University of British Columbia, 2007. http://hdl.handle.net/2429/31531.
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Organic electronics offers the possibility of producing ultra-low-cost and large-area electronics using printing methods. Two challenges limiting the utility of printed electronic circuits are the high operating voltage and the relatively poor performance of printed transistors. It is shown that voltages can be reduced by replacing the capacitive gate used in Organic Field-Effect Transistors (OFETs) with a Schottky contact, creating a thin-film Organic Metal-Semiconductor Field-Effect Transistor (OMESFET). This geometry solves the voltage issue, and promises to be useful in situations where low voltage operation is important, but good performance is not essential. In cases where high voltage is acceptable or required, it is shown that OFET performance can be greatly improved by employing a Schottky contact as a second gate. The relatively thick insulating layer between the gate and the semiconductor in OFETs makes it necessary to employ a large change of gate voltage (~40 V) to control the drain current. In order to reduce the voltage to less than 5 V a very thin (<10 nm) insulating layer and/or high-k dielectric materials can be used, but these solutions are not compatible with current printing technology. Simulations and implementations of OMESFET devices demonstrate low voltage operation (<5 V) and improved sub-threshold swing compared to the OFET. However, these benefits are achieved at the expense of mobility. In order to achieve good performance in an OFET, including threshold voltage, current ratio and output resistance, the semiconductor thickness has to be less than 50 nm, whereas the thickness of a printed semiconductor is typically larger than 200 nm. The addition of a top Schottky contact on the OFET creates a depletion region thereby reducing the effective thickness of the semiconductor, and resulting in enhanced transistor performance. Simulations and experimental results show improvements in the threshold voltage, the current ratio, and the output resistance of a dual gate transistor, when compared to those in an OFET of the same thickness. The transistors introduced in this work demonstrate means of improving the performance of thick-film OFETs and of achieving substantially lower operation voltage in organic transistors.Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
7
Wiederspahn, H. Lee. „Quantum model of the modulation doped field effect transistor“. Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/13355.
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8
Lebby, M. S. „Fabrication and characterisation of the Heterojunction field effect transistor (HFET) and the bipolar inversion channel field effect transistor (BIFCET)“. Thesis, University of Bradford, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.379863.
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9
Lee, Yi-Che. „Development of III-nitride transistors: heterojunction bipolar transistors and field-effect transistors“. Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/53472.
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The fabrication processes development for on III-nitride (III-N) heterojunction bipolar transistors (HBTs), heterojunction field-effect transistors (HFETs) and metal-insulator-semiconductor field-effect transistors (MISFETs) were performed. D.c, microwave and quasi-static I-V and C-V measurements were carried out to characterize the fabricated III-N transistors and diodes. The GaN/InGaN direct-growth HBTs (DG-HBTs) grown on free-standing GaN (FS-GaN) substrates demonstrated a high current gain (hfe) > 110, high current density (JC) > 141 kA/cm2, and high power density (Pdc) > 3 MW/cm2. The first III-N DG-HBT showing fT > 8 GHz and fmax > 1.3 GHz were also demonstrated on sapphire substrates. Recessed-gate AlGaN/AlN/GaN HFETs demonstrated Vth = 0 V with 0.17 V deviation across the sample. Baliga's figure of merit is 240 MW/cm2 was achieved. Current collapse was eliminated and the dynamic on-resistance was reduced by 67% after using a remote-oxygen-plasma treatment. Normally-off recessed-gate AlGaN/AlN/GaN MISFETs with Vth = 0.9 V were also fabricated with the remote-oxygen-plasma treatment. Low leakage current (< 1 pA/mm), high on-off ratio (> 2.2E11) are achieved. These achievements suggest that high-performance III-N transistors are very promising for high-power switching and microwave amplification. Findings concerning remaining process issues and implications for future research are also discussed.
10
Günther, Alrun Aline. „Vertical Organic Field-Effect Transistors“. Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-207731.
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Diese Arbeit stellt eine eingehende Studie des sogenannten Vertikalen Organischen Feld-Effekt-Transistors (VOFET) dar, einer neuen Transistor-Geometrie, welche dem stetig wachsenden Bereich der organischen Elektronik entspringt. Dieses neuartige Bauteil hat bereits bewiesen, dass es in der Lage ist, eine der fundamentalen Einschränkungen herkömmlicher organischer Feld-Effekt-Transistoren (OFETs) zu überwinden: Die für Schaltfrequenz und An-Strom wichtige Kanallänge des Transistors kann im VOFET stark reduziert werden, ohne dass teure und komplexe Strukturierungsmethoden genutzt werden müssen. Das genaue Funktionsprinzip des VOFET ist bisher jedoch weitgehend unerforscht. Durch den Vergleich von experimentellen Daten mit Simulationsdaten des erwarteten Bauteil-Verhaltens wird hier ein erstes, grundlegendes Verständnis des VOFETs erarbeitet. Die so gewonnenen Erkenntnisse werden im Folgenden genutzt, um bestimmte Parameter des VOFETs kontrolliert zu manipulieren. So wird beispielsweise gezeigt, dass die Morphologie des organischen Halbleiters, und damit seine Abscheidungsparameter, sowohl für die VOFET-Herstellung als auch für den Ladungsträgertransport im fertigen Bauteil eine wichtige Rolle spielen. Weiterhin wird gezeigt, dass der VOFET, genau wie der konventionelle OFET, durch das Einbringen von Kontaktdotierung deutlich verbessert werden kann. Mit Hilfe dieser Ergebnisse kann gezeigt werden, dass das Funktionsprinzip des VOFETs mit dem eines konventionellen OFETs nahezu identisch ist, wenn man von geringen Abweichungen aufgrund der unterschiedlichen Geometrien absieht. Basierend auf dieser Erkenntnis wird schließlich ein VOFET präsentiert, welcher im Inversionsmodus betrieben werden kann und so die Lücke zur konventionellen MOSFET-Technologie schließt. Dieser Inversions-VOFET stellt folglich einen vielversprechenden Ansatz für leistungsfähige organische Transistoren dar, welche als Grundbausteine für komplexe Elektronikanwendungen auf flexiblen Substraten genutzt werden könnenThis work represents a comprehensive study of the so-called vertical organic field-effect transistor (VOFET), a novel transistor geometry originating from the fast-growing field of organic electronics. This device has already demonstrated its potential to overcome one of the fundamental limitations met in conventional organic transistor architectures (OFETs): In the VOFET, it is possible to reduce the channel length and thus increase On-state current and switching frequency without using expensive and complex structuring methods. Yet the VOFET's operational principles are presently not understood in full detail. By simulating the expected device behaviour and correlating it with experimental findings, a basic understanding of the charge transport in VOFETs is established and this knowledge is subsequently applied in order to manipulate certain parameters and materials in the VOFET. In particular, it is found that the morphology, and thus the deposition parameters, of the organic semiconductor play an important role, both for a successful VOFET fabrication and for the charge transport in the finished device. Furthermore, it is shown that VOFETs, just like their conventional counterparts, are greatly improved by the application of contact doping. This result, in turn, is used to demonstrate that the VOFET essentially works in almost exactly the same way as a conventional OFET, with only minor changes due to the altered contact arrangement. Working from this realisation, a vertical organic transistor is developed which operates in the inversion regime, thus closing the gap to conventional MOSFET technology and providing a truly promising candidate for high-performance organic transistors as the building blocks for advanced, flexible electronics applications
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Chiu, Yu-Jui. „Wet Organic Field Effect Transistor as DNA sensor“. Thesis, Linköping University, The Department of Physics, Chemistry and Biology, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-11761.
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Label-free detection of DNA has been successfully demonstrated on field effect transistor (FET) based devices. Since conducting organic materials was discovered and have attracted more and more research efforts by their profound advantages, this work will focus on utilizing an organic field effect transistor (OFET) as DNA sensor.
An OFET constructed with a transporting fluidic channel, WetOFET, forms a fluid-polymer (active layer) interface where the probe DNA can be introduced. DNA hybridization and non-hybridization after injecting target DNA and non-target DNA were monitored by transistor characteristics. The Hysteresis area of transfer curve increased after DNA hybridization which may be caused by the increasing electrostatic screening induced by the increasing negative charge from target DNA. The different morphology of coating surface could also influence the OFET response.
12
Sou, Antony. „Principles of organic field effect transistor circuit design“. Thesis, University of Cambridge, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.708548.
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13
Mihăilă, Andrei-Petru. „Silicon carbide high power field effect transistor switches“. Thesis, University of Cambridge, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.614951.
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14
Goldhaber-Gordon, David Joshua 1972. „The Kondo effect in a single-electron transistor“. Thesis, Massachusetts Institute of Technology, 1999. http://hdl.handle.net/1721.1/9450.
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Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Physics, 1999.Title as it appears in MIT commencement exercises program, June 1999, has the added subtitle: Strong coupling and many body effects.
Includes bibliographical references (p. 115-124).
The Kondo effect, which occurs when a metal with magnetic impurities is cooled to low temperatures, has been a focus of research in solid-state physics for several decades. I have designed, fabricated, and measured a system which behaves as a single "artificial" impurity in a metal, displaying the Kondo effect. This so-called Single-Electron Transistor (SET) has several advantages over the classic bulk Kondo systems. Most obviously, only one impurity is involved, so there is no need to worry about interactions between impurities, or different impurities feeling different environments. But even more importantly all the parameters of the system, such as the binding energy of electrons on the impurity and the tunneling rate between metal and impurity, can be tuned in-situ, allowing detailed quantitative comparison to thirty years of theoretical developments whose details could not be tested in previously-studied Kondo systems.
by David Joshua Goldhaber-Gordon.
Ph.D.
15
Speer, Kevin M. „The Silicon Carbide Vacuum Field-Effect Transistor (VacFET)“. Case Western Reserve University School of Graduate Studies / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=case1301445427.
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16
Tian, Jing. „Theory, modelling and implementation of graphene field-effect transistor“. Thesis, Queen Mary, University of London, 2017. http://qmro.qmul.ac.uk/xmlui/handle/123456789/31870.
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Two-dimensional materials with atomic thickness have attracted a lot of attention from researchers worldwide due to their excellent electronic and optical properties. As the silicon technology is approaching its limit, graphene with ultrahigh carrier mobility and ultralow resistivity shows the potential as channel material for novel high speed transistor beyond silicon. This thesis summarises my Ph.D. work including the theory and modelling of graphene field-effect transistors (GFETs) as well as their potential RF applications. The introduction and review of existing graphene transistors are presented. Multiscale modelling approaches for graphene devices are also introduced. A novel analytical GFET model based on the drift-diffusion transport theory is then developed for RF/microwave circuit analysis. Since the electrons and holes have different mobility variations against the channel potential in graphene, the ambipolar GFET cannot be modelled with constant carrier mobility. A new carrier mobility function, which enables the accurate modelling of the ambipolar property of GFET, is hence developed for this purpose. The new model takes into account the carrier mobility variation against the bias voltage as well as the mobility difference between electrons and holes. It is proved to be more accurate for the DC current calculation. The model has been written in Verilog-A language and can be import into commercial software such as Keysight ADS for circuit simulation. In addition, based on the proposed model two GFET non-Foster circuits (NFCs) are conducted. As a negative impedance element, NFCs find their applications in impedance matching of electrically small antennas and bandwidth improvement of metasurfaces. One of the NFCs studied in this thesis is based on the Linvill's technique in which a pair of identical GFETs is used while the other circuit utilises the negative resistance of a single GFET. The stability analysis of NFCs is also presented. Finally, a high impedance surface loaded with proposed NFCs is also studied, demonstrating significant bandwidth enhancement.
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Shi, Xuejie. „Compact modeling of double-gate metal-oxide-semiconductor field-effect transistor /“. View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202006%20SHI.
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18
Polk, Brian Joseph. „Development of chemically sensitive field-effect transistor arrays and selective materials“. Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/31008.
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Liu, Shiyi. „Understanding Doped Organic Field-Effect Transistors“. Kent State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=kent1574127009556301.
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Pouységur, Michel. „Effets de surface et bruits en exces dans le transistor a effet de champ sur arseniure de gallium“. Toulouse 3, 1987. http://www.theses.fr/1987TOU30093.
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Un nouveau modele du bruit en exces basse-frequence dans les structures gaas est presente dans ce memoire. Il est base sur l'etude precise du comportement electrique de la zone interelectrodes des composants. Il prend en compte deux phenomenes distincts propres a cette region et qui agissent en particulier sur le bruit de fond electrique. La prise en compte simultanee de ces deux phenomenes permet de rendre compte avec precision de certains comportements du bruit basse-frequence jusqu'alors inexpliques dans les structures gaas. Il s'agit en particulier du bruit en 1/f**(3/2) communement mesure sur des composants de technologie avancee. La validite du modele est verifiee par de nombreuses experiences et mesures realisees sur plusieurs types de composants. Une etroite correlation est mise en evidence entre les caracteristiques de la surface des composants et leur comportement en bruit. Ce modele permet egalement de definir diverses ameliorations technologiques susceptibles dans l'avenir de minimiser le bruit de fond electrique basse-frequence des composants gaas
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Morvan, Marjorie. „Etude des transistors à effet de champ organiques : réalisation d'OFETs ambipolaires et étude des mécanismes d'injection dans les OFETs verticaux“. Thesis, Toulouse 3, 2020. http://www.theses.fr/2020TOU30175.
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L'utilisation de Transistors à Effet de Champ Organiques (OFETs) est de plus en plus attractive grâce à la possibilité de production de composants plus légers, fabriqués à un moindre coût et sur des substrats flexibles. Le fait de pouvoir coupler une fonction émission de lumière à une fonction transistor rend son utilisation d'autant plus intéressante. C'est le cas des applications d'affichage, où les pixels sont réalisés par une technologie de matrice active à diodes électroluminescentes organiques (AMOLED). Le fait d'avoir un OFET électroluminescent permet de combiner un OFET avec une diode électroluminescente organique (OLED) et donc de simplifier la conception, les étapes de fabrication ainsi que d'augmenter la durée de vie des pixels. Durant cette thèse, l'étude et la fabrication des OFETs émetteurs de lumière ont été menés selon deux approches. La première est basée sur l'étude d'OFETs ambipolaires à base de N,N'-ditridecyl-3,4,9,10-perylenetetracarboxylic diimide (PTCDI-C13), un semi-conducteur de type-n, et de pentacène, un semi-conducteur de type-p, ce qui constitue une première étape à l'obtention d'OFET électroluminescent. La fabrication et la caractérisation de ces OFETs ambipolaires ont été réalisées pour la première fois dans l'équipe de recherche du laboratoire. Une étude de leur structure a été menée pour trouver les paramètres idéaux à l'obtention d'un transport de charges équilibré. La structure optimisée est une structure bicouche avec une épaisseur de pentacène de 8 nm et une épaisseur de PTCDI-C13 de 20 nm. L'ajout d'une couche émettrice entre les deux semi-conducteurs n'a pas permis d'obtenir une émission de lumière à cause du piégeage de charges trop important. Cependant, ce travail a ouvert de nouvelles perspectives pour les futurs travaux sur les OFETs ambipolaires. La deuxième approche pour étudier les OFETs émetteurs de lumière est plus innovante grâce au changement de la structure des transistors organiques classiques par une structure verticale. Cette structure présente l'avantage de pouvoir intégrer facilement une structure OLED et d'avoir une émission de lumière homogène sur une grande surface. Le principe de fonctionnement est totalement différent des OFETs classiques : ici, la modulation du courant ne se fait plus par un contrôle de la conductivité dans un canal semi-conducteur, mais par un contrôle de l'injection de charges au niveau de l'électrode source. L'étude de cette structure a permis d'obtenir des transistors organiques lumineux. Ensuite, l'étude des mécanismes d'injection de charges a permis de mieux comprendre le fonctionnement de ces transistors. Plusieurs matériaux ont été testés en tant qu'électrode source : l'or, l'argent, l'aluminium et l'ITO (Indium Tin Oxyde). Cela a permis de déterminer le mécanisme d'injection mis en jeu, soit l'injection de charges par la modulation de l'effet tunnel grâce à la courbure de bande induite par l'effet de grille dans la couche semi-conductrice proche de l'interface. Il a également été identifié que la qualité de l'interface électrode source/semi-conducteur joue un rôle majeur puisqu'une mauvaise qualité d'interface entraîne une diminution drastique des performancesOrganic Field Effect Transistors (OFETs) is increasingly attractive thanks to the possibility of producing lighter components at lower cost and on flexible substrates. Being able to couple a light emission function to a transistor function makes its use more interesting. This is the case with display applications, where the pixels are produced by an active matrix technology of organic light-emitting diodes (AMOLED). Having a light-emitting OFET makes possible to combine an OFET with an organic light-emitting diode (OLED) and thus simplifying the design, the manufacturing steps as well as increasing the lifetime of pixels. During this thesis, the study and manufacture of light-emitting OFETs were carried out using two approaches. The first one is based on the study of ambipolar OFETs based on N, N'-ditridecyl-3,4,9,10-perylenetetracarboxylic diimide (PTCDI-C13), an n-type semiconductor, and pentacene, a p-type semiconductor. This study constitutes the first step in obtaining electroluminescent OFETs. The fabrication and characterization of these ambipolar OFETs were performed for the first time in the laboratory's research team. A study of their structure was carried out to find the ideal parameters to obtain a balanced charge transport. The optimized structure is a bilayer structure with a pentacene thickness of 8 nm and a PTCDI-C13 thickness of 20 nm. The addition of an emitting layer between the two semiconductors failed to achieve light emission due to excessive charges trapping. However, this study has opened up new perspectives for future work on ambipolar OFETs. The second approach to study light-emitting OFETs is more innovative thanks to the change of the structure from a classic planar structure to a vertical one. This structure has the advantage of being able to easily integrate an OLED structure and has a homogeneous light emission over a large area. The operating principle is totally different from conventional OFETs: here, the current modulation is no longer done by controlling the conductivity in a semiconductor channel, but by controlling the injection of charges at the source electrode. The study of this structure made it possible to obtain luminous organic transistors. Then, the study of charge injection mechanisms allowed us to understand more deeply the operating principe of these transistors. Several materials have been tested as the source electrode: gold, silver, aluminum and ITO (Indium Tin Oxide). This study allowed us to determine the injection mechanism involved, namely the injection of charges by the modulation of the tunnel effect thanks to the band bending induced by the gate effect in the semiconductor layer close to the interface. It has also been identified that the quality of the source electrode/semiconductor interface plays a major role since poor interface quality leads to a drastic decrease in performance
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Verma, Vishash. „Improved Slope Estimation in Organic Field-Effect Transistor Mobility Estimation“. Kent State University / OhioLINK, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=kent1618703169092189.
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23
Ogier, Jean-Luc. „Optimisation de structures et de technologies pour la réalisation de drain-source de transistors MOS submicroniques“. Université Joseph Fourier (Grenoble), 1993. http://www.theses.fr/1993GRE10167.
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Afin de reduire les effets de canaux courts et de porteurs chauds, nous avons etudie differentes solutions technologiques concernant les drain/source de transistors metal oxyde silicium (mos) submicroniques. Cette etude a ete realisee dans le cadre de filieres cmos (mos complementaires) submicroniques (0. 7-0. 5-0. 35 micron). Concernant le transistor nmos, notre etude vise a reduire les phenomenes de degradations par porteurs chauds qui affectent la fiabilite du dispositif. Nous nous interessons uniquement a la partie faiblement dopee du drain (ldd). Nous presentons dans un premier temps les resultats concernant la comparaison ldd arsenic/phosphore pour une technologie 0. 5 micron. Nous abordons ensuite l'etude d'une structure ldd implantee avec un fort angle de tilt dans le cadre d'un procede 0. 35 micron. Pour le transistor pmos, nous presentons differents essais visant a reduire la profondeur des jonctions de drain/source et nous traitons l'aspect degradation par porteurs chauds avec l'etude de la structure ldd pmos. Cette etude s'est concretisee par l'adoption de choix technologiques sur les filieres du cnet et de ses partenaires (matra-mhs, centre commun cnet-st)
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Lincoln, Derek M. „The electronic structure and field effects of an organic-based room temperature magnetic semiconductor“. Columbus, Ohio : Ohio State University, 2007. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1193833038.
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Anaya, Armando Alonso. „Spin Valve Effect in Ferromagnet-Superconductor-Ferromagnet Single Electron Transistor“. Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6864.
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This thesis describes a research of suppression of superconducting gap in a superconducting island of a Ferromagnetic-Superconducting-Ferromagnetic Single-Electron-Transistor due to the fringing magnetic fields produced by the ferromagnetic leads. The devices are working below the critical temperature of the superconducting gap. A model is proposed to explain how the fringing magnetic field produced by the leads is strong enough to suppress the superconducting gap. The peak of the fringing magnetic field produced by one lead reaches 5000 oe. It is observed an inverse tunneling magneto resistance during the suppression of the superconducting gap, obtaining a maximum absolute value 500 times greater than the TMR in the normal state where the efficiency of the spin injection is low.
It is concluded that the suppression of the superconducting gap is due to fringing magnetic field and not to the spin accumulation because the low efficiency of the spin injection. It is suggested a new geometry to reduce the effect of the fringing magnetic field so it can be obtained a suppression of the superconductivity due to the spin accumulation. It is described the qualitatively behavior of the IV characteristic when the suppression of the superconductivity is due to spin accumulation.
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Donnellan, Benedict T. „Introducing the hybrid unipolar bipolar field effect transistor : the HUBFET“. Thesis, University of Warwick, 2013. http://wrap.warwick.ac.uk/57699/.
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Modern commercial aircraft are becoming increasingly dependent on electrical power. More and more of the systems traditionally powered by hydraulics or pneumatics are being migrated to run on electricity. One consequence of the move towards electrical power is the increase in the storage capacity of the bat- teries used to supplement the power generation. The increase in battery size increases the maximum stress that a short circuit failure can put on the power distribution system. Although such failures are extremely rare, the fail safe switches in the distribution system must be capable of handling extremely high energy short circuits and turning off the power to protect the electrical systems from damage. Traditionally aircraft have used electromechanical relays in this role. However, they are large, heavy and slow to switch. As the potential power level is increased, the slow switching becomes more of a problem. The solution is a semiconductor switch. An IGBT can handle the high short circuit currents and switches fast enough to prevent short circuits damaging key systems. However, the inherent voltage drop in the forward current path significantly reduces its efficiency during nominal operation. A power MOSFET would be considerably more efficient than an IGBT during nominal operation. However, during high current surges, the ohmic behaviour of the switch leads to extremely high power loss and thermal failure. In this thesis a solution to this problem is presented. A new class of semiconductor device is proposed that has the highly efficient low current performance of the power MOSFET and the high current handling capability of the IGBT. The device has been named the Hybrid Unipolar Bipolar Field Effect Transistor or HUBFET. The HUBFET operates in unipolar mode, like a MOSFET, at low currents and in bipolar mode, like an IGBT, at high currents. The structure of the HUBFET is a merging of the MOSFET and IGBT. It is a vertical device with a traditional MOS gate structure, however the backside consists of alternating regions of both N-type and P-type doping. Through simulation the key on-state characteristics of the HUBFET have been shown. Fabricated test modules have been tested to validate the simulations and to show how the HUBFET can dynamically transistion from unipolar to bipolar mode during a short circuit event. Following the proof of concept the pattern of implants on the backside of the device that give the HUBFET its characteristic were investigated and potential improvements to the design were identified.
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Barker, Paul Simon. „Gas sensing using an organic/silicon hybrid field-effect transistor“. Thesis, Durham University, 1996. http://etheses.dur.ac.uk/5166/.
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This thesis describes the fabrication and properties of novel organic/silicon hybrid field-effect transistor gas sensors. Whilst most of the work used the emeraldine base form of the conductive polymer polyaniline, the response of a device incorporating a metal-free phthalocyanine is also reported. Arrays of p-type transistors in which the gate electrodes were replaced by 'charge-flow' capacitors were fabricated using standard semiconductor processing techniques. Each array consisted of four devices in which the width of metallisation removed from the gate electrode (total width 72 µm) varied from 0 µm (i.e. the control device) to 35 µm. Thin films of the gas-sensitive organic materials were deposited by spin-coating, and chemically patterned within the holes in the gate metallisation. A delay, referred to as the 'turn-on' response, was observed in the drain current on application of a gate voltage. This was shown to depend on the temperature, level of humidity and the presence of certain gases. The electrical operating characteristics of the hybrid device with and without the polyaniline were examined. These included capacitance-voltage measurements, the 'turn-on' response at different temperatures and the variation of threshold voltage with temperature. From these results an understanding of the effect of integrating polyaniline within a p-channel transistor structure was obtained. The 35 µm gate-hole sensor incorporating polyaniline was found to be sensitive to NO(_x) and SO(_2) at room temperature at concentrations as low as 1 or 2 ppm. Decreasing the gate-hole area, and therefore the surface area of polyaniline, reduced the sensitivity of the device. The reactions were found to be reversible, although complete recovery required approximately eight hours. A similar sensor incorporating a metal-free phthalocyanine compound was reversibly sensitive to 2 ppm NO(_x) with a more rapid recovery of five hours. There was no observable response to SO(_2) or H(_2)S up to 30 ppm.
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Tu, Ryan H. „Germanium nanowire controlled synthesis, alignment, and field-effect-transistor characteristics /“. May be available electronically:, 2007. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.
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Li, Yan-Ting, und 李彥霆. „Silicon Nanowire Field Effect Transistor“. Thesis, 2009. http://ndltd.ncl.edu.tw/handle/03308574110536019676.
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Hsu, Shih-Chao, und 徐士超. „polysilicon nanometer Field Effect Transistor“. Thesis, 2008. http://ndltd.ncl.edu.tw/handle/39883084869531574337.
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碩士國立臺灣大學
電子工程學研究所
96
Medicine progresses toward Diagnostics based on molecular marker, and highly specific therapies aimed at molecular targets, the necessity for high-throughput methods for the detection of biomolecule increases. Technology platform that provide diagnostics which is reliable, rapid, quantitative, low-cost and muti-channel identification of biomarkers. Disease could be found early. Early detection of cancer are treated with the greatest possibility of success. Due to lithography technology’s progressing, device’s dimension has decreased to nanometer. Recently nanowire has been proposed to detect proteins, DNA, ions…etc. Nanowire used to function as biosensor had been showed, which was made either by CVD(chemical vapor deposition) or by using SOI(silicon on insulator). The former has trouble in electrode arranging, and the latter is suffer from higher cost than standard semiconductor process. In thesis, we announced a new way to solve the problems. We fabricate polysilicon nanowire field effect transistor to sense pH value. In the first part of thesis, we made FET with bottom gate. And When measuring pH value, device layer is cover by photoresist. Channel is open by aligner. The structure not only doesn''t have problem in arranging electrode but also could be made by standard semiconductor process. In the future, it will be used to detect biomolecules
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Yu, Lin Ting, und 林庭宇. „Silicon Nanowire Field Effect Transistor“. Thesis, 2008. http://ndltd.ncl.edu.tw/handle/3kg2wf.
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碩士國立臺灣師範大學
光電科技研究所
96
As semiconductor devices are scaled into to the deep submicron meter regime, surrounding-gated silicon on insulator metal-oxide-semiconductor field effect transistors have shown promise in both the short-channel effect and in achieving a nearly ideal subthreshold slope. To control the surrounding-gated SOI MOSFET’s very well, when they are applied to the VLSI, there is a need to develop an accurate model for the suspended silicon nanowire field effect transistors. In this study, we use the well developed silicon semiconductor process and the Stress Limited Oxidation to fabricate fully-surround gated silicon nanowire field effect transistor. The present SiNW-FET had dimensions of 20 ~ 50 nm in diameter and 200 ~ 400 nm in length, and exhibited well pronounced classical field effect transistor characteristics and Coulomb-blockade phenomena at room temperature. The I=V staircases may be attributed to charging of As islands with sizes in the nanometer region, formed by As atoms from the top silicon layer of SOI wafer during ion implantation. These results open a new path to build a SiNWs by minimizing the diameter below 50 nm.
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Steele, Jennifer Marie. „Polyimide-based field effect transistor structures“. Thesis, 1999. http://hdl.handle.net/1911/17381.
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Because of the electrical insulating properties of polyimide, it is widely used in the packaging of semiconductor chips. However, it has been documented that the electrical resistivity can be decreased by several orders of magnitude to about 0.1--1 O-cm when irradiated with ultraviolet laser light. This unique property of polyimide can be exploited to fabricate devices. In this study, capacitor structures on silicon wafers were created using a laser-modified layer of conducting polyimide as the top plate and a still intact layer unmodified polyimide as the insulator. This work quantifies the properties and quality of these capacitor structures and optimizes the procedure for fabricating them. First, the capacitor-insulator transition of thin film polyimide on silicon wafers were characterized and compared to bulk experiments. Then capacitor structures were fabricated and studied. Finally, an unexpected frequency response was discovered originating from the conductivity of the laser-modified polyimide. This frequency response was successfully modeled in PSPICE.
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Chen, kuan jen, und 陳冠任. „Study of New Generation Field-Effect Transistor and Thin-Film Transistor Technology“. Thesis, 2009. http://ndltd.ncl.edu.tw/handle/80139597613652112896.
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碩士國立臺灣師範大學
光電科技研究所
97
Today, as MOSFET’s gate length getting small, to increase driving current and enhance gate control capability. in order to satisfy these requirements , It isn't comform to the semiconductor nowadays that SiO2 uses for gate oxide. Because the thickness of the insulator SiO2 will need to be reduced to small nanometer length, while keeping the EOT (equivalent oxide thickness) to maintain the characteristics of the devices. In the paper, in nanometer technology node, however, the electrons of the gate can flow through gate oxide into drain by tunneling in this place , and produce large leakage current . Using a new material with a dielectric constant greater than that of SiO2 to replace SiO2 film as gate dielectrics is an indispensable task.. Using insulators with high dielectric constant is one of the attractive and popular method to research the problem. Besides, SiGe materials has an important technique for improving the device performance other than conventional scaling method. Germanium can provide large mobility enhancement for CMOS. It will be of great importance to know the theoretical limit of mobility under various channel direction, and substrate orientation for device. In this research, we use the anneal process and fabrication that get good quality of HfSiOx film and metal TiN. There are suppression of leakage current and reduce of oxide layer for the device.
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Cho, Hsingwei, und 卓星瑋. „Current Switching Effect In The Nanopillar Transistor“. Thesis, 2012. http://ndltd.ncl.edu.tw/handle/95686202312995871623.
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碩士義守大學
電子工程學系
100
In this work, we experimentally fabricate SiNx/Poly-silicon/SiNx nanostrunctres. Because of crystalline defects in polysilicon, random telegraph signals are observed in current-voltage characteristics. These high and low conductance state can be used for memory devices.
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Lin, Tzer Min, und 林澤民. „Graded Multi-delta Doping Field Effect Transistor“. Thesis, 1998. http://ndltd.ncl.edu.tw/handle/62058468005186454091.
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Su, Ke-Hua, und 蘇科化. „Device Linearity Improvement inHeterostructure Field Effect Transistor“. Thesis, 2004. http://ndltd.ncl.edu.tw/handle/89762619666830849254.
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碩士國立成功大學
微電子工程研究所碩博士班
92
In this thesis, we utilized symmetric doped channel structure and InGaAsN channel layer that contains dilute nitride material, both grown by Molecular beam epitaxy (MBE), to improve gate voltage swing. In the first part , we use the symmetric doped channel by changing the In composition. The electrons in the channel will be confined well in the bottom of the V-shape conduction band. Thus, in the meantime the electrons are less closer to the AlGaAs/InGaAs interface, and Coulomb scattering lower down. Consequently, the gate voltage swing will increase. When the gate dimension is 1.2×100 μm2 at room temperature, the gate voltage swing will reach to 1.75 V . At the same time , the electron mobility will increase in the channel layer of symmetric doped channel structure, the higher drain current density and electron mobility can be obtained. In the second part, the shortcoming of conventional AlGaAs/InGaAs HEMT is that the gate voltage swing is too small. By incorporating InGaAs with a proper amount of N, a quaternary material lattice-matched to GaAs can be obtained with a significant energy bandgap reduction. An increase of the conduction band offset makes the InGaAsN alloy obvious for improving gate voltage swing. When the gate dimension is 1.2×100 μm2 at room temperature, the gate voltage swing will reach to 1.15 V. We also can find the result of AC characteristics of graded-composition symmetric doped channel FET is better than that of conventional doped channel FET. The current gain cut-off frequency (ft) and maximum oscillation frequency (fmax) are 11.2 GHz and 26.7 GHz, respectively. The device exhibited an output power of 12.54 dBm. The associated power-added efficiency is 48%, and the linear power gain is 17.49 dB. At 2.4 GHz, the minimum noise figure is 2.52 dB.
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LIU, JING-MENG, und 劉景萌. „GaAs P/N junction field effect transistor“. Thesis, 1988. http://ndltd.ncl.edu.tw/handle/86509850216458815066.
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SONG, HONG-ZHENG, und 宋弘政. „Short channel V groove field effect transistor“. Thesis, 1989. http://ndltd.ncl.edu.tw/handle/64331593727557706381.
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Simões, João Pedro Rodrigues Branco de Almeida de. „Development of paper transistor with memory effect“. Master's thesis, 2015. http://hdl.handle.net/10362/16600.
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This work will discuss the use of different paper membranes as both the substrate and dielectric for field-effect memory transistors. Three different nanofibrillated cellulose membranes (NFC) were used as the dielectric layer of the memory transistors (NFC), one with no additives, one with an added polymer PAE and one with added HCl. Gallium indium zinc oxide (GIZO) was used as the device’s semiconductor and gallium aluminium zinc oxide (GAZO) was used as the gate electrode. Fourier transform infrared spectroscopy (FTIR) was used to access the water content of the paper membranes before and after vacuum. It was found that the devices recovered their water too quickly for a difference to be noticeable in FTIR. The transistor’s electrical
performance tests yielded a maximum ION/IOFF ratio of around 3,52x105 and a maximum subthreshold swing of 0,804 V/decade. The retention time of the dielectric charge that grants the transistor its memory capabilities was accessed by the measurement of the drain current periodically during 144 days. During this period the
mean drain current did not lower, leaving the retention time of the device indeterminate. These results were compared with similar devices revealing these devices to be at the top tier of the state-of-the-art.
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Yang, Ching-Shun, und 楊清舜. „InAlGaP/GaAs Field-Effect Transistor and Bipolar Transistor Grown by Metalorganic Chemical Vapor Deposition“. Thesis, 1999. http://ndltd.ncl.edu.tw/handle/47457831813247887719.
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碩士國立成功大學
電機工程學系
87
In this thesis, an In0.5(Al0.33Ga0.67)0.5P/GaAs tunneling emitter bipolar transistor (TEBT) and metal-semiconductor field-effect transistor (MESFET) have been successfully fabricated by metalorganic chemical vapor deposition (MOCVD). An In0.5(Al0.33Ga0.67)0.5P tunneling barrier was inserted between the emitter and the base to increase the emitter injection efficiency due to the very large difference in the tunneling probabilities for electrons and holes. The current gain and common-emitter breakdown voltage are 10 and 17.4V respectively for the TEBT. Meanwhile, we adopt the In0.5(Al0.33Ga0.67)0.5P as an active channel layer to improve breakdown characteristics due to its largest bandgap among III-V material (about 2.25eV). High gate-to-drain breakdown voltage of 40V is achieved. A maximum transconductance of 168 mS/mm and a maximum drain current density of 284 mA/mm with a gate length of 1.5lm are obtained. The high two terminal breakdown characteristics of In0.5(Al0.33Ga0.67)0.5P MESFET is significantly superior to those of GaAs MESFET.
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Fahad, Hossain M. „Cylindrical Field Effect Transistor: A Full Volume Inversion Device“. Thesis, 2010. http://hdl.handle.net/10754/133952.
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The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors.
Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.
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Ramesha, A. „Sub-Threshold Slope Modeling & Gate Alignment Issues In Tunnel Field Effect Transistor“. Thesis, 2008. http://hdl.handle.net/2005/792.
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The Tunnel Field Effect Transistor (TFET) with sub-60mV/decade Sub-threshold slope and extremely high ION/IOFF ratio has attracted enough attention for low standby power (LSTP) applications where the battery life is very important. So far research in this area has been limited to numerical simulation and experimental analysis. It is however extremely necessary to develop compact models for TFET in order to use them in nano-scale integrated circuit design and simulation. In this work, for the first time, we develop analytical Sub-threshold slope model for n-channel double gate TFET (nDGTFET). Unlike conventional FETs, current in TFET is mainly controlled by the band-to-band tunneling mechanism at source/channel interface. As the total drain current is proportional to band-to-band generation rate, the main challenge in the present work is to find an explicit relationship between average electric field over the tunneling path and the applied gate voltage under nonlocal tunneling condition. Two dimensional Poisson’s equation (with Laplace approximation)is first solved in a rectangular coordinate system in order to obtain analytical expression for electron energy distribution over the channel region.Kane’s Model[J. Phy. Chem.Solids 12(181)1959]for band-to-band tunneling along with some analytical approximation techniques are then used to derive the expression for the Sub-threshold slope under nonlocal tunneling conditions. This Sub-threshold slope model is verified against professional numerical device simulator (MEDICI) for different device geometries.
Being an asymmetric device, TFET fabrication suffers from source misalignment with gate. As the doping in source and drain-gate are different, conventional-FET-like self-aligned gate stack formation is not possible for TFET. Such misalignment, at source side, seriously degrades the performance of TFETs. To overcome this problem, in this work we explore the possibility of using “gate replacement” technique for TFET fabrication. We first develop process flow for single gate bulk nTFET, and then we extend it to n-channel double gate TFET (nDGTFET) using modified FinFET process. Good alignments between source and gate are observed with TCAD-simulations in both the cases.
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Peng-HanWang und 王鵬翰. „Polarization effect of electrets in organic field-effect transistor based memories“. Thesis, 2015. http://ndltd.ncl.edu.tw/handle/99179882055391950390.
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碩士國立成功大學
光電科學與工程學系
103
In this study, we discuss the relationship between the electrical performance of organic non-volatile memory devices (ONVMs) and the distribution of carrier-trapping sites in polymer films. To increase the permittivity of polymeric dielectric (polyimide, PI) and charge-trapping ability for memory device, the siloxane derivatives bonded with high polarity hydroxyl groups (H3 molecules) was doped into dielectric polymer to form a polymeric electret. The degree of phase-separation phenomenon within PI films could be successfully modulated by controlling the parameters of spin coating process. High degree of phase-separation occurs in the PI-H3 film (with H3 molecules) formed by using low spin-coating speed to lead the abundance of polar groups at PI-H3/semiconductor interface, indicating that the polar group easily migrates to the surface of the PI film during the process of low spin-coating speed. From the output characteristics of ONVMs, the saturated drain current of device with PI-H3 dielectric is obviously higher than that of device with intrinsic PI (without H3 molecules) dielectric. This result indicates that the electrical characteristics of ONVMs can be enhanced by the gate bias induced dipole field which is contributed from the dipoles near the surface of PI-H3 dielectric layer. However, the electron writing ability of N-type ONVMs with PI-H3 dielectric is lower than that with PI dielectric. On the contrary, the p-type ONVMs with PI-H3 dielectric has higher hole writing ability. The polarity H3 molecule seem favourable for hole trapping process in memory device. In summary, we demonstrate that the electrical properties and memory effects of ONVMs can be generated by polar groups which distributed in polymer trapping layer. This result provides a simple route for designing high performance non-volatile transistor memory devices.
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Li, Chia Hsien, und 李嘉憲. „Point Defect and Grain Boundary Effect on WSe2 Field Effect Transistor“. Thesis, 2015. http://ndltd.ncl.edu.tw/handle/28021807302687755364.
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碩士國立清華大學
電子工程研究所
104
Transition-metal Dichalcogenides (TMDCs) collectively name a series of two - dimensional materials, composed of transition metal groups and chalcogenides in the periodic table. These material have semiconducting properties, have shown atom-scale thickness, direct band gap, high transmittance and flexibility, etc. Besides these properties, TMDCs have shown outstanding performance in both flexible electronic device and optical electronic device. Very recently, it has been shown that synthesis of large film of polycrystalline monolayer TMDCs could be achieved using chemical vapor deposition (CVD). However, as compared to mechanically exfoliated samples, the CVD grown thin film typically have much lower carrier mobility, due to the growth process imperfections that induce various structural defects in the material. The first part of this thesis is inspecting the point defect in our CVD-synthesized WSe2, which exhibited PL intensity inhomogeneous. Synthetic 2D crystal films grown by chemical vapor deposition are typically polycrystalline, which contain many grain boundaries, these grain boundaries play an import role in the electron transport. The second part of this thesis is observing the grain boundary effects on electronic transport by fabricating WSe2 into back-gate structure field-effect transistors. Comparing the electron transport properties to the channel across the grain boundary and without the grain boundary, and using the continuous measurement to observe how the grain boundary effect with electrical transport properties in ambient condition.
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Chu, Guan-Yu, und 朱冠宇. „Negative Capacitance Field-Effect Transistor and 1T Memory with Ferroelectric Effect“. Thesis, 2015. http://ndltd.ncl.edu.tw/handle/99420346246758814368.
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碩士國立臺灣師範大學
光電科技研究所
103
The paper of T. S. Böscke’s team reported in IEDM 2011.The FeFET is a long-term contender for a fast, low power and nonvolatile memory technology. Physical limitation of Boltzmann tyranny with 2.3kbT/decade for MOSFET at room temperature restricts the switching slope. For break through the physical limitation, the equation of body factor of subthreshold swing must be < 1, the Cins turn into negative capacitance by select insulator material. Subthreshold swing will be < 60mv/dec. at room temperature. In FeRAM, information is permanently stored as polarization state of the gate insulator and can be read non-destructively as a shift of the threshold voltage. The FeRAM concept was experimentally demonstrated, but the practical implementation has remained elusive. In this study, we will develop the low swing FET and 1T Memory by negative capacitance concept. Therefore, we will develop HfO2:Zr to achieve polarization effect. The objective is to improve the subthreshold swing and hysteresis window let the information stored in FeRAM.
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Chao-Yu, Meng. „Fabrication and Analysis of Poly-Si Thin Film Transistor and Si Nanowire Field Effect Transistor“. 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2407200619491100.
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Meng, Chao-Yu, und 孟昭宇. „Fabrication and Analysis of Poly-Si Thin Film Transistor and Si Nanowire Field Effect Transistor“. Thesis, 2006. http://ndltd.ncl.edu.tw/handle/91299119763967689187.
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博士國立臺灣大學
電機工程學研究所
94
The fabrication and analysis of poly-Si thin film transistor (TFTs) and Si nanowires (SiNWs) field effect transistor were studied in this thesis. The poly-Si with regular and large grain was fabricated by employing metallic pads as the heat sinks and with underlying silicon oxynitride (SiON) as the heat absorption layer. The TFTs fabricated by this method achieves a field effect mobility of 246 cm2/V-sec and an on/off current ratio exceeding 5×105. Besides, the degradation behavior of body-contact (BC) polysilicon thin film transistors under DC and AC stress were investigated and compared with conventional ones. It was found that the reliability of body-contact poly-Si TFTs is better than the conventional TFTs under both DC and AC stress conditions. After 1000s AC stress, the degradation of BC poly-Si TFTs become an order of magnitude less than the conventional ones. Therefore, a model was proposed to explain the degradation improvement of body-contact poly-Si TFTs. The fabrication of SiNWs has been demonstrated using excimer laser annealed gold nanoparticles as the catalyst and vapor-liquid-solid (VLS) growth. Scanning electron microscopes images of the excimer laser annealed Au nanoparticles from 2.5, 5, and 10 nm Au film showed that the nanoparticles had mean diameters of 12, 13, and, 15nm, respectively. The results show that the diameter controlled uniform silicon nanowires can be obtained utilizing controlled thickness of Au film combined with suitable laser power density. The un-doped and boron-doped SiNWs grown via VLS mechanism were studied. The diameters of un-doped and boron-doped SiNWs varied from 18.5 to 75.3 nm and 26.6 to 66.1 nm, respectively. The critical growth temperature of boron-doped SiNWs is 10 ℃ lower than that of un-doped ones and the diameters of the boron-doped SiNWs is always larger than that of the un-doped ones under different growth temperatures. This is because that the introduction of diborane enhanced the dissociation of SiH4 which determines the growth process of SiNW. Un-doped, N-type, and P-type doped SiNWs were grown at 460oC and 25 torr. The intensity ratio of anti-Stokes/Stokes (IAS/IS) peaks is used as an index of the sample temperature. Different SiNWs exhibit different Raman frequency shifts because their compressive stresses due to heating differ. The slopes of the IAS/IS peak ratio versus the Raman frequency for boron-doped, un-doped, phosphorous-doped SiNWs and bulk Si are -0.078, -0.036, -0.035 and -0.02 per cm-1, respectively. The different slopes reveal the different heating-induced compressive stresses in the SiNWs with different dopants and bulk Si. The electric-field-directed growth of SiNWs was performed utilizing Au film with different thicknesses. It is found that the 1 and 0.5 nm Au film are more suitable for the electric-field-directed growth of SiNWs due to the formation of separated Au clusters during the thermal evaporation. Besides, the electric field in the range 0.5~2.5 V/μm are suitable for the direction controlled growth of SiNWs. For further improvement of the position and direction controlled growth of SiNWs, the 20 nm Au nanoparticles were used as the catalyst to control the diameter of SiNWs. In the self-aligned structure, parts of the SiNWs across the gap become huger and the possible DC plasma enhance coating model is proposed to explain the phenomenon. It is also found that the position controlled structure with one sided Au catalyst is better and more suitable for the position and direction controlled SiNWs growth. Finally, the position and direction controlled SiNWs FETs were successfully fabricated by electric field directed growth. It demonstrates the feasibility to fabricate the SiNWs array and electrical devices with low cost.
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Pei-Ling, Wang. „High Mobility Strained-Ge Channel Field Effect Transistor“. 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0607200511512400.
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Liang, Jiang-Tong, und 梁敬通. „A Study of Doped-channel Field-effect Transistor“. Thesis, 1994. http://ndltd.ncl.edu.tw/handle/26743387539789506686.
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碩士國立成功大學
電機工程研究所
82
In this thesis,the doped-channel field effect transistor with a lightly doped GaAs cap layer on top of InGaAs channel is studied .The InGaAs compound is employed for its higher electron mobility than GaAs.In the structure, the advantages are a larger breakdown voltage compared with convevtional MESFET and a larger gate bias swing over Modulation-doped FET. A saturation velocity model is applied to analyze the saturation current and transconductance over the operating range of gate bias. The effect of the structure parameter on the electrical performance are analyzed and discussed.Further, the band diagram perpendicular to the gate going down into the channel is also calculated by using self-consistent method.The calculated carriers is confined in a narrow region due to quantum effect of the pseudo-morphic GaAs/InGaAs conduction band offset. Both the experiment and the simulation are in a good agreement.
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Chen, Chih-Yung, und 陳志勇. „Synthesis of SiGe Nanowires for Field Effect Transistor“. Thesis, 2005. http://ndltd.ncl.edu.tw/handle/29309224399795210415.
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碩士東海大學
物理學系
93
In this study, we attempt to develop a novel approach to fabricate nanowire-based FET on glass by traditional semiconductor process. This investigation was divided into two parts. The first one is concentrated on the synthesis and characterization of Si nanowires, Ge nanowires, and SiGe alloy nanowires. The second part is focused on the positioning, alignment and device fabrication of Si nanowire. Ge nanowires, SiGe nanowires and SiGe nanowires were successfully synthesized by Au catalyzed CVD method at 420 ℃, 280 ℃ and 360 ~ 420 ℃ respectively. Si nanowires and Ge nanowires exhibit a tapered-like structure. It is observed that the diameters and lengths of synthesized nanowires were strongly dependent on the substrate temperature and Au sputtering time. It seems indicated Au film not only act as a eutectic catalyst on the V-L-S nanowires formation, but also play an important role on the cracking of molecular precursors. The crystalline of these nanowires were demonstrated high quality by Raman scattering spectra and TEM characterization. Positioning and lateral alignment across pre-defined metal electrodes of Si nanowires were successfully achieved by applying DC bias. The growth direction of Si nanowires was changed from vertical to lying on the substrate by electric field. Four-masks process would apply to fabricate nanowire-based field effect transistors. Electrical characterization of Si nanowire-based field effect transistor will be found in the future.