Auswahl der wissenschaftlichen Literatur zum Thema „Software acceleration“
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Zeitschriftenartikel zum Thema "Software acceleration"
Long, Gary. „Acceleration Characteristics of Starting Vehicles“. Transportation Research Record: Journal of the Transportation Research Board 1737, Nr. 1 (Januar 2000): 58–70. http://dx.doi.org/10.3141/1737-08.
Der volle Inhalt der QuelleAn, Xiao Xue, Xiao Dong Chai, Wen Fa Zhu und Xiao Wei Xu. „Software Design of the Track State Inspection System Based on LabVIEW“. Advanced Materials Research 546-547 (Juli 2012): 1323–28. http://dx.doi.org/10.4028/www.scientific.net/amr.546-547.1323.
Der volle Inhalt der QuelleEdwards, M. D., und J. Forrest. „Software acceleration using programmable hardware devices“. IEE Proceedings - Computers and Digital Techniques 143, Nr. 1 (1996): 55. http://dx.doi.org/10.1049/ip-cdt:19960066.
Der volle Inhalt der QuelleBoroushak, Neda, Hasan Khoshnoodi und Mostafa Rostami. „Investigation of the Head’s Dynamic Response to Boxing Punch Using Computer Simulation“. Montenegrin Journal of Sports Science and Medicine 10, Nr. 1 (01.03.2021): 31–35. http://dx.doi.org/10.26773/mjssm.210305.
Der volle Inhalt der QuelleChen, Andrew, Rohaan Gupta, Anton Borzenko, Kevin Wang und Morteza Biglari-Abhari. „Accelerating SuperBE with Hardware/Software Co-Design“. Journal of Imaging 4, Nr. 10 (18.10.2018): 122. http://dx.doi.org/10.3390/jimaging4100122.
Der volle Inhalt der QuelleManor, Erez, Avrech Ben-David und Shlomo Greenberg. „CORDIC Hardware Acceleration Using DMA-Based ISA Extension“. Journal of Low Power Electronics and Applications 12, Nr. 1 (15.01.2022): 4. http://dx.doi.org/10.3390/jlpea12010004.
Der volle Inhalt der QuelleEdwards, M. D., J. Forrest und A. E. Whelan. „Acceleration of software algorithms using hardware/software co-design techniques“. Journal of Systems Architecture 42, Nr. 9-10 (Februar 1997): 697–707. http://dx.doi.org/10.1016/s1383-7621(96)00071-9.
Der volle Inhalt der QuelleThompson, David L. „Time, Speed and Acceleration—a software package“. Electronic Systems News 1988, Nr. 3 (1988): 28. http://dx.doi.org/10.1049/esn.1988.0064.
Der volle Inhalt der QuelleTang, Wenkai, und Peiyong Zhang. „GPGCN: A General-Purpose Graph Convolution Neural Network Accelerator Based on RISC-V ISA Extension“. Electronics 11, Nr. 22 (21.11.2022): 3833. http://dx.doi.org/10.3390/electronics11223833.
Der volle Inhalt der QuelleFarouk, Yasmeen, und Sherine Rady. „Optimizing MRI Registration using Software/Hardware Co-Design Model on FPGA“. International Journal of Innovative Technology and Exploring Engineering 10, Nr. 2 (10.12.2020): 128–37. http://dx.doi.org/10.35940/ijitee.b8300.1210220.
Der volle Inhalt der QuelleDissertationen zum Thema "Software acceleration"
Borgström, Fredrik. „Acceleration of FreeRTOS withSierra RTOS accelerator : Implementation of a FreeRTOS software layer onSierra RTOS accelerator“. Thesis, KTH, Data- och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-188518.
Der volle Inhalt der QuelleIdag är effekten av de vanligaste åtgärderna för att förbättra prestandan av inbyggda system och realtidsoperativsystem väldigt liten. På grund av detta är det intressant att undersöka nya åtgärder för att tänja prestandagränserna av inbyggda system och realtidsoperativsystem ytterliggare. Det har tidigare påvisats att det hårdvarubaseraderealtidsoperativsystemet, Sierra, har bättre prestanda än det mjukvarubaseraderealtidsoperativsystemet, FreeRTOS. Dessa realtidsoperativsystem har även visats vara lika i flera aspekter, vilket betyder att det är möjligt för Sierra att accelererera FreeRTOS. I detta examensarbete har en implementering av en sådan acceleration genomförts. Eftersom befintliga realtidsoperativsystem ständigtär i utveckling i kombination med att det är flera år sedan som en tidigare jämförelse mellan de båda systemen utfördes, så jämfördes FreeRTOS och Sierra i fråga om funktionalitet och uppbyggnad även i detta examensarbete.Denna jämförelse visade att FreeRTOS och Sierra delar de mest grundläggande funktionerna av ett realtidsoperativsystem, och som därmed kan accelereras av Sierra, men att FreeRTOS även har ett antal exklusiva funktioner för att underlätta användningen av det realtidsoperativsystemet. Informationen som erhölls av denna jämförelse var sedan grunden för hur själva accelerationen skulle implementeras. Efter ett antal prestandatesterkunde det konstateras att alla implementerade funktioner, med undantag för ett fåtal, hade kortare exekveringstid än motsvarande funktioner i ursprungsversionen av FreeRTOS.
Kulkarni, Pallavi Anil. „Hardware acceleration of software library string functions“. Ann Arbor, Mich. : ProQuest, 2007. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:1447245.
Der volle Inhalt der QuelleTitle from PDF title page (viewed Nov. 19, 2009). Source: Masters Abstracts International, Volume: 46-03, page: 1577. Adviser: Mitch Thornton. Includes bibliographical references.
Blumer, Aric David. „Register Transfer Level Simulation Acceleration via Hardware/Software Process Migration“. Diss., Virginia Tech, 2007. http://hdl.handle.net/10919/29380.
Der volle Inhalt der QuellePh. D.
Samothrakis, Stavros Nikolaou. „Acceleration techniques in ray tracing for dynamic scenes“. Thesis, University of Sussex, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241671.
Der volle Inhalt der QuelleSingh, Ajeet. „GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task Offloading“. Thesis, Virginia Tech, 2009. http://hdl.handle.net/10919/34264.
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Consequently, this thesis proposes a framework called GePSeA (General Purpose Software
Acceleration Framework), which uses a small
fraction of the computational power on multi-core architectures to offload complex application-specific tasks. Specifically, GePSeA provides a lightweight process that acts as a helper agent to the application by executing application-specific tasks asynchronously and efficiently. GePSeA is not meant to replace hardware accelerators but to extend them. GePSeA
provide several utilities called core components that offload tasks on to the core or to the special-purpose hardware when available in a way that is transparent to the application. Examples of such core components include reliable communication service, distributed lock management, global memory management, dynamic load distribution and network protocol processing. We then apply the GePSeA framework to two applications, namely mpiBLAST, an open-source computational biology application and Reliable Blast UDP (RBUDP) based file transfer application. We observe significant speed-up for both applications.
Master of Science
Zhu, Huanzhou. „Developing graph-based co-scheduling algorithms with GPU acceleration“. Thesis, University of Warwick, 2016. http://wrap.warwick.ac.uk/92000/.
Der volle Inhalt der QuelleYalim, Hacer. „Acceleration Of Direct Volume Rendering With Texture Slabs On Programmable Graphics Hardware“. Master's thesis, METU, 2005. http://etd.lib.metu.edu.tr/upload/12606195/index.pdf.
Der volle Inhalt der QuelleSherban, V. Yu. „Software components of the system for the kinematic and dynamic analysis of machines for sewing, textile and shoe industries“. Thesis, Київський національний університет технологій та дизайну, 2017. https://er.knutd.edu.ua/handle/123456789/6655.
Der volle Inhalt der QuelleWang, Tsu-Han. „Real-time Software Architectures and Performance Evaluation Methods for 5G Radio Systems“. Electronic Thesis or Diss., Sorbonne université, 2022. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2022SORUS362.pdf.
Der volle Inhalt der QuelleThe thesis deals with 5G real-time Software Defined Radio architectures. In order to match 5G performance requirements, computational acceleration combined with real-time process scheduling methods are required. In 5G embedded systems acceleration amounts to a judicious combination additional hardware units for the most computationally costly functions with software for simpler arithmetic and complex control procedures. Fully software-based solutions are also appearing for certain applications, in particular in the so-called Open Radio-Access Network (openRAN) ecosystem. The contributions of this thesis lie in methods for purely software-based acceleration and real-time control of low-latency fronthaul interfaces. Since 5G has stringent latency requirements and support for very high-speed data traffic, methods for scheduling baseband processing need to be tailored to the specifics of the air-interface. Specifically, we propose a functional decomposition of the 5G air interface which is amenable to multi-core software implementations targeting high-end servers exploiting single-instruction multiple-data (SIMD) acceleration. Moreover, we provide some avenues for multi-threaded processing through pipelining and the use of thread pools. We highlight the methods and their performance evaluation that have been exploited during the development of the OpenAirInterface 5G implementation
Tell, Eric. „Design of Programmable Baseband Processors“. Doctoral thesis, Linköping : Univ, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-4377.
Der volle Inhalt der QuelleBücher zum Thema "Software acceleration"
Mourelle, Luiza de Macedo. Hardware/Software interfacing in a software acceleration environment. Manchester: UMIST, 1997.
Den vollen Inhalt der Quelle findenNikkhah, B. A hardware/software partitioning scheme for software acceleration. Manchestr: UMIST, 1997.
Den vollen Inhalt der Quelle findenMizrakian, V. Software acceleration of image processing algorithms using hardware implementation. Manchester: UMIST, 1997.
Den vollen Inhalt der Quelle findenMizrakian, V. Software acceleration of image processing algorithms using hardware implementation. Manchester: UMIST, 1997.
Den vollen Inhalt der Quelle findenLuigi, Carro, Hrsg. Dynamic reconfigurable architectures and transparent optimization techniques: Automatic acceleration of software execution. Dordrecht: Springer, 2010.
Den vollen Inhalt der Quelle finden1970-, Ratliff Bud, Hrsg. Microsoft Internet security and acceleration (ISA) server 2000. Redmond, Wash: Microsoft Press, 2003.
Den vollen Inhalt der Quelle finden1973-, Thomas Orin, und Microsoft Corporation, Hrsg. MCSA/MCSE self-paced training kit (exam 70-350): Implementing Microsoft internet security and acceleration server 2004. Redmond, Wash: Microsoft Press, 2005.
Den vollen Inhalt der Quelle findenTin, Michael Yu Chak. ExamInsightfor MCP/MCSE certification: Microsoft internet security and acceleration (ISA) server 2000, enterprise edition exam 70-227. Friendswood, Tex: TotalRecall Publications, 2003.
Den vollen Inhalt der Quelle findenTin, Michael Yu Chak. ExamWise for MCP/MCSE certification: Microsoft internet security and acceleration (ISA) server 2000, enterprise edition exam 70-227. Friendswood, Tex: TotalRecall Publications, 2003.
Den vollen Inhalt der Quelle findenUnited States. National Aeronautics and Space Administration., Hrsg. A method to determine the kinematics of the lower limbs of a subject pedaling a bicycle using encoders and accelerometers. [Washington, D.C.]: National Aeronautics and Space Administration, 1994.
Den vollen Inhalt der Quelle findenBuchteile zum Thema "Software acceleration"
Cattaruzza, Dario, Alessandro Abate, Peter Schrammel und Daniel Kroening. „Sound Numerical Computations in Abstract Acceleration“. In Numerical Software Verification, 38–60. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-63501-9_4.
Der volle Inhalt der QuelleGulati, Kanupriya, und Sunil P. Khatri. „Automated Approach for Graphics Processor Based Software Acceleration“. In Hardware Acceleration of EDA Algorithms, 169–80. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-0944-2_11.
Der volle Inhalt der QuelleSchmid, Moritz, Christian Schmitt, Frank Hannig, Gorker Alp Malazgirt, Nehir Sonmez, Arda Yurdakul und Adrian Cristal. „Big Data and HPC Acceleration with Vivado HLS“. In FPGAs for Software Programmers, 115–36. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-26408-0_7.
Der volle Inhalt der QuelleLeroux, Jérôme, und Grégoire Sutre. „Acceleration in Convex Data-Flow Analysis“. In FSTTCS 2007: Foundations of Software Technology and Theoretical Computer Science, 520–31. Berlin, Heidelberg: Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-77050-3_43.
Der volle Inhalt der QuelleBeevi, F. H. Aysha, C. F. Pedersen, S. Wagner und S. Hallerstede. „Lateral Fall Detection via Events in Linear Prediction Residual of Acceleration“. In Ambient Intelligence - Software and Applications, 201–8. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-07596-9_22.
Der volle Inhalt der QuelleŠimková, Marcela, und Ondřej Lengál. „Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures“. In Hardware and Software: Verification and Testing, 266–73. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-39611-3_25.
Der volle Inhalt der QuelleLiu, Yang, und Liang Deng. „Acceleration of CFD Engineering Software on GPU and MIC“. In Algorithms and Architectures for Parallel Processing, 835–48. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-27161-3_77.
Der volle Inhalt der QuelleWang, Yanwei, Bingbing Li, Lu Lu, Jiangwei Wang, Rengang Li und Hongwei Kan. „Hardware-Software Co-design for Deep Neural Network Acceleration“. In Communications in Computer and Information Science, 221–30. Singapore: Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-4402-6_16.
Der volle Inhalt der QuelleYan, Jiong, Ji Wang und Huo-wang Chen. „UML Based Statistical Testing Acceleration of Distributed Safety-Critical Software“. In Parallel and Distributed Processing and Applications, 433–45. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30566-8_52.
Der volle Inhalt der QuelleSaremi, Razieh, Ye Yang und Abdullah Khanfor. „Ant Colony Optimization to Reduce Schedule Acceleration in Crowdsourcing Software Development“. In Human Interface and the Management of Information. Information in Intelligent Systems, 286–300. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-22649-7_23.
Der volle Inhalt der QuelleKonferenzberichte zum Thema "Software acceleration"
Wu, Shengfeng, Yue Wu und Shiyi Xu. „Acceleration of Random Testing for Software“. In 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing (PRDC). IEEE, 2013. http://dx.doi.org/10.1109/prdc.2013.15.
Der volle Inhalt der QuelleSredojevic, Ranko, Andrew Wright und Vladimir Stojanovic. „Hardware-Software Codesign for Embedded Numerical Acceleration“. In 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 2013. http://dx.doi.org/10.1109/fccm.2013.27.
Der volle Inhalt der QuelleTuran, Furkan, Ruan de Clercq, Pieter Maene, Oscar Reparaz und Ingrid Verbauwhede. „Hardware acceleration of a software-based VPN“. In 2016 26th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2016. http://dx.doi.org/10.1109/fpl.2016.7577321.
Der volle Inhalt der QuelleWei, Tianrui, Nazerke Turtayeva, Marcelo Orenes-Vera, Omkar Lonkar und Jonathan Balkind. „Cohort: Software-Oriented Acceleration for Heterogeneous SoCs“. In ASPLOS '23: 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3. New York, NY, USA: ACM, 2023. http://dx.doi.org/10.1145/3582016.3582059.
Der volle Inhalt der QuelleYaneva, Vanya. „Compiler-assisted test acceleration using GPUs“. In ICSE '18: 40th International Conference on Software Engineering. New York, NY, USA: ACM, 2018. http://dx.doi.org/10.1145/3183440.3190337.
Der volle Inhalt der QuelleBonelli, Nicola, Gregorio Procissi, Davide Sanvito und Roberto Bifulco. „The acceleration of OfSoftSwitch“. In 2017 IEEE Conference on Network Function Virtualization and Software-Defined Networks (NFV-SDN). IEEE, 2017. http://dx.doi.org/10.1109/nfv-sdn.2017.8169842.
Der volle Inhalt der QuelleGhis, Abdelkader, Kamel Smiri und Abderezzak Jemai. „Mixed Software/Hardware based Neural Network Learning Acceleration“. In 16th International Conference on Software Technologies. SCITEPRESS - Science and Technology Publications, 2021. http://dx.doi.org/10.5220/0010606104170425.
Der volle Inhalt der QuelleGhis, Abdelkader, Kamel Smiri und Abderezzak Jemai. „Mixed Software/Hardware based Neural Network Learning Acceleration“. In 16th International Conference on Software Technologies. SCITEPRESS - Science and Technology Publications, 2021. http://dx.doi.org/10.5220/0010606100002992.
Der volle Inhalt der QuelleAtoofian, Ehsan. „Acceleration of Software Transactional Memory through Hardware Clock“. In International Workshop. New York, New York, USA: ACM Press, 2014. http://dx.doi.org/10.1145/2613908.2613912.
Der volle Inhalt der QuelleJin, Qiwei, David B. Thomas und Wayne Luk. „Automated application acceleration using software to hardware transformation“. In 2009 International Conference on Field-Programmable Technology (FPT). IEEE, 2009. http://dx.doi.org/10.1109/fpt.2009.5377693.
Der volle Inhalt der QuelleBerichte der Organisationen zum Thema "Software acceleration"
Olsen, B. Accelerator Production of Tritium Software Management Plan. Office of Scientific and Technical Information (OSTI), Juni 1998. http://dx.doi.org/10.2172/763183.
Der volle Inhalt der QuelleRazdan, Rahul. Unsettled Issues Regarding Autonomous Vehicles and Open-source Software. SAE International, April 2021. http://dx.doi.org/10.4271/epr2021009.
Der volle Inhalt der QuelleHeuring, Vincent P., und William M. Waite. Accelerating the Transfer of Technology for Implementing Domain Specific Software Architectures. Fort Belvoir, VA: Defense Technical Information Center, April 1993. http://dx.doi.org/10.21236/ada264017.
Der volle Inhalt der QuelleWaraniak, John. Unsettled Issues on Sensor Calibration for Automotive Aftermarket Advanced Driver-Assistance Systems. SAE International, März 2021. http://dx.doi.org/10.4271/epr2021008.
Der volle Inhalt der QuelleKerrigan, Susan, Phillip McIntyre und Marion McCutcheon. Australian Cultural and Creative Activity: A Population and Hotspot Analysis: Bendigo. Queensland University of Technology, 2020. http://dx.doi.org/10.5204/rep.eprints.206968.
Der volle Inhalt der QuelleTao, Yang, Amos Mizrach, Victor Alchanatis, Nachshon Shamir und Tom Porter. Automated imaging broiler chicksexing for gender-specific and efficient production. United States Department of Agriculture, Dezember 2014. http://dx.doi.org/10.32747/2014.7594391.bard.
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