Dissertationen: „Simulation of fault signals“

1

Hou, Junwei. „Concurrent fault simulation for mixed-signal circuits“. Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15735.

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2

Wang, Xiaofeng. „Simulation models for rolling bearing vibration generation and fault detection via neural networks“. Thesis, University of Oxford, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.362159.

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3

Gomes, Alfred Vincent. „Alternate Test Generation for Detection of Parametric Faults“. Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/5285.

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Tests for detecting faults in analog and mixed-signal circuits have been traditionally derived from the datasheet speci and #64257;cations. Although these speci and #64257;cations describe important aspects of the device, in many cases these application oriented tests are costly to implement and are inefficient in determining product quality. Increasingly, the gap between speci and #64257;cation test requirements and the capabilities of test equipment has been widening. In this work, a systematic method to generate and evaluate alternate tests for detecting parametric faults is proposed. We recognize that certain aspects of analog test generation problem are not amenable to automation. Additionally, functional features of analog circuits are widely varied and cannot be assumed by the test generator. To overcome these problems, an extended device under test (DUT) model is developed that encapsulates the DUT and the DUT speci and #64257;c tasks. The interface of this model provides a well de and #64257;ned and uniform view of a large class of devices. This permits several simpli and #64257;cations in the test generator. The test generator is uses a search-based procedure that requires evaluation of a large number of candidate tests. Test evaluation is expensive because of complex fault models and slow fault simulation techniques. A tester-resident test evaluation technique is developed to address this issue. This method is not limited by simulation complexity nor does it require an explicit fault model. Making use of these two developments, an efficient and automated test generation method is developed. Theoretical development and a number of examples are used to illustrate various concepts that are presented in this thesis.

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4

Davari, Far Mehrdad. „Contribution to the fault diagnosis in photovoltaic systems“. Amiens, 2014. http://www.theses.fr/2014AMIE0117.

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L'objectif de cette thèse était de développer des méthodes de détection de défauts dans les installations photovoltaïques. Une approche basée modèle et fondée sur la simulation pour détecter les défauts dans le système photovoltaïque résidentiel (RPS) est proposée. Un modèle hybride simplifié de panneau photovoltaïque utilisé avec un environnement MATLAB est développé et validé dans cette thèse. Son originalité c'est qu'il tourne en temps réel et il est suffisamment flexible pour simuler des systèmes photovoltaïques solaires avec des échelles différentes, avec ou sans diodes de dérivation et de diverses technologies. Ensuite, une nouvelle technique de détection de défaut a été introduite. Elle se compose de deux parties principales. Une partie passive, qui permettra de détecter une défaillance en comparant les signaux mesurés et ceux obtenus par le modèle. La partie active consiste à analyser les différents attributs pour localiser et définir le type de défaut. Enfin, les résultats obtenus par simulation ou en pratique de la méthode et les techniques proposées sont satisfaisantes et ouvrent plus de perspectives dans ce domaine
The aim of this thesis was to develop methods for detecting faults in photovoltaic installations. An approach based on model and simulation to detect defects in the residential photovoltaic System (RPS) is proposed. A simplified hybridphotovoltaic panel used with MATLAB environment is developed and validated in this thesis. Its originality is that it runs in real time and it is flexible enough to simulate solar photovoltaic Systems with different scales, with or without bypass diodes and various technologies. Then a new technique for fault détection has been introduced. It consists of two main parts. A passive part, which will detect a fault by comparing the measured signals, and those obtained by the model. The active part is to analyze the different attributes to locale and identify the type of fault. Finally, the results obtained by simulation or practice of the method and the proposed techniques are satisfactory and open more perspectives in this area

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5

Martínek, Marek. „Tvorba SW pro generování signálu simulující závady rotačních systémů“. Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2021. http://www.nusl.cz/ntk/nusl-442837.

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This diploma thesis deals with the design and creation of an algorithm for generating simulated signal data from a vibration diagnostics device. The first part is focused on theoretical acquaintance with vibration diagnostics and characteristics of individual defects of rotary machines. The next part deals with the possibilities of mathematical and kinematic simulations using a computer software. The main part of this work is dedicated to design and creation of software for generating simulated signal data. In the last part, the principle of simulation of specific defects of rotary machines is clearly demonstrated.

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6

Bhojwani, Soniya Naresh. „Simulation of Physiological Signals using Wavelets“. University of Akron / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=akron1193079604.

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7

Smith, Jason. „A Sensor Fault Detection Simulation Tool“. Miami University / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=miami1193282225.

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8

Warshawsky, Avrum S. „Distributed fault simulation using vector set partitioning“. Thesis, McGill University, 1991. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=59903.

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To explore the potential speedup to be obtained through parallelism, a mathematical model for the performance of fault simulation is developed.
A framework for performing fault simulation in a distributed environment is developed based on the assumption that fault simulation of different vectors can be run independently on different processors. This can be done using any uniprocessor fault simulator and requires only a fairly simple and low bandwidth communication mechanism. This communication mechanism distributes the list of faults detected by each simulator to all other simulators so that the simulation can be controlled based on global criteria such as the fault coverage obtained by the distributed simulator, and the amount of work to be done by each processor is dynamically reduced through fault dropping and fault-free dropping based on the coverage obtained by all processors.
Finally, a distributed simulator is implemented using the above mechanism on a network of workstations using the uniprocessor fault simulator Tulip.

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9

Kwong, Albert L. C. „Parallel fault simulation on the C.RAM architecture“. Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0001/MQ34387.pdf.

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10

Wang, Xiaolin. „Synchronous fault simulation by surrogate with exceptions“. Diss., The University of Arizona, 1989. http://hdl.handle.net/10150/184687.

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The contribution of this dissertation is the development of a completely new and accurate algorithm SFSSE for synchronous fault simulation of sequential circuits. The distinctive difference between SFSSE (Synchronous Fault Simulation by Surrogate with Exceptions) and similar approaches for fault simulation in combinational logic circuits is that SFSSE is capable of handling faults stored in more than one memory elements and the reconvergence over time of the stored fault effect with the original fault. The experimental result shows a significant improvement for SFSSE by comparing its execution time to that of parallel fault simulation. After a stored fault list is established during one clock period, all paths from the output of that memory element to the primary outputs might be blocked in subsequent clock periods. A fault is usually propagated through many paths in various subnetworks over several clock periods, and it is detected when only one of these paths reaches a primary output. A new idea for efficiency is suggested in the last chapter to avoid the unproductive simulation activity. In that approach the waste of simulation time is avoided by overlapping the simulation of multiple clock periods.

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11

Ryan, Christopher A. „Parallel hardware accelerated switch level fault simulation“. Diss., This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-10022007-145318/.

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12

Olsson, Erik. „Fault Diagnosis of Industrial Machines using Sensor Signals and Case-Based Reasoning“. Doctoral thesis, Västerås : School of Innovation, Design and Engineering, Mälardalen University, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-6539.

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13

Bassily, Hany F. „A comparative fault diagnosis methodology based on time series analysis of system's signals“. Connect to this title online, 2007. http://etd.lib.clemson.edu/documents/1202498718/.

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14

Jayasinghe, J. A. S. B. „Non-unit protection of series compensated transmission lines using high frequency fault signals“. Thesis, University of Bath, 1997. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.362148.

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15

Sedaghat, Maman Reza. „Fault emulation reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping /“. [S.l. : s.n.], 1999. http://deposit.ddb.de/cgi-bin/dokserv?idn=95853893X.

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16

May, Norman L. „Fault simulation of a wafer-scale neural network“. Full text open access at:, 1988. http://content.ohsu.edu/u?/etd,159.

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17

Myers, Thomas Oliver. „Test analysis & fault simulation of microfluidic systems“. Thesis, University of Hull, 2010. http://hydra.hull.ac.uk/resources/hull:3509.

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This work presents a design, simulation and test methodology for microfluidic systems, with particular focus on simulation for test. A Microfluidic Fault Simulator (MFS) has been created based around COMSOL which allows a fault-free system model to undergo fault injection and provide test measurements. A post MFS test analysis procedure is also described.A range of fault-free system simulations have been cross-validated to experimental work to gauge the accuracy of the fundamental simulation approach prior to further investigation and development of the simulation and test procedure.A generic mechanism, termed a fault block, has been developed to provide fault injection and a method of describing a low abstraction behavioural fault model within the system. This technique has allowed the creation of a fault library containing a range of different microfluidic fault conditions. Each of the fault models has been cross-validated to experimental conditions or published results to determine their accuracy.Two test methods, namely, impedance spectroscopy and Levich electro-chemical sensors have been investigated as general methods of microfluidic test, each of which has been shown to be sensitive to a multitude of fault. Each method has successfully been implemented within the simulation environment and each cross-validated by first-hand experimentation or published work.A test analysis procedure based around the Neyman-Pearson criterion has been developed to allow a probabilistic metric for each test applied for a given fault condition, providing a quantitive assessment of each test. These metrics are used to analyse the sensitivity of each test method, useful when determining which tests to employ in the final system. Furthermore, these probabilistic metrics may be combined to provide a fault coverage metric for the complete system.The complete MFS method has been applied to two system cases studies; a hydrodynamic “Y” channel and a flow cytometry system for prognosing head and neck cancer.Decision trees are trained based on the test measurement data and fault conditions as a means of classifying the systems fault condition state. The classification rules created by the decision trees may be displayed graphically or as a set of rules which can be loaded into test instrumentation. During the course of this research a high voltage power supply instrument has been developed to aid electro-osmotic experimentation and an impedance spectrometer to provide embedded test.

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18

Sabzavari, Abbas Mostafavi. „Fault simulation and diagnosis in analog electronic systems“. Thesis, University of Exeter, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328233.

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19

Seo, Jong-Soo. „Blind fault detection and source identification using higher order statistics for impacting systems“. Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.326784.

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20

Kong, Der-Hung. „Simulation of coherent signals with forward error correction coding“. Thesis, Monterey, Calif. : Naval Postgraduate School, 2007. http://bosun.nps.edu/uhtbin/hyperion.exe/07Mar%5FKong.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, March 2007.
Thesis Advisor(s): Clark Robertson. "March 2007." Includes bibliographical references (p.47-48). Also available in print.

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21

Qiu, Wangqi. „Fault simulation and test generation for small delay faults“. Texas A&M University, 2006. http://hdl.handle.net/1969.1/4966.

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Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they model only a subset of delay defect behaviors. To solve this problem, a more realistic delay fault model has been developed which models delay faults caused by the combination of spot defects and parametric process variation. According to the new model, a realistic delay fault coverage metric has been developed. Traditional path delay fault coverage metrics result in unrealistically low fault coverage, and the real test quality is not reflected. The new metric uses a statistical approach and the simulation based fault coverage is consistent with silicon data. Fast simulation algorithms are also included in this dissertation. The new metric suggests that testing the K longest paths per gate (KLPG) has high detection probability for small delay faults under process variation. In this dissertation, a novel automatic test pattern generation (ATPG) methodology to find the K longest testable paths through each gate for both combinational and sequential circuits is presented. Many techniques are used to reduce search space and CPU time significantly. Experimental results show that this methodology is efficient and able to handle circuits with an exponential number of paths, such as ISCAS85 benchmark circuit c6288. The ATPG methodology has been implemented on industrial designs. Speed binning has been done on many devices and silicon data has shown significant benefit of the KLPG test, compared to several traditional delay test approaches.

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22

Kassab, Mark A. „Hierarchical functional concurrent fault simulation for data-path architectures“. Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=40373.

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The growing size and complexity of VLSI circuits is creating a need for more efficient design automation tools. As the performance of general-purpose tools reaches practical limitations, specialized solutions are sought to achieve higher performance by targeting classes of circuits and exploring features particular to them. Circuits based on data-path architectures have proliferated due to the widespread use of embedded cores and high-performance computing systems, such as those used for digital signal processing (DSP). Furthermore, the growing acceptance of architectural-level synthesis as an effective design methodology is expected to significantly change the design paradigm for computing circuits. Consequently, an increasing number of circuits containing data paths will require fast fault simulation to be performed at the register transfer (RT) level to allow early estimates for fault coverage before the circuit is completely synthesized. Furthermore, efficient fault simulators are often required when designing tests for those large circuits. In addition, emerging built-in self test techniques can require fault simulation to always be performed for the entire fault list, i.e. with no fault dropping, which is very computationally intensive.
A novel, highly efficient fault simulation technique is proposed for circuits based on data-path architectures. This technique performs functional fault simulation of arithmetic and logic building blocks commonly found in those circuit. It exploits the functionality and structural regularity of those blocks such that the output of a faulty module can be computed functionally, but with gate-level accuracy. This methodology is implemented in a hierarchial fault simulation framework that exploits the behavioral models to efficiently propagate faults through fault-free modules. Consequently, structural simulation is reduced or eliminated without loss of accuracy. Furthermore, since functional fault simulation is performed on the building blocks, it is possible to perform fault simulation of a circuit at the RT level, which is not possible with gate-level simulators.
Analysis and experiments show that the computational requirements of fault simulation as a function of circuit size increase at a slower rate for the proposed functional technique than for gate-level fault simulation. Therefore, the efficiency of the functional method compared to structural simulation increases for larger data-path blocks. Furthermore, analysis is performed to determine the benefits of incorporating a variant of the concurrent fault simulation methodology into this framework. Conditions are presented depicting when concurrent simulation should be used. Experimental results show that the speedup over gate-level fault simulation is in most cases two to three orders of magnitude, making it feasible to perform fault simulation of large circuits for a large number of vectors even with no fault dropping.

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23

Moscovitch, Michael. „A fault simulation oriented technique for test point insertion /“. Thesis, McGill University, 1992. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=60715.

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With the ever increasing popularity of built-in self-test comes an increasing reliance on pseudo-random patterns for testing. Some faults within a circuit, however, may be hard to detect with pseudo-random patterns. One approach to improve the detectability of these faults involves modifying the circuit by adding test points so that it responds more favorably to the given test set.
A method for performing test point insertion in combinational circuits is presented. The method is based on a combination of fault simulation and probabilistic techniques.
An implementation of the test point insertion procedure is described and results are presented showing the effectiveness of this method on the ISCAS benchmark circuits.

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24

Dhifi, Mustapha [Verfasser]. „Novel Approaches for Accelerated Analog Fault Simulation / Mustapha Dhifi“. Aachen : Shaker, 2003. http://d-nb.info/1179037731/34.

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25

Spinks, Stephen James. „Fault simulation for structural testing of analogue integrated circuits“. Thesis, University of Hull, 1998. http://hydra.hull.ac.uk/resources/hull:8047.

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In this thesis the ANTICS analogue fault simulation software is described which provides a statistical approach to fault simulation for accurate analogue IC test evaluation. The traditional figure of fault coverage is replaced by the average probability of fault detection. This is later refined by considering the probability of fault occurrence to generate a more realistic, weighted test metric. Two techniques to reduce the fault simulation time are described, both of which show large reductions in simulation time with little loss of accuracy. The final section of the thesis presents an accurate comparison of three test techniques and an evaluation of dynamic supply current monitoring. An increase in fault detection for dynamic supply current monitoring is obtained by removing the DC component of the supply current prior to measurement.

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26

Devarayanadurg, Giri V. „Test selection and fault simulation for analog integrated circuits /“. Thesis, Connect to this title online; UW restricted, 2001. http://hdl.handle.net/1773/6040.

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27

Al-Busafi, Bader. „Incorporation of fault rock properties into production simulation models“. Thesis, University of Leeds, 2005. http://etheses.whiterose.ac.uk/190/.

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This thesis has two aims. First, to investigate the importance of incorporating the multiphase flow properties of faults into production simulation models. Second, to investigate methodologies to incorporate the multiphase flow properties of faults into production simulation models. Tests using simple simulation models suggest that in some situations it is not particularly important to take into account the multiphase flow properties of faults, whereas in other situations the multiphase properties have proved very important. The differences depend on drive mechanism, well position, and the capillary pressure distribution along the fault as well on the parameters that need to be modelled (e. g. bottom-hole pressures, hydrocarbon production rates, water cuts, etc. ). The results show that it is possible for hydrocarbons to flow across a sealing fault (i. e. 100% water saturation) as a result of its threshold pressure being overcome. The relative permeability of fault rocks may be one of the largest unknowns in simulating fluid in structurally complex petroleum reservoirs. Microstructural and petrophysical measurements are conducted on faults from core within the Pierce Field, North Sea. The results are used to calculate transmissibility multipliers (TMs) required to take into account the effect of faults on fluid flow within the Pierce production simulation model. The fault multiphase flow behaviour is approximated by varying the TMs as a function of height above the free water level. This methodology results in an improved history match of production data. Further, the improved model is then used to plan the optimal time to conduct a follow-up 3D seismic survey to identify unswept compartments. Further, an alternative model was proposed to overcome some of the possible limitations that the previous TM treatments may have at certain stages of a reservoir life. The similar behaviour of the different proposed fault models for the Pierce Field indicate that the current faulting system in this model is not largely responsible for the history mismatch in water production. Multiphase flow properties of faults can be incorporated into production simulation models using dynamic pseudofunctions. In this thesis, different dynamic pseudofunctions are generated by conducting high-resolution fluid flow models at the scale of the reservoir simulation grid block, using flow rates similar to those that are likely to be encountered within petroleum reservoirs. In these high-resolution models, both the fault and reservoir rock are given their own capillary pressure and relative permeability curves. The results of the simulations are used to create pseudocurves that are then incorporated into the up-scaled production simulation model to account for the presence of both the fault and undeformed reservoir. Different flow regimes are used to compare the performance of each pseudoisation method with the conventional, single-phase TM fault representations. The results presented in this thesis show that it is more important to incorporate fault multiphase properties in capillary dominated flow regimes than in those that are viscosity dominated. It should, however, be emphasised that the Brooks-Corey relations used to estimate relative permeability and capillary pressure curves of the fault rock in this study have a significant influence on some of these conclusions. In other words, these conclusions may not be valid if the relative permeability curves of fault rocks are very different to those calculated using the aforementioned relationships. Finally, an integrated workflow is outlined showing how dynamic pseudofunctions can be generated in fault juxtaposition models by taking advantage of the dynamic flux preservation feature in Eclipse 10OTM simulator.

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28

Yao, ShiPing. „Modelling and simulation of vibration signals for monitoring of gearboxes“. Thesis, University of Oxford, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.301653.

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29

Delphin, Aurélien. „MRI Signals Simulation for Validation of a New Microvascular Characterization“. Thesis, KTH, Medicinteknik och hälsosystem, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-260257.

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Conventional MRI techniques are not convenient when it comes to study cerebral microvascularization due to the length of the scans needed. A technique called Magnetic Resonance Fingerprinting (MRF) is an excellent candidate to solve this problem as it requires much shorter scan durations. It relies on the ability to simulate a large amount of MR signals coming from virtual voxels of controlled parameters. This thesis addresses this simulation aspect. Coding implements were made on a simulation tool called MRVox2D to improve its realism and flexibility. In particular, the voxel geometry generation algorithm was reworked to allow simulations in line with what can be obtained from a scanner. Having a variable vessel size within a simulated voxel is now possible and the Vessel Size Index can be computed accordingly. MRF applications were made on mice data using these implementations, showing encouraging but perfectible results.
Konventionella MR-tekniker är inte praktiska när det gäller att studera cerebral mikrovaskularisering på grund av längden på de skanningar som krävs. En teknik som kallas Magnetic Resonance Fingerprinting (MRF) är en utmärkt kandidat för att lösa detta problem eftersom den kräver mycket kortare skanningsvaraktigheter. Metoden baseras på förmågan att simulera en stor mängd MR-signaler som kommer från virtuella voxels av kontrollerade parametrar. Det här examensarbetet behandlar denna simuleringsaspekt. Kodningsredskap gjordes på ett simuleringsverktyg som heter MRVox2D för att förbättra dess realism och flexibilitet. I synnerhet omarbetades algoritmen för generering av voxelgeometri för att tillåta simuleringar i linje med vad som kan erhållas från en skanner. Att ha en variabel kärlstorlek inom en simulerad voxel är nu möjligt och Vessel Size Index kan beräknas i enlighet därmed. MRF-applikationer gjordes på mössdata med användning av dessa implementationer, vilket visade uppmuntrande men ännu inte perfekta resultat.

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Syal, Manan. „Untestable Fault Identification Using Implications“. Thesis, Virginia Tech, 2002. http://hdl.handle.net/10919/46173.

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Untestable faults in circuits are defects/faults for which there exists no test pattern that can either excite the fault or propagate the fault effect to an observable point, which could be either a Primary output (PO) or a scan flip-flop. The current state-of-the-art automatic test pattern generators (ATPGs) spend a lot of time in trying to generate a test sequence for the detection of untestable faults, before aborting on them, or identifying them as untestable, given enough time. Thus, it would be beneficial to quickly identify faults that are redundant/untestable, so that tools such as ATPG engines or fault simulators do not waste time targeting these faults. Our work focuses on the identification of untestable faults at low cost in terms of both memory and execution time. A powerful and memory efficient implication engine, which is used to identify the effect(s) of asserting logic values in a circuit, is used as the basic building block of our tool. Using the knowledge provided by this implication engine, we identify untestable faults using a fault independent, conflict based analysis. We evaluated our tool against several benchmark circuits (ISCAS '85, ISCAS '89 and ISCAS '93), and found that we could identify considerably more untestable faults in sequential circuits compared to similar conflict based algorithms which have been proposed earlier.
Master of Science

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31

Ahmaida, Anwar M. „Condition monitoring and fault diagnosis of a multi-stage gear transmission using vibro-acoustic signals“. Thesis, University of Huddersfield, 2018. http://eprints.hud.ac.uk/id/eprint/34755/.

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Gearbox condition monitoring(CM) plays a vital role in ensuring the reliability and operational efficiency of a wide range of industrial facilities such as wind turbines and helicopters. Many technologies have been investigated intensively for more accurate CM of rotating machines with using vibro-acoustic signature analysis. However, a comparison of CM performances between surface vibrations and airborne acoustics has not been carried out with the use of emerging signal processing techniques. This research has focused on a symmetric evaluation of CM performances using vibrations obtained from the surface of a multi stage gearbox housing and the airborne sound obtained remotely but close to the gearbox, in conjunction with state of the art signal processing techniques, in order to provide efficient and effective CM for gear transmissions subject to gradual and progressive deteriorations. By completing the comparative studies, this research has resulted in a number of new findings that show significant contributions to knowledge which are detailed as follows. In general, through a comprehensive review of the advancement in the subject, the research has been carried out by integrating an improved dynamic modelling, more realistic experiment verification and more advanced signal processing approaches. The improved modelling has led to an in-depth understanding of the nonlinear modulation in vibro-acoustic signals due to wear effects. Thereafter, Time Synchronous Average (TSA) and Modulation Signal Bispectrum (MSB) are identified to be the most promising signal processing methods to fulfil the evaluation because of their unique properties of simultaneous noise reduction and modulation enhancement. The more realistic tests have demonstrated that arun-to-failure test is necessary to develop effective diagnostic tools as it produces datasets from gear transmissions where deterioration naturally progresses over a long operation, rather than faults created artificially to gear systems, as is common in the majority of studies and the results unreliable. Particularly, the evaluation studies have clarified a number of key issues in the realisation of gearbox diagnostics based on TSA and MSB analysis of the vibrations from two accelerometers and acoustics from two microphones in monitoring the run-to-failure process, which showed slight gear wear of two back-to-back multiple stage helical gearboxes under variable load and speed operations. TSA analysis of vibration signals and acoustic signals allows for accurate monitoring and diagnosis results of the gradual deterioration in the lower speed transmission of both the tested gearboxes. However, it cannot give the correct indication of the higher speed stages in the second gearbox as the reference angle signal is too erroneous due to the distortion of long transmission trains. In addition, acoustic signals can indicate that there is a small determination in the higher speed transmission of the first gearbox. The MSB analysis of vibration signals and sound signals allows for the gathering of more corrective monitoring and diagnostic results of the deterioration in the four stages of transmissions of the two tested gearboxes. MSB magnitudes of both the two lower speed transmissions show monotonic increases with operational time and the increments over a longer period are in excess of three times higher than the baselines, the deteriorations are therefore regarded as severe. For the two higher speed transmissions, the MSB of vibrations and acoustics illustrates small deteriorations in the latter operating hours. Comparatively, acoustic signal based diagnostics can out-perform vibration as it can provide an early indication of deteriorations and correct diagnosis of the faults as microphones perceive a large area of dynamic responses from gearbox housing whereas accelerometers collect a very localised response which can be distorted by transmission paths. In addition, MSB analysis can out-perform conventional TSA as it maintains all diagnostic information regarding the rotating systems and can be implemented without any additional reference channels.

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32

Norris, Natasha Louise. „Implementation of Multi-Constellation Baseline Fault Detection and Exclusion Algorithm Utilizing GPS and GLONASS Signals“. Ohio University / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1535028817622931.

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33

Gururajan, Srikanth. „Design and simulation of advanced fault tolerant flight control schemes“. Morgantown, W. Va. : [West Virginia University Libraries], 2006. https://eidr.wvu.edu/etd/documentdata.eTD?documentid=4915.

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Thesis (Ph. D.)--West Virginia University, 2006.
Title from document title page. Document formatted into pages; contains xii, 132 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 123-128).

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Lynch, John Daniel. „Stochastic fault simulation of triple-modular redundant asynchronous pipeline circuits“. Oregon Health & Science University, 2009. http://content.ohsu.edu/u?/etd,664.

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Ph.D.
Electrical Engineering
The expected unreliability of nano-scale electronic components has renewed interest in the decades-old field of fault-tolerant logic design. Fault-tolerant design makes it possible to build reliable systems from unreliable components. This has spurred recent research into the application of classical FT techniques to nanoelectronics. Meanwhile, the growing gap between logic gate and wire delays, and the growing power consumption of clock generation and distribution circuits, in nanometer-scale silicon integrated circuits has renewed research in asynchronous, or clockless, logic design. This dissertation examines the application of triple modular redundancy (TMR), one of several FT circuit design techniques, to improve the reliability of a variety of clockless circuits and systems. A new fault model, appropriate for clockless circuits is derived and applied to measure the reliability of nonredundant and triplex micropipelines. A new circuit element that combines the functionality of a Muller C-element and a majority gate is introduced to solve special problems at the simplex-triplex interface. The effectiveness of asynchronous FT circuit design strategies based on the results of Monte Carlo simulation experiments with representative circuits modeled in Verilog hardware description language (HDL) is presented.

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Hermansson, Andreas. „Simulation of line fault locator on HVDC Light electrode line“. Thesis, University West, Department of Engineering Science, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hv:diva-2620.

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In this bachelor thesis, cable fault locators are studied for use on the overhead electrode lines in the HVDC (High Voltage Direct Current) Light project Caprivi Link. The cable fault locators studied operates with the principle of travelling waves, where a pulse is sent in the tested conductor. The time difference is measured from the injection moment to the reflection is received. If the propagation speed of the pulse is known the distance to the fault can be calculated. This type of unit is typically referred to as a TDR (Time Domain Reflectometer). The study is performed as a computer simulation where a simplified model of a TDR unit is created and applied to an electrode line model by using PSCAD/EMTDC. Staged faults of open circuit and ground fault types are placed at three distances on the electrode line model, different parameters of the TDR units such as pulse width and pulse amplitude along with its connection to the electrode line are then studied and evaluated. The results of the simulations show that it is possible to detect faults of both open circuit and ground fault types with a suitable TDR unit. Ground faults with high resistance occurring at long distances can be hard to detect due to low reflection amplitudes from the injections. This problem can somewhat be resolved with a function that lets the user compare an old trace of a “healthy” line with the new trace. The study shows that most of the faults can be detected and a distance to the fault can be calculated within an accuracy of ± 250 m. The pulse width of the TDR needs to be at least 10 μs, preferable 20 μs to deliver high enough energy to the fault to create a detectable reflection. The pulse amplitude seams to be of less significance in this simulation, although higher pulse amplitude is likely to be more suitable in a real measurement due to the higher energy delivered to the fault. The Hipotronics TDR 1150 is a unit that fulfil these requirements and should therefore be able to work as a line fault locator on the electrode line.

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Su, Lang. „Fault simulation for stuck-open faults in CMOS combinational circuits“. Ohio : Ohio University, 1993. http://www.ohiolink.edu/etd/view.cgi?ohiou1176236480.

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Abuelyaman, Eltayeb Salih. „Sequential circuits fault simulation using fan out stem based techniques“. Diss., The University of Arizona, 1988. http://hdl.handle.net/10150/184466.

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This dissertation describes a new simulation technique for an automatic test generation system, SCIRTSS version 4.0 (Sequential Circuit Test Sequence System). This test generation system is driven by the hardware compiler AHPL, a Hardware Programming Language, and an intelligent heuristic-based search for test vector generation. Using a fault-injection gate-level simulator and the generated test vector, all the faulty states of the circuit are simulated in parallel and the simulator is thus able to find all detected faults by a particular input sequence. The major objective of this research was to develop a faster replacement for the existing simulation process. The philosophy of divide and conquer is used in the development of the new simulation technique. Sequential networks are divided into combinational sub-networks, and, if necessary, the combinational sub-networks are further reduced into fan-out free regions. Thus, the problem is reduced to a relatively simple combinational one. In addition to the classical faults, the new simulator attempts to detect CMOS stuck-open faults. Several circuits were tested under SCIRTSS 4.0 using both the existing and the new simulation techniques. The results are listed in this paper to verify superiority of the new simulation technique.

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Kilic, Yavuz. „Testing techniques and fault simulation for analogue CMOS integrated circuits“. Thesis, University of Southampton, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.390727.

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39

Mohammed, Thabit Sultan. „Fault diagnosis of distributed systems : analysis, simulation and performance measurement“. Thesis, Cranfield University, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.302751.

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Chen, C. „On fault simulation of digital circuits by critical path tracking“. Thesis, Cranfield University, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.305287.

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41

Aben, Frans. „Experimental simulation of the seismic cycle in fault damage zones“. Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAU012/document.

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Les séismes le long de grandes failles crustales représentent un danger énorme pour de nombreuses populations. Le mécanique de ces failles est influencé par des zones endommagées qui entourent le coeur de faille. La fracturation dans ces zones contrôle chaque étape du cycle sismique. En effet, cette zone contrôle la mécanique de la rupture sismique, elle est un conduit pour les fluides, réagit chimiquement sous l'effet de fluides réactifs, et facilite la déformation pendant les périodes post- et inter-sismiques. Dans cette thèse de doctorat, des expériences de laboratoire ont été réalisées pour mieux comprendre 1) la façon dont l'endommagement est généré pendant le chargement transitoire co-sismique, 2) comment l'endommagement permet de mieux contraindre le chargement co-sismique le long de grandes failles, et iii) comment les fractures peuvent se cicatriser au fil du temps et contrôler l'évolution de la perméabilité et de la résistance mécanique de la faille.L'introduction de la thèse propose une revue critique de la littérature sur la génération de dommages co-sismiques et en particulier sur la formation des roches pulvérisées. Le potentiel de ces roches comme marqueur des déformations co-sismiques est discuté. Bien que ces roches pulvérisées soient prometteuses pour ces aspects, plusieurs questions restent ouvertes.L'une de ces questions concerne les conditions de chargement transitoire nécessaires pour atteindre la pulvérisation. Le seuil de taux de deformation pour atteindre la pulvérisation peut être réduit par des endommagemments progressifs, au cours de ruptures sismiques successives. Des barres de Hopkinson ont été utilisées pour effectuer des chargements dynamique successifs d'une roche cristalline (monzonite). Les résultats montrent que le seuil pour atteindre la pulvérisation est réduit d'au moins 50% lorsque des chargements successives sont imposés. Cette thèse discute aussi pourquoi les roches pulvérisées sont presque toujours observées dans des roches cristallines et peu dans des roches sédimentaires poreuses. Pour comprendre cette observation, des expériences à haute vitesse de déformation ont été effectuées sur des grès de Rothbach. Les résultats montrent que la pulvérisation des grains eux mêmes ne se produit pas dans les grès. L'endommagement reste se produit principalement à une échelle supérieure à celle grains, et des bandes de compaction sont observées. La compétition entre l'endommagement inter- et intra-granulaire est expliquée par les paramètres microstructuraux en combinant deux modèles micromécaniques classiques. Les microstructures observées dans les grès peuvent se former dans le régime quasi-statiques et aussi dans le régime dynamique. Par conséquent, il est recommandée d'être prudent lors de l'interprétation du mécanisme de deformation dans les roches sédimentaires proches de la surface. La dernière question abordée durant la thèse est la cicatrisation post-sismique de fractures co-sismiques. Des expériences ont été réalisées pour cicatriser des fissures par précipitation de calcite. Le but est l'étude du couplage entre l'augmentation de résistance mécanique de la roche fissurée et l'évolution de la perméabilité. Les échantillons fracturées ont été soumis à des conditions de pression et températures similaires de la croûte supérieure et à une percolation d'un fluide sursaturé en calcite pendant plusieurs mois. Ce couplage non-existe dans les premières étapes de la cicatrisation. Il est révélé par l'imagerie par tomographie aux rayons X que le scellement naissant des fractures se produit dans les porosités situées en aval de barrières d'écoulement, et donc dans des régions qui ne touchent pas les principales voies d'écoulement du fluide. Le découplage entre l'augmentation de résistance de la roche et la perméabilité suggère que les zones d'endommagement peu profondes dans les failles actives peuvent rester des conduits actifs pour les fluides plusieurs années après un séisme
Earthquakes along large crustal scale faults are a huge hazard threatening large populations. The behavior of such faults is influenced by the fault damage zone that surrounds the fault core. Fracture damage in such fault damage zones influences each stage of the seismic cycle. The damage zone influences rupture mechanics, behaves as a fluid conduit to release pressurized fluids at depth or to give access to reactive fluids to alter the fault core, and facilitates strain during post- and interseismic periods. Also, it acts as an energy sink for earthquake energy. Here, laboratory experiments were performed to come to a better understanding of how this fracture damage is formed during coseismic transient loading, what this fracture damage can tell us about the earthquake rupture conditions along large faults, and how fracture damage is annihilated over time.First, coseismic damage generation, and specifically the formation of pulverized fault damage zone rock, is reviewed. The potential of these pulverized rocks as a coseismic marker for rupture mechanisms is discussed. Although these rocks are promising in that aspect, several open questions remain.One of these open questions is if the transient loading conditions needed for pulverization can be reduced by progressively damaging during many seismic events. The successive high strain rate loadings performed on quartz monzonites using a split Hopkinson pressure bar reveal that indeed the pulverization strain rate threshold is reduced by at least 50%.Another open question is why pulverized rocks are almost always observed in crystalline lithologies and not in more porous rock, even when crystalline and porous rocks are juxtaposed by a fault. To study this observation, high strain rate experiments were performed on porous Rothbach sandstone. The results show that pervasive pulverization below the grain scale, such as observed in crystalline rock, does not occur in the sandstone samples for the explored strain rate range (60-150 s-1). Damage is mainly occurs at a scale superior to that of the scale of the grains, with intragranular deformation occurring only in weaker regions where compaction bands are formed. The competition between inter- and intragranular damage during dynamic loading is explained with the geometric parameters of the rock in combination with two classic micromechanical models: the Hertzian contact model and the pore-emanated crack model. In conclusion, the observed microstructures can form in both quasi-static and dynamic loading regimes. Therefore caution is advised when interpreting the mechanism responsible for near-fault damage in sedimentary rock near the surface. Moreover, the results suggest that different responses of different lithologies to transient loading are responsible for sub-surface damage zone asymmetry.Finally, post-seismic annihilation of coseismic damage by calcite assisted fracture sealing has been studied in experiments, so that the coupling between strengthening and permeability of the fracture network could be studied. A sample-scale fracture network was introduced in quartz monzonite samples, followed exposure to upper crustal conditions and percolation of a fluid saturated with calcite for several months. A large recovery of up to 50% of the initial P-wave velocity drop has been observed after the sealing experiment. In contrast, the permeability remained more or less constant for the duration of the experiment. This lack of coupling between strengthening and permeability in the first stages of sealing is explained by X-ray computed micro tomography. Incipient sealing in the fracture spaces occurs downstream of flow barriers, thus in regions that do not affect the main fluid flow pathways. The decoupling of strength recovery and permeability suggests that shallow fault damage zones can remain fluid conduits for years after a seismic event, leading to significant transformations of the core and the damage zone of faults with time

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Nascimento, Flávia Maristela Santos. „A SIMULATION-BASED FAULT RESILIENCE ANALYSIS FOR REAL-TIME SYSTEMS“. Escola Politécnica / Instituto de Matemática, 2009. http://repositorio.ufba.br/ri/handle/ri/21461.

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Sistemas de tempo real tem sido amplamente utilizados no contexto de sistemas mecatrônicos uma vez que, para controlar entidades do mundo real, ´e necessário considerar tanto seus requisitos lógicos quanto os temporais. Em tais sistemas, mecanismos para prover tolerância a falhas devem ser implementados já que falhas podem implicar em perdas consideráveis. Por exemplo, um erro em um sistema de controle de voo pode incorrer em perda de vidas humanas. Várias abordagens de escalonamento com tolerância a falhas para sistemas de tempo real foram derivadas. Entretanto, a maioria delas restringe o modelo de sistema e/ou falhas de modo particular, ou estão fortemente acopladas ao modelo de recuperação do sistema ou a política de escalonamento. Além disso, não existe uma m´métrica formal que permita comparar as abordagens existentes do ponto de vista da resiliência a falhas. O objetivo principal deste trabalho ´e preencher esta lacuna, fornecendo uma m´métrica de resiliência a falhas para sistemas de tempo real, que seja o mais independente possível dos modelos do sistema e/ou de falhas. Para tanto, uma análise baseada em simulação foi desenvolvida para calcular a resiliência de todas as tarefas de um sistema, através da simulação de intervalos de tempo específicos. Em seguida, t´técnicas de inferência estatística são utilizadas para inferir a resiliência do sistema. Os resultados mostraram que a m´métrica desenvolvida pode ser utilizada para comparar, por exemplo, duas políticas de escalonamento para sistemas de tempo real sob a ´ótica de resiliência a falhas, o que demonstra que a abordagem desenvolvida ´e razoavelmente independente do modelo de sistema.

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Wendling, Fabrice. „Simulation of doppler ultrasound signals for a laminar, pulsatile, nonuniform flow“. Thesis, Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/16875.

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44

Manamohan, Swathi. „Simulation of Alamouti Coded MIMO Signals over a Nakagami Fading Channel“. Ohio University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou156578000453439.

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45

Ashraf, Syed Aqeel. „The simulation and evaluation of partial discharge acoustic signals in oil“. Thesis, Glasgow Caledonian University, 2015. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.688321.

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46

Yuce, Bilgiday. „Fault Attacks on Embedded Software: New Directions in Modeling, Design, and Mitigation“. Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/81824.

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This research investigates an important class of hardware attacks against embedded software, which uses fault injection as a hacking tool. Fault attacks use well-chosen, targeted fault injection combined with clever system response analysis to break the security of a system. In case of a fault attack on embedded software, faults are injected into the underlying processor hardware and their effects are observed in the executed software's output. This introduces an additional difficulty in mitigation of fault attack risk. Designing efficient countermeasures requires first understanding software, instruction-set, and hardware level components of fault attacks, and then, systematically addressing the vulnerabilities at each level. This research first proposes an instruction fault sensitivity model to capture effects of fault injection on embedded software. Based on the instruction fault sensitivity model, a novel fault attack method called MAFIA (Micro-architecture Aware Fault Injection Attack) is also introduced. MAFIA exploits the vulnerabilities in multiple abstraction layers. This enables an adversary to determine best points to attack during the execution as well as pinpoint the desired fault effects. It has been shown that MAFIA breaks the existing countermeasures with significantly fewer fault injections than the traditional fault attacks. Another contribution of the research is a fault attack simulator, MESS (Micro-architectural Embedded System Simulator). MESS enables a user to model hardware, instruction-set, and software level components of fault attacks in a simulation environment. Thus, software designers can use MESS to evaluate their programs against several real-world fault attack scenarios. The final contribution of this research is the fault-attack-resistant FAME (Fault-attack Aware Microprocessor Extensions) processor, which is suited for embedded, constrained systems. FAME combines fault detection in hardware and fault response in software. This allows low-cost, performance-efficient, flexible, and backward-compatible integration of hardware and software techniques to mitigate fault attack risk. FAME has been designed as an architectural concept as well as implemented as a chip prototype. In addition to protection mechanisms, the chip prototype also includes fault injection and analysis features to ease fault attack research. The findings of this research indicate that considering multiple abstraction layers together is essential for efficient fault attacks, countermeasures, and evaluation techniques.
Ph. D.

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Han, Kyunghwan Lee Soo-Young. „A parallel implementation of fault simulation on a cluster of workstations“. Auburn, Ala., 2006. http://repo.lib.auburn.edu/2006%20Summer/Theses/HAN_KYUNG_21.pdf.

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48

Xia, Likun. „Automatic generation of high level fault simulation models for analogue circuits“. Thesis, University of Hull, 2008. http://hydra.hull.ac.uk/resources/hull:1601.

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High level modelling (HLM) for operational amplifiers (op amps) has been previously carried out successfully using models generated by published automated model generation (AMG) approaches. Furthermore, high level fault modelling (HLFM) has been shown to work reasonably well using manually designed fault models. However, no evidence shows that published AMG approaches based on op amps have been used in HLFM.This thesis describes an investigation into the development of adaptive self-tuning algorithms for automated analogue circuit modelling suitable for HLM and HLFM applications. The algorithms and simulation packages were written in MATLAB and the hardware description language - VHDL-AMS.The properties of these self-tuning algorithms were investigated by modelling a two-stage CMOS op amp and a comparator, and comparing simulations of the macromodel against those of the original SPICE circuit utilizing transient analysis.The proposed algorithms generate multiple models to cover a wide range of input conditions by detecting nonlinearity through variations in output error, and can achieve bumpless transfer between models and handle nonlinearity.This thesis describes the design, implementation and validation of these algorithms, their performance being evaluated for HLFM for both analogue and mix mode systems.HLFM results show that the models can handle both linear and nonlinear situations with good accuracy in a low-pass filter, and model digital outputs in a flash ADC correctly. Comparing with a published fault model, better accuracy has been achieved in terms of output signals using fault coverage measurement.

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Söderström, Sebastian. „Simplified Model For Simulation of Fault Ride Through at Hydropower Units“. Thesis, Uppsala universitet, Institutionen för fysik och astronomi, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-445855.

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As new requirements for grid connected generators were implemented, the requirements for evaluating the Fault Ride Through capabilities of the generators became stricter. When refurbishing a power unit, proof that the power unit meet the requirements must be submitted to the authorities. Performing simulations of the Fault Ride Through of a production unit is an extensive process and requires advanced simulation models and tools. Therefore, the need for a simplified tool for estimating the Fault Ride Through capability arose, which is what the project produced. Also, knowledge of which production module characteristics (such as the generator parameters, transformer and excitation system) have the largest effect on the Fault Ride Through time, would also be beneficial. Through the creation of Simulink simulation models of two hydropower stations and a sensitivity analysis of station parameters, the relative effect of the parameters on the Fault Ride Through time is estimated and implemented into a time independent Fault Ride Through time estimation tool, based on the Equal Area criterion. The purpose of the time-independent Fault Ride Through time estimation tool is to provide an insight into the approximate transient stability of the hydropower station and which parameters affect the performance the most. Simulations show that the transient reactance of the generator, the generator inertia, the transient time constant and the transformer inductance have the largest effect on the Fault Ride Through capability. The results show that a simplified tool cannot estimate the Fault Ride Through as accurately as a time-domain simulation model can.

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Von, Kirchbach Johann Carlo. „In silico analysis of RNA signals and evolutionary constraints in influenza A virus“. Thesis, University of Cambridge, 2011. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.609825.

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