Thematische Bibliographien / Ovonic Threshold Selector (OTS)

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Auswahl der wissenschaftlichen Literatur zum Thema „Ovonic Threshold Selector (OTS)“

Autor: Grafiati
Veröffentlicht am 25. Mai 2024

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Zeitschriftenartikel zum Thema "Ovonic Threshold Selector (OTS)"

1

Zhang, Shiqing, Bing Song, Shujing Jia, Rongrong Cao, Sen Liu, Hui Xu und Qingjiang Li. „Multilayer doped-GeSe OTS selector for improved endurance and threshold voltage stability“. Journal of Semiconductors 43, Nr. 10 (01.10.2022): 104101. http://dx.doi.org/10.1088/1674-4926/43/10/104101.

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Abstract Selector devices are indispensable components of large-scale memristor array systems. The thereinto, ovonic threshold switching (OTS) selector is one of the most suitable candidates for selector devices, owing to its high selectivity and scalability. However, OTS selectors suffer from poor endurance and stability which are persistent tricky problems for application. Here, we report on a multilayer OTS selector based on simple GeSe and doped-GeSe. The experimental results show improving selector performed extraordinary endurance up to 1010 and the fluctuation of threshold voltage is 2.5%. The reason for the improvement may lie in more interface states which strengthen the interaction among individual layers. These developments pave the way towards tuning a new class of OTS materials engineering, ensuring improvement of electrical performance.
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2

Kim, Jaeyeon, Wansun Kim, Jusung Kim und Hyunchul Sohn. „Locally formed conductive filaments in an amorphous Ga2Te3 ovonic threshold switching device“. AIP Advances 13, Nr. 3 (01.03.2023): 035221. http://dx.doi.org/10.1063/5.0140715.

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Ovonic threshold switching (OTS) selector devices based on chalcogenide materials are promising candidates for addressing the sneak current in high-density cross-point array structures owing to their high selectivity, high endurance, and fast switching speed. However, the OTS mechanism remains controversial and needs to be clarified. In this study, the formation of local conductive filaments (CFs) during threshold switching in an amorphous Ga2Te3 OTS selector device was investigated by electrical measurements and conductive-atomic force microscopy (C-AFM). The amorphous Ga2Te3 OTS selector device requires a forming process before the threshold switching processes. In addition, the off-current density ( JOFF) was dependent on the area of the bottom electrode. The difference between the threshold voltage ( VTH) and the hold voltage ( VH) increased as the applied higher electric field increased. The drift of VTH ( VTH drift) depended on the relaxation time and measurement temperature. The requirements of the forming process, area dependence of the JOFF, the difference between the VTH− VH with the applied electric field, and VTH drift are expected to depend on locally formed CFs. In addition, the analysis of the C-AFM results strongly supports the formation of local CFs during threshold switching in an amorphous Ga2Te3 OTS selector device. The understanding of OTS behavior uncovered in this study may provide guidance for improving the characteristics of and designing materials for future applications of OTS selector devices.
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3

Wang, Lun, Jinyu Wen, Rongjiang Zhu, Jiangxi Chen, Hao Tong und Xiangshui Miao. „Failure mechanism investigation and endurance improvement in Te-rich Ge–Te based ovonic threshold switching selectors“. Applied Physics Letters 121, Nr. 19 (07.11.2022): 193501. http://dx.doi.org/10.1063/5.0127177.

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The endurance of ovonic threshold switching (OTS) selectors is a key element for memory application. However, multi-element system for OTS in recent studies will induce element or phase segregation and lead to device failure. Since pure Te based device characterizes relatively high off current, in this work, we studied a Te-rich Ge–Te based OTS selector. We first conducted a failure analysis on Ge–Te based OTS selector. Through first-principles calculations, we found that a relatively larger Ge concentration in the Ge–Te system may lead to a worse device endurance after continuous operation due to the migration of Ge atoms. Experiments further proved that device endurance can be improved more than two orders of magnitude through decreasing Ge concentration and the element segregation is greatly weakened by the composition close to elemental. Finally, a significantly improved endurance of 2 × 1010 was realized in Ge10Te90 based OTS selectors. In the meantime, the Ge10Te90 based OTS selectors show good switching performance and potential for use in memory applications.
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4

Wu, Renjie, Yuting Sun, Shuhao Zhang, Zihao Zhao und Zhitang Song. „Great Potential of Si-Te Ovonic Threshold Selector in Electrical Performance and Scalability“. Nanomaterials 13, Nr. 6 (21.03.2023): 1114. http://dx.doi.org/10.3390/nano13061114.

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The selector is an indispensable section of the phase change memory (PCM) chip, where it not only suppresses the crosstalk, but also provides high on-current to melt the incorporated phase change material. In fact, the ovonic threshold switching (OTS) selector is utilized in 3D stacking PCM chips by virtue of its high scalability and driving capability. In this paper, the influence of Si concentration on the electrical properties of Si-Te OTS materials is studied; the threshold voltage and leakage current remain basically unchanged with the decrease in electrode diameter. Meanwhile, the on-current density (Jon) increases significantly as the device is scaling down, and 25 MA/cm2 on-current density is achieved in the 60-nm SiTe device. In addition, we also determine the state of the Si-Te OTS layer and preliminarily obtain the approximate band structure, from which we infer that the conduction mechanism conforms to the Poole-Frenkel (PF) model.
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5

Noé, Pierre, Anthonin Verdy, Francesco d’Acapito, Jean-Baptiste Dory, Mathieu Bernard, Gabriele Navarro, Jean-Baptiste Jager, Jérôme Gaudin und Jean-Yves Raty. „Toward ultimate nonvolatile resistive memories: The mechanism behind ovonic threshold switching revealed“. Science Advances 6, Nr. 9 (Februar 2020): eaay2830. http://dx.doi.org/10.1126/sciadv.aay2830.

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Fifty years after its discovery, the ovonic threshold switching (OTS) phenomenon, a unique nonlinear conductivity behavior observed in some chalcogenide glasses, has been recently the source of a real technological breakthrough in the field of data storage memories. This breakthrough was achieved because of the successful 3D integration of so-called OTS selector devices with innovative phase-change memories, both based on chalcogenide materials. This paves the way for storage class memories as well as neuromorphic circuits. We elucidate the mechanism behind OTS switching by new state-of-the-art materials using electrical, optical, and x-ray absorption experiments, as well as ab initio molecular dynamics simulations. The model explaining the switching mechanism occurring in amorphous OTS materials under electric field involves the metastable formation of newly introduced metavalent bonds. This model opens the way for design of improved OTS materials and for future types of applications such as brain-inspired computing.
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6

Seong, Dongjun, Su Yeon Lee, Hyun Kyu Seo, Jong-Woo Kim, Minsoo Park und Min Kyu Yang. „Highly Reliable Ovonic Threshold Switch with TiN/GeTe/TiN Structure“. Materials 16, Nr. 5 (02.03.2023): 2066. http://dx.doi.org/10.3390/ma16052066.

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A new architecture has become necessary owing to the power consumption and latency problems of the von Neumann architecture. A neuromorphic memory system is a promising candidate for the new system as it has the potential to process large amounts of digital information. A crossbar array (CA), which consists of a selector and a resistor, is the basic building block for the new system. Despite the excellent prospects of crossbar arrays, the biggest obstacle for them is sneak current, which can cause a misreading between the adjacent memory cells, thus resulting in a misoperation in the arrays. The chalcogenide-based ovonic threshold switch (OTS) is a powerful selector with highly nonlinear I–V characteristics that can be used to address the sneak current problem. In this study, we evaluated the electrical characteristics of an OTS with a TiN/GeTe/TiN structure. This device shows nonlinear DC I–V characteristics, an excellent endurance of up to 109 in the burst read measurement, and a stable threshold voltage below 15 mV/dec. In addition, at temperatures below 300 °C, the device exhibits good thermal stability and retains an amorphous structure, which is a strong indication of the aforementioned electrical characteristics.
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7

Laguna, C., M. Bernard, J. Garrione, F. Fillot, F. Aussenac, D. Rouchon, G. Lima, L. Militaru, A. Souifi und G. Navarro. „Inside the ovonic threshold switching (OTS) device based on GeSbSeN: Structural analysis under electrical and thermal stress“. Journal of Applied Physics 133, Nr. 7 (21.02.2023): 074501. http://dx.doi.org/10.1063/5.0134947.

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In this article, we present the structural investigation by Raman spectroscopy of GeSbSeN ovonic threshold switching (OTS) material once integrated in selector devices featuring a top electrode based on a transparent and conductive indium tin oxide layer. The devices are characterized by standard electrical protocols, and the structural evolution of the material is investigated after several switching operations. The results are correlated with the spectra obtained from blanket samples annealed at increasing temperature and are supported by XRD and TEM analyses. We establish a link between the evolution of the material structure with the annealing process and the device behavior along cycling, bringing important advancement in the understanding of the switching mechanism and of the origin of the failure in OTS devices.
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8

Kim, Myoungsub, Youngjun Kim, Minkyu Lee, Seok Man Hong, Hyung Keun Kim, Sijung Yoo, Taehoon Kim, Seung-min Chung, Taeyoon Lee und Hyungjun Kim. „PE-ALD of Ge1−xSx amorphous chalcogenide alloys for OTS applications“. Journal of Materials Chemistry C 9, Nr. 18 (2021): 6006–13. http://dx.doi.org/10.1039/d1tc00650a.

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Three-dimensional (3D) cross-point (X-point) technology, including amorphous chalcogenide-based ovonic threshold switching (OTS) selectors, is bringing new changes to the memory hierarchy for high-performance computing systems.
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9

Minguet Lopez, J., T. Hirtzlin, M. Dampfhoffer, L. Grenouillet, L. Reganaz, G. Navarro, C. Carabasse et al. „OxRAM + OTS optimization for binarized neural network hardware implementation“. Semiconductor Science and Technology 37, Nr. 1 (08.12.2021): 014001. http://dx.doi.org/10.1088/1361-6641/ac31e2.

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Abstract Low-power memristive devices embedded on graphics or central processing units logic core are a very promising non-von-Neumann approach to improve significantly the speed and power consumption of deep learning accelerators, enhancing their deployment on embedded systems. Among various non-ideal emerging neuromorphic memory devices, synaptic weight hardware implementation using resistive random-access memories (RRAMs) within 1T1R architectures promises high performance on low precision binarized neural networks (BNN). Taking advantage of the RRAM capabilities and allowing to substantially improve the density thanks to the ovonic threshold selector (OTS) selector, this work proposes to replace the standard 1T1R architecture with a denser 1S1R crossbar system, where an HfO2-based resistive oxide memory (OxRAM) is co-integrated with a Ge-Se-Sb-N-based OTS. In this context, an extensive experimental study is performed to optimize the 1S1R stack and programming conditions for extended read window margin and endurance characteristics. Focusing on the standard machine learning MNIST image recognition task, we perform offline training simulations in order to define the constraints on the devices during the training process. A very promising bit error rate of ∼10−3 is demonstrated together with 1S1R 104 error-free programming endurance characteristics, fulfilling the requirements for the application of interest. Based on this simulation and experimental study, BNN figures of merit (system footprint, number of weight updates, accuracy, inference speed, electrical consumption per image classification and tolerance to errors) are optimized by engineering the number of learnable parameters of the system. Altogether, an inherent BNN resilience to 1S1R parasitic bit errors is demonstrated.
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10

Kweon, Jun Young, und Yun-Heup Song. „CMOS Based Ovonic Threshold Switching Emulation Circuitry“. Journal of Nanoscience and Nanotechnology 20, Nr. 8 (01.08.2020): 4977–79. http://dx.doi.org/10.1166/jnn.2020.17807.

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Ovonic Threshold Switch (OTS) device is most popular switching device in PRAM. There are many OTS device research; however, it is hard to make reasonable OTS device which uses a circuit simulation and real device. In this work, we studied the OTS device emulation circuit, which can follow OTS characteristic, especially snapback current using 0.18 μm CMOS technology. This circuitry composes snapback current generator, cut off switch and output driver. Snapback current generator can make the current level up to 300 μA.
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Konferenzberichte zum Thema "Ovonic Threshold Selector (OTS)"

1

Alayan, M., E. Vianello, G. Navarro, C. Carabasse, S. La Barbera, A. Verdy, N. Castellani et al. „In-depth investigation of programming and reading operations in RRAM cells integrated with Ovonic Threshold Switching (OTS) selectors“. In 2017 IEEE International Electron Devices Meeting (IEDM). IEEE, 2017. http://dx.doi.org/10.1109/iedm.2017.8268311.

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2

Bourgeois, G., V. Meli, R. Antonelli, C. Socquet-Clerc, T. Magis, F. Laulagnet, B. Hemard et al. „Crossbar Arrays based on “Wall” Phase-Change Memory (PCM) and Ovonic- Threshold Switching (OTS) Selector: a Device Integration Challenge Towards New Computing Paradigms in Embedded Applications“. In 2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). IEEE, 2023. http://dx.doi.org/10.1109/edtm55494.2023.10102961.

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3

Zhang, Shiqing, Bing Song, Shujing Jia, Rongrong Cao, Sen Liu, Hui Xu und Qingjiang Li. „A Symmetric Multilayer GeSe/GeSeSbTe Ovonic Threshold Switching Selector with Improved Endurance and Stability“. In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA). IEEE, 2021. http://dx.doi.org/10.1109/icta53157.2021.9661914.

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4

Woo, Jiyong, und Shimeng Yu. „Design Space Exploration of Ovonic Threshold Switch (OTS) for Sub-Threshold Read Operation in Cross-Point Memory Arrays“. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2019. http://dx.doi.org/10.1109/iscas.2019.8702296.

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5

Woo, Jiyong, und Shimeng Yu. „Device Design and Material Considerations of Ovonic Threshold Switch (OTS) for Cross-point MRAM Array“. In 2019 Electron Devices Technology and Manufacturing Conference (EDTM). IEEE, 2019. http://dx.doi.org/10.1109/edtm.2019.8731137.

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6

Verdy, A., M. Bernard, N. Castellani, P. Noé, C. Licitra, J. Garrione, G. Bourgeois, M. C. Cyrille und G. Navarro. „Engineering of Ovonic Threshold Switching Selector: A Link from the Material Properties to the Electrical Performances“. In 2019 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2019. http://dx.doi.org/10.7567/ssdm.2019.h-7-03.

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7

Garbin, D., W. Devulder, R. Degraeve, G. L. Donadio, S. Clima, K. Opsomer, A. Fantini et al. „Composition Optimization and Device Understanding of Si-Ge-As-Te Ovonic Threshold Switch Selector with Excellent Endurance“. In 2019 IEEE International Electron Devices Meeting (IEDM). IEEE, 2019. http://dx.doi.org/10.1109/iedm19573.2019.8993547.

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8

Lee, Jangseop, Seonghun Kim, Sangmin Lee, Sanghyun Ban, Seongjae Heo, Donghwa Lee, Oleksandr Mosendz und Hyunsang Hwang. „Improving the SiGeAsTe Ovonic Threshold Switching (OTS) Characteristics by Microwave Annealing for Excellent Endurance (> 1011) and Low Drift Characteristics“. In 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). IEEE, 2022. http://dx.doi.org/10.1109/vlsitechnologyandcir46769.2022.9830179.

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9

Avasarala, Naga Sruti, G. L. Donadio, T. Witters, K. Opsomer, B. Govoreanu, A. Fantini, S. Clima et al. „Half-threshold bias Ioff reduction down to nA range of thermally and electrically stable high-performance integrated OTS selector, obtained by Se enrichment and N-doping of thin GeSe layers“. In 2018 IEEE Symposium on VLSI Technology. IEEE, 2018. http://dx.doi.org/10.1109/vlsit.2018.8510680.

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