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Auswahl der wissenschaftlichen Literatur zum Thema „Optimisation de codes parallèles“
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Zeitschriftenartikel zum Thema "Optimisation de codes parallèles"
Dai, Jingke, Xiao Chen, Fenggan Zhang und Kai Kang. „Optimisation design of systematic fountain codes on fading channels“. IET Communications 13, Nr. 20 (19.12.2019): 3369–76. http://dx.doi.org/10.1049/iet-com.2019.0426.
Der volle Inhalt der QuelleLi, S. F., J. Chen und L. Q. Zhang. „Optimisation of complete complementary codes in MIMO radar system“. Electronics Letters 46, Nr. 16 (2010): 1157. http://dx.doi.org/10.1049/el.2010.1394.
Der volle Inhalt der QuelleOrr, John, Ana Bras und Tim Ibell. „Effectiveness of design codes for life cycle energy optimisation“. Energy and Buildings 140 (April 2017): 61–67. http://dx.doi.org/10.1016/j.enbuild.2017.01.085.
Der volle Inhalt der QuelleBird, Robert F., Patrick Gillies, Michael R. Bareford, Andy Herdman und Stephen Jarvis. „Performance Optimisation of Inertial Confinement Fusion Codes using Mini-applications“. International Journal of High Performance Computing Applications 32, Nr. 4 (02.11.2016): 570–81. http://dx.doi.org/10.1177/1094342016670225.
Der volle Inhalt der QuelleHe, Ruichun, Changxi Ma, Cunrui Ma, Wei Zhang und Qiang Xiao. „Optimisation algorithm for logistics distribution route based on Prufer codes“. International Journal of Wireless and Mobile Computing 9, Nr. 2 (2015): 205. http://dx.doi.org/10.1504/ijwmc.2015.072573.
Der volle Inhalt der QuelleYang, Jin, Zhaokun Qiu, Weidong Jiang und Xiang Li. „Poly‐phase codes optimisation for multi‐input–multi‐output radars“. IET Signal Processing 7, Nr. 2 (April 2013): 93–100. http://dx.doi.org/10.1049/iet-spr.2012.0195.
Der volle Inhalt der QuelleWeng, Tien-hsiung, und Barbara Chapman. „Towards optimisation of openMP codes for synchronisation and data reuse“. International Journal of High Performance Computing and Networking 1, Nr. 1/2/3 (2004): 43. http://dx.doi.org/10.1504/ijhpcn.2004.007564.
Der volle Inhalt der QuelleTräff, Erik A., Anton Rydahl, Sven Karlsson, Ole Sigmund und Niels Aage. „Simple and efficient GPU accelerated topology optimisation: Codes and applications“. Computer Methods in Applied Mechanics and Engineering 410 (Mai 2023): 116043. http://dx.doi.org/10.1016/j.cma.2023.116043.
Der volle Inhalt der QuelleSrijuntongsiri, Gun, und Stanislav S. Makhanov. „Optimisation of five-axis machining G-codes in the angular space“. International Journal of Production Research 53, Nr. 11 (09.10.2014): 3207–27. http://dx.doi.org/10.1080/00207543.2014.965421.
Der volle Inhalt der QuelleDeng, Dachun, Dazhuan Xu und Shengkai Xu. „Optimisation design of systematic LT codes over AWGN multiple access channel“. IET Communications 12, Nr. 11 (17.07.2018): 1351–58. http://dx.doi.org/10.1049/iet-com.2017.1063.
Der volle Inhalt der QuelleDissertationen zum Thema "Optimisation de codes parallèles"
Benmouhoub, Farah. „Optimisation de la précision numérique des codes parallèles“. Thesis, Perpignan, 2022. http://www.theses.fr/2022PERP0009.
Der volle Inhalt der QuelleIn high performance computing, nearly all the implementations and published experiments use foating-point arithmetic. However, since foating-point numbers are finite approximations of real numbers, it may result in hazards because of the accumulated errors.These round-off errors may cause damages whose gravity varies depending on the critical level of the application. Parallelism introduces new numerical accuracy problems due to the order of operations in this kind of systems. The proposed thesis subject concerns this last point: improving the precision of massively parallel scientific computing codes such as those found in the field of HPC (High Performance Computing)
Laguzet, Florence. „Etude et optimisation d'algorithmes pour le suivi d'objets couleur“. Thesis, Paris 11, 2013. http://www.theses.fr/2013PA112197.
Der volle Inhalt der QuelleThe work of this thesis focuses on the improvement and optimization of the Mean-Shift color object tracking algorithm, both from a theoretical and architectural point of view to improve both the accuracy and the execution speed. The first part of the work consisted in improving the robustness of the tracking. For this, the impact of color space representation on the quality of tracking has been studied, and a method for the selection of the color space that best represents the object to be tracked has been proposed. The method has been coupled with a strategy determining the appropriate time to recalculate the model. Color space selection method was also used in collaboration with another object tracking algorithm to further improve the tracking robustness for particularly difficult sequences : the covariance tracking which is more time consuming. The objective of this work is to obtain an entire real time system running on multi-core SIMD processors. A study and optimization phase has been made in order to obtain algorithms with a complexity that is configurable so that they can run in real time on different platforms, for various sizes of images and object tracking. In this context of compromise between speed and performance, it becomes possible to do real-time tracking on processors like ARM Cortex A9
Fang, Juing. „Décodage pondère des codes en blocs et quelques sujets sur la complexité du décodage“. Paris, ENST, 1987. http://www.theses.fr/1987ENST0005.
Der volle Inhalt der QuelleRaulet, Mickaël. „Optimisations mémoire dans la méthodologie AAA pour code embarqué sur architecture parallèles“. Rennes, INSA, 2006. https://tel.archives-ouvertes.fr/tel-00124276v2.
Der volle Inhalt der QuelleIn the field of embedded electronics, the applications of digital communications and image processing induce very strong time constraints while allowing a limitation in resources and performances of the computation units. The restriction of the memory usable can be in opposite of fields such as video coding. A solution to achieve a real-time implementation can be reached through a distribution on a parallel architecture. These problems are the framework of this work. More precisely, that is why we developed a process of rapid prototyping dedicated to the parallel architectures with several processors of digital signal processing of the last generation (FPGA, DSP). The optimization aspect of the allocated memory is performed here in a more precise way. The prototyping process was elaborate around SynDEx, a tool developed with the INRIA, based on the AAA methodology. This process aims at improving the implementation of an algorithm on a multi-component architecture by determining an optimal distribution and scheduling. SynDEx carries out the adequation phase itself, and generates an executive independent of the target. We initially contributed to the automation of the process on multiprocessors target, by adding a functional layer, and by developing new specific kernels for processors of digital signal. In an embedded context, our concerns are then the minimization of the memory for the generated code. It is still a problem very open for multi-component architectures. The found solution, thanks to the algorithms of colouring of graph, leads to a significant improvement of the results of distributed implementation. The rapid prototyping towards multi-component platforms is automatic today, and memory optimizations are directly integrated in the SynDEx tool. Another part of this work related to the development and integration, through our prototyping process, of consequent applications in the fields both of the image processing (MPEG-4, LAR) and both of the telecommunications (MC-CDMA, UMTS). Results validate the whole process, and show its adaptation to systems oriented data processing. The report is concluded on new perspectives, while being interested in particular in multi-layer systems linking together several layers: a “transport” layer of telecommunication and a “service” layer of image processing
Surós, Rina. „Modélisation et optimisation de systèmes parallèles“. Paris 11, 1988. http://www.theses.fr/1988PA112188.
Der volle Inhalt der QuelleRaulet, Mickaël. „Optimisations Mémoire dans la méthodologie « Adéquation Algorithme Architecture » pour Code Embarqué sur Architectures Parallèles“. Phd thesis, INSA de Rennes, 2006. http://tel.archives-ouvertes.fr/tel-00124276.
Der volle Inhalt der QuelleLa chaîne de prototypage a été élaborée autour de SynDEx, outil développé à l'INRIA basé sur la méthodologie AAA. Cette dernière vise à améliorer l'implantation d'un algorithme sur une architecture multi-processeurs en déterminant une distribution et ordonnancement optimaux. SynDEx réalise la phase d'adéquation proprement dite, et génère un exécutif indépendant de la cible. Nous avons dans un premier temps contribué à l'automatisation du processus sur cible multi-processeurs, en rajoutant d'une couche fonctionnelle, et en développant de nouveaux noyaux spécifiques pour des processeurs de traitement numérique du signal.
Dans un contexte embarqué, nos préoccupations se sont ensuite penchées sur la minimisation de la mémoire pour le code généré. C'est un problème encore très ouvert pour des architectures multi-composants. La solution trouvée, grâce aux algorithmes de coloriage de graphe, aboutit à une amélioration significative des résultats d'implantation distribuée. Le portage vers des plates-formes multi-composants est aujourd'hui automatique, notamment en intégrant directement dans l'outil SynDEx l'optimisation mémoire.
Une autre partie importante de ces travaux a concerné le développement et l'intégration, à travers notre processus de prototypage, d'applications conséquentes dans les domaines du traitement des images (MPEG-4, LAR) et celui des télécommunications (MC-CDMA, UMTS). Les résultats obtenus valident l'ensemble du processus proposé, et démontrent son adaptation à des systèmes globalement orientés traitement de l'information. Le mémoire se conclut en ouvrant sur de nouvelles perspectives, en s'intéressant notamment à des systèmes multi-couches réunissant des couches « transport » de télécommunication numériques et des couches « services » de traitement des images.
Alba-Gomez, Ofélia. „Optimisation de trajectoires de robots parallèles redondants“. Nantes, 2007. http://www.theses.fr/2007NANT2126.
Der volle Inhalt der QuelleThe aims of studies in tbis thesis are the definition of perfonnance indices of3-RRR parallel robots and the formulation of a method for trajectory planning in order to avoid singular configurations and optimize the kinetostatic performances of the manipulator. By using the isotropy conditions we define a characteristic length in order to homogenize the parallel Jacobian matrix. Thus, a consistent performance index is defined by using such a matrix as the distance of a configuration to parallel singularities. The optimum value of this index is determined an ideal isotropic configuration. Then, another index of the manipulator is defined by using a geometric interpretation of conditions of parallel singularities. An additional study allows us to verify the equivalence of the two proposed indices. Then, for our kinematically redundant robot, a method for automatic trajectory planning is proposed which optimizes the manipulator performances during the execution of a specified task. This method is inspired from an algorithm of trajectory planning for auto-guided vehicles. Several cases of study are analyzed in order to validate the effectiveness of our method in environments without and with obstacles. We consider a scenario in which the accessibility to the whole path is not possible using only one working mode; thus, we propose a supplementary formulation in order to achieve a suitable change of working mode to complete the task
Leguay-Durand, Sylvie. „Conception et optimisation de mécanismes parallèles à mobilités restreintes“. Toulouse, ENSAE, 1998. http://www.theses.fr/1998ESAE0014.
Der volle Inhalt der QuelleLegaux, Joeffrey. „Squelettes algorithmiques pour la programmation et l'exécution efficaces de codes parallèles“. Phd thesis, Université d'Orléans, 2013. http://tel.archives-ouvertes.fr/tel-00990852.
Der volle Inhalt der QuelleMattoussi, Ferdaouss. „Conception et optimisation de codes AL-FEC : les codes GLDPC- Staircase“. Phd thesis, Université de Grenoble, 2014. http://tel.archives-ouvertes.fr/tel-00969573.
Der volle Inhalt der QuelleBücher zum Thema "Optimisation de codes parallèles"
Traynor, Karen L. The optimisation of some binary linear codes. Salford: University of Salford, 1988.
Den vollen Inhalt der Quelle findenBuchteile zum Thema "Optimisation de codes parallèles"
„Optimisation of Hierarchical Tree Codes“. In Many-Body Tree Methods in Physics, 65–87. Cambridge University Press, 1996. http://dx.doi.org/10.1017/cbo9780511529368.006.
Der volle Inhalt der QuelleShankar Prasad, Mani, und Shivani Verma. „Irreducible Polynomials: Non-Binary Fields“. In Recent Advances in Polynomials [Working Title]. IntechOpen, 2022. http://dx.doi.org/10.5772/intechopen.101897.
Der volle Inhalt der QuelleKonferenzberichte zum Thema "Optimisation de codes parallèles"
Jackson, Adrian, Fiona Reid, Stephen Booth, Joachim Hein, Jan Westerholm, Mats Aspnas, Miquel Catala und Alejandro Soba. „Parallel Optimisation Strategies for Fusion Codes“. In 2011 19th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP). IEEE, 2011. http://dx.doi.org/10.1109/pdp.2011.15.
Der volle Inhalt der QuelleRiley, C. P. „Design optimisation with electromagnetic finite element codes“. In IEE Seminar on Current Trends in the Use of Finite Elements (FE) in Electromechanical Design and Analysis. IEE, 2000. http://dx.doi.org/10.1049/ic:20000054.
Der volle Inhalt der QuelleBird, R. F., P. Gillies, M. R. Bareford, J. A. Herdman und S. A. Jarvis. „Mini-App Driven Optimisation of Inertial Confinement Fusion Codes“. In 2015 IEEE International Conference on Cluster Computing (CLUSTER). IEEE, 2015. http://dx.doi.org/10.1109/cluster.2015.132.
Der volle Inhalt der QuelleKaushik, Vignesh Srinivas, und Patrick Janssen. „Multi-criteria evolutionary optimisation of building enveloped during conceptual stages of design“. In CAADRIA 2012: Beyond Codes and Pixels. CAADRIA, 2012. http://dx.doi.org/10.52842/conf.caadria.2012.497.
Der volle Inhalt der QuelleAbalenkovs, Maksims. „Performance optimisation of stencil-based codes for shared memory architectures“. In 2017 11th European Conference on Antennas and Propagation (EUCAP). IEEE, 2017. http://dx.doi.org/10.23919/eucap.2017.7928861.
Der volle Inhalt der QuelleSharma, Himanshu, Vibhav Kumar Sachan, Syed Akhtar Imam und Monika. „Optimisation of energy efficiency in wireless sensor networks using error control codes“. In 2012 Students Conference on Engineering and Systems (SCES 2012). IEEE, 2012. http://dx.doi.org/10.1109/sces.2012.6199067.
Der volle Inhalt der QuelleVoie, Per Erlend, und Nils Sødahl. „Optimisation of Steel Catenary Risers“. In ASME 2013 32nd International Conference on Ocean, Offshore and Arctic Engineering. American Society of Mechanical Engineers, 2013. http://dx.doi.org/10.1115/omae2013-10107.
Der volle Inhalt der QuelleGerber, David, Mohamed M. ElSheikh und Aslihan Senel Solmaz. „Associative parametric design and financial optimisation - 'Cash Back 1.0': Parametric design for visualising and optimising Return on Investment for early stage design decision-making“. In CAADRIA 2012: Beyond Codes and Pixels. CAADRIA, 2012. http://dx.doi.org/10.52842/conf.caadria.2012.047.
Der volle Inhalt der QuelleCaponnetto, Mario. „Optimisation and Design of Contra-Rotating Propellers“. In SNAME 9th Propeller and Shafting Symposium. SNAME, 2000. http://dx.doi.org/10.5957/pss-2000-03.
Der volle Inhalt der QuelleRodriguez-Canal, Gabriel, Nick Brown, Maurice Jamieson, Emilien Bauer, Anton Lydike und Tobias Grosser. „Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA“. In SC-W 2023: Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis. New York, NY, USA: ACM, 2023. http://dx.doi.org/10.1145/3624062.3624543.
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