Einloggen

Thematische Bibliographien / Machine multiprocesseur / Zeitschriftenartikel

Um die anderen Arten von Veröffentlichungen zu diesem Thema anzuzeigen, folgen Sie diesem Link: Machine multiprocesseur.

Zeitschriftenartikel zum Thema „Machine multiprocesseur“

Autor: Grafiati

Veröffentlicht am 25. Mai 2024

Geben Sie eine Quelle nach APA, MLA, Chicago, Harvard und anderen Zitierweisen an

Wählen Sie eine Art der Quelle aus:

Machen Sie sich mit Top-50 Zeitschriftenartikel für die Forschung zum Thema "Machine multiprocesseur" bekannt.

Neben jedem Werk im Literaturverzeichnis ist die Option "Zur Bibliographie hinzufügen" verfügbar. Nutzen Sie sie, wird Ihre bibliographische Angabe des gewählten Werkes nach der nötigen Zitierweise (APA, MLA, Harvard, Chicago, Vancouver usw.) automatisch gestaltet.

Sie können auch den vollen Text der wissenschaftlichen Publikation im PDF-Format herunterladen und eine Online-Annotation der Arbeit lesen, wenn die relevanten Parameter in den Metadaten verfügbar sind.

Sehen Sie die Zeitschriftenartikel für verschiedene Spezialgebieten durch und erstellen Sie Ihre Bibliographie auf korrekte Weise.

1

Walter, Rico, und Alexander Lawrinenko. „A characterization of optimal multiprocessor schedules and new dominance rules“. Journal of Combinatorial Optimization 40, Nr. 4 (12.08.2020): 876–900. http://dx.doi.org/10.1007/s10878-020-00634-9.

Der volle Inhalt der Quelle

Annotation:

Abstract The paper on hand approaches the classical makespan minimization problem on identical parallel machines from a rather theoretical point of view. Using an approach similar to the idea behind inverse optimization, we identify a general structural pattern of optimal multiprocessor schedules. We also show how to derive new dominance rules from the characteristics of optimal solutions. Results of our computational study attest to the efficacy of the new rules. They are particularly useful in limiting the search space when each machine processes only a few jobs on average.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

2

Wang, Wencheng, und Xiaofei Liu. „A Combinatorial 2-Approximation Algorithm for the Parallel-Machine Scheduling with Release Times and Submodular Penalties“. Mathematics 10, Nr. 1 (25.12.2021): 61. http://dx.doi.org/10.3390/math10010061.

Der volle Inhalt der Quelle

Annotation:

In this paper, we consider parallel-machine scheduling with release times and submodular penalties (P|rj,reject|Cmax+π(R)), in which each job can be accepted and processed on one of m identical parallel machines or rejected, but a penalty must paid if a job is rejected. Each job has a release time and a processing time, and the job can not be processed before its release time. The objective of P|rj,reject|Cmax+π(R) is to minimize the makespan of the accepted jobs plus the penalty of the rejected jobs, where the penalty is determined by a submodular function. This problem generalizes a multiprocessor scheduling problem with rejection, the parallel-machine scheduling with submodular penalties, and the single machine scheduling problem with release dates and submodular rejection penalties. In this paper, inspired by the primal-dual method, we present a combinatorial 2-approximation algorithm to P|rj,reject|Cmax+π(R). This ratio coincides with the best known ratio for the parallel-machine scheduling with submodular penalties and the single machine scheduling problem with release dates and submodular rejection penalties.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

3

Staunstrup, Jørgen, Jens Ove Jespersen und Ole V. Johansen. „Physical datarepresentation in a multiprocessor database machine“. Parallel Computing 2, Nr. 4 (Dezember 1985): 335–43. http://dx.doi.org/10.1016/0167-8191(85)90032-8.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

4

Agrawal, Rakesh, und David J. DeWitt. „Recovery architectures for multiprocessor database machines“. ACM SIGMOD Record 14, Nr. 4 (Mai 1985): 131–45. http://dx.doi.org/10.1145/971699.318912.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

5

Kuruvilla, Abey, und Giuseppe Paletta. „Minimizing Makespan on Identical Parallel Machines“. International Journal of Operations Research and Information Systems 6, Nr. 1 (Januar 2015): 19–29. http://dx.doi.org/10.4018/ijoris.2015010102.

Der volle Inhalt der Quelle

Annotation:

A heuristic algorithm that uses iteratively LPT and MF approaches on different job and machine sets constructed by using the current solution is developed to solve a classical multiprocessor scheduling problem with the objective of minimizing the makespan. Computational results indicate that the proposed algorithm is very competitive with respect to well-known constructive algorithms for a large number of benchmark instances.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

6

Pan, Feng Shan, Chun Ming Ye und Xiao Hua Sheng. „Hybrid Particle Swarm Algorithm for Solving Multiprocessor Problem“. Applied Mechanics and Materials 66-68 (Juli 2011): 966–72. http://dx.doi.org/10.4028/www.scientific.net/amm.66-68.966.

Der volle Inhalt der Quelle

Annotation:

Multiprocessor problem signifies that there are at least one process produced at more than two machines, which increases the difficulty and complexity of the problem. Hybrid particle swarm algorithm is adopted to solve the problem of multiprocessor in this paper.Through the redesigning parameters and programming, the final result is compared with that of genetic algorithm in conferences. The simulation results indicate that Hybrid particle swarm algorithm for solving multiple processors problem is better that of using genetic algorithms.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

7

Veselovska, Nataliia. „DEVELOPMENT OF ALGORITHMIC SUPPORT FOR PRACTICAL IMPLEMENTATION OF TESTING AND DIAGNOSTIC COMPLEX OF CNC MACHINES“. Vibrations in engineering and technology, Nr. 1(104) (29.04.2022): 71–80. http://dx.doi.org/10.37128/2306-8744-2022-1-9.

Der volle Inhalt der Quelle

Annotation:

CNC machines, including multi-purpose machines (product processing centers), have been widely used in connection with the creation of flexible production systems and significant progress in developing and improving the reliability of multi-purpose freely programmable, multiprocessor and small numerical program control devices (CNC) , so the development of algorithmic software for the practical implementation of the test and diagnostic complex and the use of diagnostic systems as a means of automation of information technology is one of the general directions of improving the efficiency of machine-building enterprises. However, in order to make decisions about the scope, stages and feasibility of using a particular diagnostic system for the selected object of study at a particular enterprise, it is necessary to assess its expected benefits. The use of diagnostics during operation of the machine imposes its influence on the means and methods of diagnosis, which should be convenient for use in the factory, to ensure the diagnosis process in the shortest time, to have reliable readings, especially with high requirements for product reliability. and in some cases without disrupting the mechanism, to be economically feasible. The design of the machine is adapted to the needs of diagnostics and must: have built-in devices that evaluate its parameters (pressure in the hydraulic system, temperature of energy-intensive units, accuracy of machining, speed); periodically connect to special equipment that will diagnose the basic parameters of the machine and provide data on its condition. The parameters of the technical condition (diagnostic features), which can be judged on the OD and which are diagnosed during operation of the machine, are: machine parameters that directly characterize its efficiency; damage and defects that occur during operation and lead or may lead to failure; side effects that are functionally or stochastically related to the initial parameters.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

8

Rappleye, Jason, Martins Innus, Charles M. Weeks und Russ Miller. „SnBversion 2.2: an example of crystallographic multiprocessing“. Journal of Applied Crystallography 35, Nr. 3 (16.05.2002): 374–76. http://dx.doi.org/10.1107/s0021889802005782.

Der volle Inhalt der Quelle

Annotation:

The computer programSnBimplements a direct-methods algorithm, known asShake-and-Bake, which optimizes trial structures consisting of randomly positioned atoms. Although largeShake-and-Bakeapplications require significant amounts of computing time, the algorithm can be easily implemented in parallel in order to decrease the real time required to achieve a solution. By using a master–worker model,SnBversion 2.2 is amenable to all of the prevalent modern parallel-computing platforms, including (i) shared-memory multiprocessor machines, such as the SGI Origin2000, (ii) distributed-memory multiprocessor machines, such as the IBM SP, and (iii) collections of workstations, including Beowulf clusters. A linear speedup in the processing of a fixed number of trial structures can be obtained on each of these platforms.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

9

Miya, E. N. „Multiprocessor/distributed processing bibliography (in machine-readable form)“. ACM SIGARCH Computer Architecture News 13, Nr. 1 (März 1985): 27–29. http://dx.doi.org/10.1145/1296930.1296933.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

10

Sarkar, Susmit, Peter Sewell, Francesco Zappa Nardelli, Scott Owens, Tom Ridge, Thomas Braibant, Magnus O. Myreen und Jade Alglave. „The semantics of x86-CC multiprocessor machine code“. ACM SIGPLAN Notices 44, Nr. 1 (21.01.2009): 379–91. http://dx.doi.org/10.1145/1594834.1480929.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

11

KELLERER, HANS. „Algorithms for multiprocessor scheduling with machine release times“. IIE Transactions 30, Nr. 11 (November 1998): 991–99. http://dx.doi.org/10.1080/07408179808966555.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

12

Shachnai und Tamir. „Multiprocessor Scheduling with Machine Allotment and Parallelism Constraints“. Algorithmica 32, Nr. 4 (April 2002): 651–78. http://dx.doi.org/10.1007/s00453-001-0098-3.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

13

Bogdanov, D. R., und O. V. Darintsev. „Multiprocessor systems based on FPGA for receiving and processing data from the position sensors of the manipulator elements with controlled bending“. Proceedings of the Mavlyutov Institute of Mechanics 11, Nr. 1 (2016): 100–106. http://dx.doi.org/10.21662/uim2016.1.015.

Der volle Inhalt der Quelle

Annotation:

Key moments of technique of reception and processing of information from the MEMS position sensors in the information system of the manipulator built on the basis units with controlled bend is discussed in detail. The differences in the procedure for construction of multiprocessor information systems based on the new programmable logic integrated circuits large capacity which provide the use of soft-core processors is presented too. The results of qualitative comparison of the solutions obtained by use state machine circuits and schemes based on soft-processors is shown. As an example, consider the structure developed multiprocessor information system and variants of its hardware and structural implementation.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

14

Diab, Hassan B., und Hassan S. Tabbara. „Simulation of a class of multiprocessor machines“. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 5, Nr. 4 (November 1992): 275–88. http://dx.doi.org/10.1002/jnm.1660050408.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

15

Vairam, Senthil, und V. Selladurai. „Parallel Machine Shop Scheduling Using Memetic Algorithm“. Applied Mechanics and Materials 573 (Juni 2014): 362–67. http://dx.doi.org/10.4028/www.scientific.net/amm.573.362.

Der volle Inhalt der Quelle

Annotation:

Parallel machine shop scheduling problem can be stated as finding a schedule for a general task graph to execute on a customed flow so that the schedule length can be minimized. Parallel Flow Shop Scheduling with a case study has been . In this study we present an effective memetic algorithm to solve the problem. Also evaluating the performance of two algorithms (genetic algorithm and memetic algorithm) in terms of both the quality of the solutions produced and the efficiency. These results demonstrate that the memetic algorithm produces better and quality solutions and hence it is very efficient . KEY WORDS: Hybrid Flow Shop Scheduling, Multiprocessor, Memetic algorithm.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

16

KULKARNI, RAJENDRA, SHASHANK DATE, BHAVNA KULKARNI, URMILA KULKARNI und A. S. KOLASKAR. „PRAS: PARALLEL ALIGNMENT OF SEQUENCES ALGORITHM“. Parallel Processing Letters 03, Nr. 03 (September 1993): 243–52. http://dx.doi.org/10.1142/s0129626493000289.

Der volle Inhalt der Quelle

Annotation:

This paper presents an algorithm for multiple alignment of sequences of proteins and nucleic acids on loosely-coupled MIMD machines. An inherently parallel algorithm is devised and implemented on a transputer-based multiprocessor platform. The results indicate the possibility of scalable performance.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

17

Tsoukarellas, M. A., und T. S. Papatheodorou. „A run time support system for multiprocessor machines“. ACM SIGARCH Computer Architecture News 18, Nr. 3b (September 1990): 470–78. http://dx.doi.org/10.1145/255129.255190.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

18

Ali, Khayri A. M., Roland Karlsson und Shyam Mudambi. „Performance of Muse on switch-based multiprocessor machines“. New Generation Computing 11, Nr. 1 (März 1992): 81–103. http://dx.doi.org/10.1007/bf03037528.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

19

Abd El-Sattar Omara, Fatma. „An Efficient Tasks Scheduling Algorithm for Distributed Memory Machines With Communication Delays“. IIUM Engineering Journal 8, Nr. 2 (29.09.2010): 1–16. http://dx.doi.org/10.31436/iiumej.v8i2.88.

Der volle Inhalt der Quelle

Annotation:

The scheduling of multiple interacting tasks of a single parallel program is considered the most important issue to exploit the true performance of the multiprocessor system. The problem is to find a schedule that will minimize the execution time (Make_Span) of a program. On the other hand, task scheduling on a multiprocessor system with and without communication delays is known to be NP-complete problem. Consequently, many heuristic algorithms have been developed, each of which may find optimal scheduling under different circumstances. One of the well known iterative algorithms is the hill-climbing. This algorithm starts with a complete solution and searches to improve this solution by choosing a better neighbor based on a cost function. This will lead to a local optimum which is considered the main drawback of this algorithm. The research in this study concerns to develop an efficient iterative algorithm for scheduling problem based on the hill-climbing. Present algorithm satisfies a local optimum that is very close to the global one in a reasonable amount of time. In most experiments, it satisfies the actual global optimum.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

20

Vega Yon, George G., und Brian Quistorff. „parallel: A command for parallel computing“. Stata Journal: Promoting communications on statistics and Stata 19, Nr. 3 (September 2019): 667–84. http://dx.doi.org/10.1177/1536867x19874242.

Der volle Inhalt der Quelle

Annotation:

The parallel package allows parallel processing of tasks that are not interdependent. This allows all flavors of Stata to take advantage of multiprocessor machines. Even Stata/MP users can benefit because many community-contributed programs are not automatically parallelized but could be under our framework.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

21

Sagan, Jaroslaw. „Inter-thread communication efficiency“. Annales Universitatis Mariae Curie-Sklodowska, sectio AI – Informatica 15, Nr. 1 (01.01.2015): 12. http://dx.doi.org/10.17951/ai.2015.15.1.12-15.

Der volle Inhalt der Quelle

Annotation:

In this paper I compare inter-thread communication methods: blocking queue and LMAX Disruptor without synchronization according to a number of threads (CPU cores) and consumer rate. The research is carried out using a multiprocessor machine with Non Uniformed Memory and Oracle Java Runtime Environment. I determine if processing on many multi-core CPUs with NUMA is faster than on single multi-core CPU or vice versa.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

22

Qadah, G. Z., und K. B. Irani. „The join algorithms on a shared-memory multiprocessor database machine“. IEEE Transactions on Software Engineering 14, Nr. 11 (1988): 1668–83. http://dx.doi.org/10.1109/32.9054.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

23

Melikyan, V. SH, H. A. Petrosyan, S. H. Abovyan, L. H. Shakhbazyan, A. H. Stepanyan und E. O. Musayelyan. „Statistical analysis of time delays multiprocessor systems“. Electronics and Communications 15, Nr. 5 (29.03.2010): 108–12. http://dx.doi.org/10.20535/2312-1807.2010.58.5.285076.

Der volle Inhalt der Quelle

Annotation:

In this paper a method of statistical static timing analysis (SSTA) for multicore processors is proposed. An effective method of timing analysis based on simultaneous application of usual static as well as statistical static timing analysis. At the first stage usual static timing analysis (STA) is applied and at the second stage - SSTA. The proposed method of analysis allows reaching of acceptable analysis results from the practical viewpoint of accuracy at considerably small expenses of machine runtime

APA, Harvard, Vancouver, ISO und andere Zitierweisen

24

Ghandeharizadeh, S., und D. J. DeWitt. „MAGIC: a multiattribute declustering mechanism for multiprocessor database machines“. IEEE Transactions on Parallel and Distributed Systems 5, Nr. 5 (Mai 1994): 509–24. http://dx.doi.org/10.1109/71.282561.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

25

Wang, Tao, Jiwei Xu, Wenbo Zhang, Jianhua Zhang, Jun Wei und Hua Zhong. „ReSeer: Efficient search-based replay for multiprocessor virtual machines“. Journal of Systems and Software 126 (April 2017): 101–12. http://dx.doi.org/10.1016/j.jss.2016.07.032.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

26

Alglave, Jade, Anthony Fox, Samin Ishtiaq, Magnus O. Myreen, Susmit Sarkar, Peter Sewell und Francesco Zappa Nardelli. „The semantics of power and ARM multiprocessor machine code (abstract only)“. ACM SIGPLAN Notices 44, Nr. 5 (06.05.2009): 8. http://dx.doi.org/10.1145/1629635.1629638.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

27

Rashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky und Jonathan Chew. „Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures“. ACM SIGARCH Computer Architecture News 15, Nr. 5 (November 1987): 31–39. http://dx.doi.org/10.1145/36177.36181.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

28

Rashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky und Jonathan Chew. „Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures“. ACM SIGOPS Operating Systems Review 21, Nr. 4 (Oktober 1987): 31–39. http://dx.doi.org/10.1145/36204.36181.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

29

Rashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky und Jonathan Chew. „Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures“. ACM SIGPLAN Notices 22, Nr. 10 (Oktober 1987): 31–39. http://dx.doi.org/10.1145/36205.36181.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

30

Rashid, R., A. Tevanian, M. Young, D. Golub, R. Baron, D. Black, W. J. Bolosky und J. Chew. „Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures“. IEEE Transactions on Computers 37, Nr. 8 (1988): 896–908. http://dx.doi.org/10.1109/12.2242.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

31

Narayan, Ranjani, und V. Rajaraman. „Performance analysis of a multiprocessor machine based on data flow principles“. Microprocessing and Microprogramming 30, Nr. 1-5 (August 1990): 601–8. http://dx.doi.org/10.1016/0165-6074(90)90306-t.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

32

Aerts, Joep, Jan Korst und Wim Verhaegh. „Load balancing for redundant storage strategies: Multiprocessor scheduling with machine eligibility“. Journal of Scheduling 4, Nr. 5 (2001): 245–57. http://dx.doi.org/10.1002/jos.81.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

33

Boctor, Fayez F., Jacques Renaud, Angel Ruiz und Simon Tremblay. „Optimal and heuristic solution methods for a multiprocessor machine scheduling problem“. Computers & Operations Research 36, Nr. 10 (Oktober 2009): 2822–28. http://dx.doi.org/10.1016/j.cor.2008.12.017.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

34

CHONG, FREDERIC T., und ANANT AGARWAL. „SHARED MEMORY VERSUS MESSAGE PASSING FOR ITERATIVE SOLUTION OF SPARSE, IRREGULAR PROBLEMS“. Parallel Processing Letters 09, Nr. 01 (März 1999): 159–70. http://dx.doi.org/10.1142/s0129626499000177.

Der volle Inhalt der Quelle

Annotation:

The benefits of hardware support for shared memory versus those for message passing are difficult to evaluate without an in-depth study of real applications on a common platform. We evaluate the communication mechanisms of the MIT Alewife machine, a multiprocessor which provides integrated cache-coherent shared memory, massage passing, and DMA. We perform this evaluation with "best-effort" implementations which solve several sparse, irregular benchmark problems with a preconditioned conjugate gradient sparse matrix solver (ICCG). We find that machines with fast global memory operations do not need message passing or bulk transfer to suport our irregular problems. This is primarily due to three reasons. First, a 5-to-1 ratio between global and local cache misses makes memory copies in bulk communication expensive relati to communication via shared memory. Second, although message passing has synchronization semantics superior to shared memory for data-driven computation, efficient shared memory can overcome this handicap by using global read-modify-writes to change from the traditional owner-computers model to a producer-computes model. Third, bulk transfers can result in high processor idle times in irregular applications.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

35

Samardzic, Aleksandar, Dusan Starcevic und Milan Tuba. „An implementation of ray tracing algorithm for the multiprocessor machines“. Yugoslav Journal of Operations Research 16, Nr. 1 (2006): 125–35. http://dx.doi.org/10.2298/yjor0601125s.

Der volle Inhalt der Quelle

Annotation:

Ray Tracing is an algorithm for generating photo-realistic pictures of the 3D scenes, given scene description, lighting condition and viewing parameters as inputs. The algorithm is inherently convenient for parallelization and the simplest parallelization scheme is for the shared-memory parallel machines (multiprocessors). This paper presents two implementations of the algorithm developed by the authors for alike machines, one using the POSIX threads API and another one using the OpenMP API. The paper also presents results of rendering some test scenes using these implementations and discusses our parallel algorithm version efficiency.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

36

Georgi, V. S. „Interval Periodic Algorithm (IPA) for Schedule Optimization in Multiprocessor Machines“. Herald of Dagestan State University 38, Nr. 2 (28.06.2023): 69–73. http://dx.doi.org/10.21779/2542-0321-2023-38-2-69-73.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

37

RAUBER, THOMAS, und GUDULA RÜNGER. „A DATA RE-DISTRIBUTION LIBRARY FOR MULTI-PROCESSOR TASK PROGRAMMING“. International Journal of Foundations of Computer Science 17, Nr. 02 (April 2006): 251–70. http://dx.doi.org/10.1142/s0129054106003814.

Der volle Inhalt der Quelle

Annotation:

Multiprocessor task (M-task) programming is a suitable parallel programming model for coding application problems with an inherent modular structure. An M-task can be executed on a group of processors of arbitrary size, concurrently to other M-tasks of the same application program. The data of a multiprocessor task program usually include composed data structures, like vectors or arrays. For distributed memory machines or cluster platforms, those composed data structures are distributed within one or more processor groups. Thus, a concise parallel programming model for M-tasks requires a standardized distributed data format for composed data structures. Additionally, functions for data re-distribution with respect to different data distributions and different processor group layouts are needed to glue program parts together. In this paper, we present a data re-distribution library which extends the M-task programming with Tlib, a library providing operations to split processor groups and to map M-tasks to processor groups.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

38

Baba, Yao und Hevner. „Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis“. IEEE Transactions on Computers C-36, Nr. 6 (Juni 1987): 650–66. http://dx.doi.org/10.1109/tc.1987.1676959.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

39

Müller, M., W. Fengler, A. Amthor und C. Ament. „Model-driven development and multiprocessor implementation of a dynamic control algorithm for nanopositioning and nanomeasuring machines“. Proceedings of the Institution of Mechanical Engineers, Part I: Journal of Systems and Control Engineering 223, Nr. 3 (21.01.2009): 417–29. http://dx.doi.org/10.1243/09596518jsce673.

Der volle Inhalt der Quelle

Annotation:

This article presents a computationally intensive adaptive trajectory tracking control algorithm for dynamic control of nanopositioning and nanomeasuring machines. To realize the required high sample rate of the control algorithm, an embedded multiprocessor architecture has been chosen as development target. The model-oriented development approach studied here aims to narrow the gap between the control system design environment MATLAB/Simulink® and the actual distributed implementation on the custom platform by introducing a custom code generation target intending the utilization of automatic code generation facilities.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

40

Satpathy, Prativa, Kalyan Das und Jagamohan Padhi. „Improved Rejection Penalty Algorithm with Multiprocessor Rejection Technique“. International Journal of Electrical and Computer Engineering (IJECE) 5, Nr. 3 (01.06.2015): 477. http://dx.doi.org/10.11591/ijece.v5i3.pp477-482.

Der volle Inhalt der Quelle

Annotation:

<p>This paper deals with multiprocessor scheduling with rejection technique where each job is provided with processing time and a given penalty cost. If the job satisfies the acceptance condition, it will schedule in the least loaded identical parallel machine else job is rejected. In this way its penalty cost is calculated. Our objective is to minimize the makespan of the scheduled job and to minimize the sum of the penalties of rejected jobs. We have merged ‘CHOOSE ‘and ‘REJECTION PENALTY’ algorithm to reduce the sum of penalties cost and makespan. Our proposed ‘Improved Reject penalty algorithm’ reduce competitive ratio, which in turn enhances the efficiency of the on-line algorithm. By applying our new on-line technique, we got the lower bound of our algorithm is is 1.286 which is far better from the existing algorithms whose competitive ratio is at 1.819. In our approach we have consider non-preemption scheduling technique.</p>

APA, Harvard, Vancouver, ISO und andere Zitierweisen

41

Huang, Rong Hwa, Tung Han Yu und Chang Lin Yang. „Multiprocessor Flow Shop Scheduling Problem with Common due Window“. Applied Mechanics and Materials 284-287 (Januar 2013): 3712–16. http://dx.doi.org/10.4028/www.scientific.net/amm.284-287.3712.

Der volle Inhalt der Quelle

Annotation:

The objective of scheduling is to maximize capacity utilization, minimize work-in-process inventory and ensure timely delivery. The due windows problem proposes that jobs should only be finished within the time interval that meets customer needs. This research applies integer programming (IP) and ant colony optimization (ACO) to solve due window problems in a flow shop with multiprocessors (FSMP). To improve the performance of jobs within due windows, this research splits them into different numbers of processing lots so they can be processed on more than one machine simultaneously. This shortens the total weighted earliness and tardiness of the jobs. The ACO is applied as a heuristic tool for solving the scheduling problems, and the solution results show that ACO has good validity, robustness and effectiveness.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

42

Vakhania, Nodari. „Dynamic Restructuring Framework for Scheduling with Release Times and Due-Dates“. Mathematics 7, Nr. 11 (14.11.2019): 1104. http://dx.doi.org/10.3390/math7111104.

Der volle Inhalt der Quelle

Annotation:

Scheduling jobs with release and due dates on a single machine is a classical strongly NP-hard combination optimization problem. It has not only immediate real-life applications but also it is effectively used for the solution of more complex multiprocessor and shop scheduling problems. Here, we propose a general method that can be applied to the scheduling problems with job release times and due-dates. Based on this method, we carry out a detailed study of the single-machine scheduling problem, disclosing its useful structural properties. These properties give us more insight into the complex nature of the problem and its bottleneck feature that makes it intractable. This method also helps us to expose explicit conditions when the problem can be solved in polynomial time. In particular, we establish the complexity status of the special case of the problem in which job processing times are mutually divisible by constructing a polynomial-time algorithm that solves this setting. Apparently, this setting is a maximal polynomially solvable special case of the single-machine scheduling problem with non-arbitrary job processing times.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

43

BISCHOF, HOLGER, SERGEI GORLATCH, ROMAN LESHCHINSKIY und JENS MÜLLER. „DATA PARALLELISM IN C++ TEMPLATE PROGRAMS: A BARNES-HUT CASE STUDY“. Parallel Processing Letters 15, Nr. 03 (September 2005): 257–72. http://dx.doi.org/10.1142/s0129626405002209.

Der volle Inhalt der Quelle

Annotation:

We describe how C++ programs that use the Standard Template Library (STL) can be systematically parallelized for shared-memory machines. We present our data-parallel template library (DatTeL) and its use in introducing parallelism into sequential STL programs. As a case study, we demonstrate how an STL implementation of the Barnes-Hut algorithm for solving many-body problems can be systematically transformed into a parallel, efficient version using DatTeL. We present experimental results for the multi-threaded version of the resulting parallel program on a SunFire multiprocessor.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

44

H, Nirmala, und Girijamma H. A. „A Novel Scheduler for Task scheduling in Multiprocessor System using Machine Learning approach“. International Journal of Computer Sciences and Engineering 7, Nr. 2 (28.02.2019): 140–43. http://dx.doi.org/10.26438/ijcse/v7i2.140143.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

45

AZAGURY, ALAIN, ELLIOT K. KOLODNER und EREZ PETRANK. „A NOTE ON THE IMPLEMENTATION OF REPLICATION-BASED GARBAGE COLLECTION FOR MULTITHREADED APPLICATIONS AND MULTIPROCESSOR ENVIRONMENTS“. Parallel Processing Letters 09, Nr. 03 (September 1999): 391–99. http://dx.doi.org/10.1142/s0129626499000360.

Der volle Inhalt der Quelle

Annotation:

Replication-based incremental garbage collection is one of the more appealing concurrent garbage collection algorithms known today. It allows continuous operation of the application (the mutator) with very short pauses for garbage collection. There is a growing need for such garbage collectors suitable for a multithreaded environments such as the Java Virtual Machine. Furthermore, it is desirable to construct collectors that also work on multiprocessor computers. We begin by pointing out an important, yet subtle point, which arises when implementing the replication-based garbage collector for a multithreaded environment. We first show that a simple and natural implementation of the algorithm may lead to an incorrect behavior of multithreaded applications. We then show that another simple and natural implementation eliminates the problem completely. Thus, the contribution of this part is in stressing this warning to future implementors. Next, we address the effects of the memory coherence model on this algorithm. We show that even when the algorithm is properly implemented with respect to our first observation, a problem might still arise when a multiprocessor system is used. Adopting a naive solution to this problem results in very frequent (and expensive) synchronization. We offer a slight modification to the algorithm which eliminates the problem and requires little synchronization.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

46

Bourbakis, N. G., F. Barlos und J. S. Mertoguno. „Hermes Autonomous Vision System“. International Journal of Pattern Recognition and Artificial Intelligence 12, Nr. 03 (Mai 1998): 265–91. http://dx.doi.org/10.1142/s0218001498000191.

Der volle Inhalt der Quelle

Annotation:

This paper deals with the modeling of an extended quartet multiprocessor kernel used for the evaluation of the Hermes system. Hermes is a multiprocessor hybrid system architecture used as a machine vision system. The functionality of Hermes requires an asynchronous information flow upwards and downwards, where "orders"(in a form of code and data) go down and "abstracted" or processed picture information goes up along the system's hierarchy. Moreover, the overall functional behavior of the Hermes system can be considered as an extended quartet kernel in an abstracted manner. The extended quartet kernel studied here presents either a memory-to-memory (M-M) or a bus-to-bus (B-B) connectivity. The evaluation of these two kernel's configurations (M-M, B-B) defines that the structural design of the Hermes system will be based on the M-M scheme. When failures occur on the quartet kernel, however, the M-M scheme will be converted into a B-B one by using a failure recovery procedure. The evaluation of the quartet kernel configurations is based on a probabilistic model. Failures and recovery procedures on the quartet kernel are discussed and the performance evaluation of the kernel (under failures) is also provided.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

47

Shahrivari, Saeed, und Saeed Jalili. „Fast Parallel All-Subgraph Enumeration Using Multicore Machines“. Scientific Programming 2015 (2015): 1–11. http://dx.doi.org/10.1155/2015/901321.

Der volle Inhalt der Quelle

Annotation:

Enumerating all subgraphs of an input graph is an important task for analyzing complex networks. Valuable information can be extracted about the characteristics of the input graph using all-subgraph enumeration. Notwithstanding, the number of subgraphs grows exponentially with growth of the input graph or by increasing the size of the subgraphs to be enumerated. Hence, all-subgraph enumeration is very time consuming when the size of the subgraphs or the input graph is big. We propose a parallel solution namedSubenumwhich in contrast to available solutions can perform much faster. Subenum enumerates subgraphs using edges instead of vertices, and this approach leads to a parallel and load-balanced enumeration algorithm that can have efficient execution on current multicore and multiprocessor machines. Also, Subenum uses a fast heuristic which can effectively accelerate non-isomorphism subgraph enumeration. Subenum can efficiently use external memory, and unlike other subgraph enumeration methods, it is not associated with the main memory limits of the used machine. Hence, Subenum can handle large input graphs and subgraph sizes that other solutions cannot handle. Several experiments are done using real-world input graphs. Compared to the available solutions, Subenum can enumerate subgraphs several orders of magnitude faster and the experimental results show that the performance of Subenum scales almost linearly by using additional processor cores.

APA, Harvard, Vancouver, ISO und andere Zitierweisen

48

Collet, Jacques Henri, Daniel Litaize, Jan Van Campenhout, Chris Jesshope, Marc Desmulliez, Hugo Thienpont, James Goodman und Ahmed Louri. „Architectural approach to the role of optics in monoprocessor and multiprocessor machines“. Applied Optics 39, Nr. 5 (10.02.2000): 671. http://dx.doi.org/10.1364/ao.39.000671.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

49

Sevastianov, S. V. „Geometrical heuristics for multiprocessor flowshop scheduling with uniform machines at each stage“. Journal of Scheduling 5, Nr. 3 (2002): 205–25. http://dx.doi.org/10.1002/jos.98.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

50

Abdulqader, Dildar Masood, Subhi R. M. Zeebaree, Rizgar R. Zebari, Sagvan Ali Saleh, Zryan Najat Rashid und Mohammed A. M. Sadeeq. „Single-threading Based Distributed-multiprocessor-machines Affecting by Distributed-parallel-computing Technology“. Journal of Duhok University 26, Nr. 2 (21.12.2023): 416–26. http://dx.doi.org/10.26682/csjuod.2023.26.2.39.

Der volle Inhalt der Quelle

APA, Harvard, Vancouver, ISO und andere Zitierweisen

Wir bieten Rabatte auf alle Premium-Pläne für Autoren, deren Werke in thematische Literatursammlungen aufgenommen wurden. Kontaktieren Sie uns, um einen einzigartigen Promo-Code zu erhalten!