Auswahl der wissenschaftlichen Literatur zum Thema „GPU-CPU“
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Zeitschriftenartikel zum Thema "GPU-CPU"
Zhu, Ziyu, Xiaochun Tang und Quan Zhao. „A unified schedule policy of distributed machine learning framework for CPU-GPU cluster“. Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 39, Nr. 3 (Juni 2021): 529–38. http://dx.doi.org/10.1051/jnwpu/20213930529.
Der volle Inhalt der QuelleCui, Pengjie, Haotian Liu, Bo Tang und Ye Yuan. „CGgraph: An Ultra-Fast Graph Processing System on Modern Commodity CPU-GPU Co-processor“. Proceedings of the VLDB Endowment 17, Nr. 6 (Februar 2024): 1405–17. http://dx.doi.org/10.14778/3648160.3648179.
Der volle Inhalt der QuelleLee, Taekhee, und Young J. Kim. „Massively parallel motion planning algorithms under uncertainty using POMDP“. International Journal of Robotics Research 35, Nr. 8 (21.08.2015): 928–42. http://dx.doi.org/10.1177/0278364915594856.
Der volle Inhalt der QuelleYogatama, Bobbi W., Weiwei Gong und Xiangyao Yu. „Orchestrating data placement and query execution in heterogeneous CPU-GPU DBMS“. Proceedings of the VLDB Endowment 15, Nr. 11 (Juli 2022): 2491–503. http://dx.doi.org/10.14778/3551793.3551809.
Der volle Inhalt der QuellePower, Jason, Joel Hestness, Marc S. Orr, Mark D. Hill und David A. Wood. „gem5-gpu: A Heterogeneous CPU-GPU Simulator“. IEEE Computer Architecture Letters 14, Nr. 1 (01.01.2015): 34–36. http://dx.doi.org/10.1109/lca.2014.2299539.
Der volle Inhalt der QuelleRaju, K., und Niranjan N Chiplunkar. „PERFORMANCE ENHANCEMENT OF CUDA APPLICATIONS BY OVERLAPPING DATA TRANSFER AND KERNEL EXECUTION“. Applied Computer Science 17, Nr. 3 (30.09.2021): 5–18. http://dx.doi.org/10.35784/acs-2021-17.
Der volle Inhalt der QuelleLiu, Gaogao, Wenbo Yang, Peng Li, Guodong Qin, Jingjing Cai, Youming Wang, Shuai Wang, Ning Yue und Dongjie Huang. „MIMO Radar Parallel Simulation System Based on CPU/GPU Architecture“. Sensors 22, Nr. 1 (05.01.2022): 396. http://dx.doi.org/10.3390/s22010396.
Der volle Inhalt der QuelleZou, Yong Ning, Jue Wang und Jian Wei Li. „Cutting Display of Industrial CT Volume Data Based on GPU“. Advanced Materials Research 271-273 (Juli 2011): 1096–102. http://dx.doi.org/10.4028/www.scientific.net/amr.271-273.1096.
Der volle Inhalt der QuelleJiang, Ronglin, Shugang Jiang, Yu Zhang, Ying Xu, Lei Xu und Dandan Zhang. „GPU-Accelerated Parallel FDTD on Distributed Heterogeneous Platform“. International Journal of Antennas and Propagation 2014 (2014): 1–8. http://dx.doi.org/10.1155/2014/321081.
Der volle Inhalt der QuelleSemenenko, Julija, Aliaksei Kolesau, Vadimas Starikovičius, Artūras Mackūnas und Dmitrij Šešok. „COMPARISON OF GPU AND CPU EFFICIENCY WHILE SOLVING HEAT CONDUCTION PROBLEMS“. Mokslas - Lietuvos ateitis 12 (24.11.2020): 1–5. http://dx.doi.org/10.3846/mla.2020.13500.
Der volle Inhalt der QuelleDissertationen zum Thema "GPU-CPU"
Fang, Zhuowen. „Java GPU vs CPU Hashing Performance“. Thesis, Mittuniversitetet, Avdelningen för informationssystem och -teknologi, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-33994.
Der volle Inhalt der QuelleDollinger, Jean-François. „A framework for efficient execution on GPU and CPU+GPU systems“. Thesis, Strasbourg, 2015. http://www.theses.fr/2015STRAD019/document.
Der volle Inhalt der QuelleTechnological limitations faced by the semi-conductor manufacturers in the early 2000's restricted the increase in performance of the sequential computation units. Nowadays, the trend is to increase the number of processor cores per socket and to progressively use the GPU cards for highly parallel computations. Complexity of the recent architectures makes it difficult to statically predict the performance of a program. We describe a reliable and accurate parallel loop nests execution time prediction method on GPUs based on three stages: static code generation, offline profiling, and online prediction. In addition, we present two techniques to fully exploit the computing resources at disposal on a system. The first technique consists in jointly using CPU and GPU for executing a code. In order to achieve higher performance, it is mandatory to consider load balance, in particular by predicting execution time. The runtime uses the profiling results and the scheduler computes the execution times and adjusts the load distributed to the processors. The second technique, puts CPU and GPU in a competition: instances of the considered code are simultaneously executed on CPU and GPU. The winner of the competition notifies its completion to the other instance, implying the termination of the latter
Gjermundsen, Aleksander. „CPU and GPU Co-processing for Sound“. Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for datateknikk og informasjonsvitenskap, 2010. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-11794.
Der volle Inhalt der QuelleCARLOS, EDUARDO TELLES. „HYBRID FRUSTUM CULLING USING CPU AND GPU“. PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2009. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=31453@1.
Der volle Inhalt der QuelleUm dos problemas mais antigos da computação gráfica tem sido a determinação de visibilidade. Vários algoritmos têm sido desenvolvidos para viabilizar modelos cada vez maiores e detalhados. Dentre estes algoritmos, destaca-se o frustum culling, cujo papel é remover objetos que não sejam visíveis ao observador. Esse algoritmo, muito comum em várias aplicações, vem sofrendo melhorias ao longo dos anos, a fim de acelerar ainda mais a sua execução. Apesar de ser tratado como um problema bem resolvido na computação gráfica, alguns pontos ainda podem ser aperfeiçoados, e novas formas de descarte desenvolvidas. No que se refere aos modelos massivos, necessita-se de algoritmos de alta performance, pois a quantidade de cálculos aumenta significativamente. Este trabalho objetiva avaliar o algoritmo de frustum culling e suas otimizações, com o propósito de obter o melhor algoritmo possível implementado em CPU, além de analisar a influência de cada uma de suas partes em modelos massivos. Com base nessa análise, novas técnicas de frustum culling serão desenvolvidas, utilizando o poder computacional da GPU (Graphics Processing Unit), e comparadas com o resultado obtido apenas pela CPU. Como resultado, será proposta uma forma de frustum culling híbrido, que tentará aproveitar o melhor da CPU e da GPU.
The definition of visibility is a classical problem in Computer Graphics. Several algorithms have been developed to enable the visualization of huge and complex models. Among these algorithms, the frustum culling, which plays an important role in this area, is used to remove invisible objects by the observer. Besides being very usual in applications, this algorithm has been improved in order to accelerate its execution. Although being treated as a well-solved problem in Computer Graphics, some points can be enhanced yet, and new forms of culling may be disclosed as well. In massive models, for example, algorithms of high performance are required, since the calculus arises considerably. This work analyses the frustum culling algorithm and its optimizations, aiming to obtain the state-of-the-art algorithm implemented in CPU, as well as explains the influence of each of its steps in massive models. Based on this analysis, new GPU (Graphics Processing Unit) based frustum culling techniques will be developed and compared with the ones using only CPU. As a result, a hybrid frustum culling will be proposed, in order to achieve the best of CPU and GPU processing.
Farooqui, Naila. „Runtime specialization for heterogeneous CPU-GPU platforms“. Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/54915.
Der volle Inhalt der QuelleSmith, Michael Shawn. „Performance Analysis of Hybrid CPU/GPU Environments“. PDXScholar, 2010. https://pdxscholar.library.pdx.edu/open_access_etds/300.
Der volle Inhalt der QuelleWong, Henry Ting-Hei. „Architectures and limits of GPU-CPU heterogeneous systems“. Thesis, University of British Columbia, 2008. http://hdl.handle.net/2429/2529.
Der volle Inhalt der QuelleGummadi, Deepthi. „Improving GPU performance by regrouping CPU-memory data“. Thesis, Wichita State University, 2014. http://hdl.handle.net/10057/10959.
Der volle Inhalt der QuelleThesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical Engineering and Computer Science
Chen, Wei. „Dynamic Workload Division in GPU-CPU Heterogeneous Systems“. The Ohio State University, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=osu1364250106.
Der volle Inhalt der QuelleBen, Romdhanne Bilel. „Simulation des réseaux à grande échelle sur les architectures de calculs hétérogènes“. Thesis, Paris, ENST, 2013. http://www.theses.fr/2013ENST0088/document.
Der volle Inhalt der QuelleThe simulation is a primary step on the evaluation process of modern networked systems. The scalability and efficiency of such a tool in view of increasing complexity of the emerging networks is a key to derive valuable results. The discrete event simulation is recognized as the most scalable model that copes with both parallel and distributed architecture. Nevertheless, the recent hardware provides new heterogeneous computing resources that can be exploited in parallel.The main scope of this thesis is to provide a new mechanisms and optimizations that enable efficient and scalable parallel simulation using heterogeneous computing node architecture including multicore CPU and GPU. To address the efficiency, we propose to describe the events that only differs in their data as a single entry to reduce the event management cost. At the run time, the proposed hybrid scheduler will dispatch and inject the events on the most appropriate computing target based on the event descriptor and the current load obtained through a feedback mechanisms such that the hardware usage rate is maximized. Results have shown a significant gain of 100 times compared to traditional CPU based approaches. In order to increase the scalability of the system, we propose a new simulation model, denoted as general purpose coordinator-master-worker, to address jointly the challenge of distributed and parallel simulation at different levels. The performance of a distributed simulation that relies on the GP-CMW architecture tends toward the maximal theoretical efficiency in a homogeneous deployment. The scalability of such a simulation model is validated on the largest European GPU-based supercomputer
Bücher zum Thema "GPU-CPU"
Piccoli, María Fabiana. Computación de alto desempeño en GPU. Editorial de la Universidad Nacional de La Plata (EDULP), 2011. http://dx.doi.org/10.35537/10915/18404.
Der volle Inhalt der QuelleBuchteile zum Thema "GPU-CPU"
Ou, Zhixin, Juan Chen, Yuyang Sun, Tao Xu, Guodong Jiang, Zhengyuan Tan und Xinxin Qi. „AOA: Adaptive Overclocking Algorithm on CPU-GPU Heterogeneous Platforms“. In Algorithms and Architectures for Parallel Processing, 253–72. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-22677-9_14.
Der volle Inhalt der QuelleStuart, Jeff A., Michael Cox und John D. Owens. „GPU-to-CPU Callbacks“. In Euro-Par 2010 Parallel Processing Workshops, 365–72. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-21878-1_45.
Der volle Inhalt der QuelleWille, Mario, Tobias Weinzierl, Gonzalo Brito Gadeschi und Michael Bader. „Efficient GPU Offloading with OpenMP for a Hyperbolic Finite Volume Solver on Dynamically Adaptive Meshes“. In Lecture Notes in Computer Science, 65–85. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-32041-5_4.
Der volle Inhalt der QuelleReinders, James, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook und Xinmin Tian. „Programming for GPUs“. In Data Parallel C++, 353–85. Berkeley, CA: Apress, 2020. http://dx.doi.org/10.1007/978-1-4842-5574-2_15.
Der volle Inhalt der QuelleShi, Lin, Hao Chen und Ting Li. „Hybrid CPU/GPU Checkpoint for GPU-Based Heterogeneous Systems“. In Communications in Computer and Information Science, 470–81. Berlin, Heidelberg: Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-642-53962-6_42.
Der volle Inhalt der QuelleLi, Jie, George Michelogiannakis, Brandon Cook, Dulanya Cooray und Yong Chen. „Analyzing Resource Utilization in an HPC System: A Case Study of NERSC’s Perlmutter“. In Lecture Notes in Computer Science, 297–316. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-32041-5_16.
Der volle Inhalt der QuelleLi, Jianqing, Hongli Li, Jing Li, Jianmin Chen, Kai Liu, Zheng Chen und Li Liu. „Distributed Heterogeneous Parallel Computing Framework Based on Component Flow“. In Proceeding of 2021 International Conference on Wireless Communications, Networking and Applications, 437–45. Singapore: Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-2456-9_45.
Der volle Inhalt der QuelleKrol, Dawid, Jason Harris und Dawid Zydek. „Hybrid GPU/CPU Approach to Multiphysics Simulation“. In Progress in Systems Engineering, 893–99. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-08422-0_130.
Der volle Inhalt der QuelleSao, Piyush, Richard Vuduc und Xiaoye Sherry Li. „A Distributed CPU-GPU Sparse Direct Solver“. In Lecture Notes in Computer Science, 487–98. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-09873-9_41.
Der volle Inhalt der QuelleChen, Lin, Deshi Ye und Guochuan Zhang. „Online Scheduling on a CPU-GPU Cluster“. In Lecture Notes in Computer Science, 1–9. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38236-9_1.
Der volle Inhalt der QuelleKonferenzberichte zum Thema "GPU-CPU"
Elis, Bengisu, Olga Pearce, David Boehme, Jason Burmark und Martin Schulz. „Non-Blocking GPU-CPU Notifications to Enable More GPU-CPU Parallelism“. In HPCAsia 2024: International Conference on High Performance Computing in Asia-Pacific Region. New York, NY, USA: ACM, 2024. http://dx.doi.org/10.1145/3635035.3635036.
Der volle Inhalt der QuelleYang, Yi, Ping Xiang, Mike Mantor und Huiyang Zhou. „CPU-assisted GPGPU on fused CPU-GPU architectures“. In 2012 IEEE 18th International Symposium on High Performance Computer Architecture (HPCA). IEEE, 2012. http://dx.doi.org/10.1109/hpca.2012.6168948.
Der volle Inhalt der QuelleRai, Siddharth, und Mainak Chaudhuri. „Improving CPU Performance Through Dynamic GPU Access Throttling in CPU-GPU Heterogeneous Processors“. In 2017 IEEE International Parallel and Distributed Processing Symposium: Workshops (IPDPSW). IEEE, 2017. http://dx.doi.org/10.1109/ipdpsw.2017.37.
Der volle Inhalt der QuelleChadwick, Jools, Francois Taiani und Jonathan Beecham. „From CPU to GP-GPU“. In the 10th International Workshop. New York, New York, USA: ACM Press, 2012. http://dx.doi.org/10.1145/2405136.2405142.
Der volle Inhalt der QuelleWang, Xin, und Wei Zhang. „A Sample-Based Dynamic CPU and GPU LLC Bypassing Method for Heterogeneous CPU-GPU Architectures“. In 2017 IEEE Trustcom/BigDataSE/ICESS. IEEE, 2017. http://dx.doi.org/10.1109/trustcom/bigdatase/icess.2017.309.
Der volle Inhalt der QuelleK., Raju, Niranjan N. Chiplunkar und Kavoor Rajanikanth. „A CPU-GPU Cooperative Sorting Approach“. In 2019 Innovations in Power and Advanced Computing Technologies (i-PACT). IEEE, 2019. http://dx.doi.org/10.1109/i-pact44901.2019.8960106.
Der volle Inhalt der QuelleXu, Yan, Gary Tan, Xiaosong Li und Xiao Song. „Mesoscopic traffic simulation on CPU/GPU“. In the 2nd ACM SIGSIM/PADS conference. New York, New York, USA: ACM Press, 2014. http://dx.doi.org/10.1145/2601381.2601396.
Der volle Inhalt der QuelleKerr, Andrew, Gregory Diamos und Sudhakar Yalamanchili. „Modeling GPU-CPU workloads and systems“. In the 3rd Workshop. New York, New York, USA: ACM Press, 2010. http://dx.doi.org/10.1145/1735688.1735696.
Der volle Inhalt der QuelleKang, SeungGu, Hong Jun Choi, Cheol Hong Kim, Sung Woo Chung, DongSeop Kwon und Joong Chae Na. „Exploration of CPU/GPU co-execution“. In the 2011 ACM Symposium. New York, New York, USA: ACM Press, 2011. http://dx.doi.org/10.1145/2103380.2103388.
Der volle Inhalt der QuelleAciu, Razvan-Mihai, und Horia Ciocarlie. „Algorithm for Cooperative CPU-GPU Computing“. In 2013 15th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC). IEEE, 2013. http://dx.doi.org/10.1109/synasc.2013.53.
Der volle Inhalt der QuelleBerichte der Organisationen zum Thema "GPU-CPU"
Samfass, Philipp. Porting AMG2013 to Heterogeneous CPU+GPU Nodes. Office of Scientific and Technical Information (OSTI), Januar 2017. http://dx.doi.org/10.2172/1343001.
Der volle Inhalt der QuelleSmith, Michael. Performance Analysis of Hybrid CPU/GPU Environments. Portland State University Library, Januar 2000. http://dx.doi.org/10.15760/etd.300.
Der volle Inhalt der QuelleRudin, Sven. VASP calculations on Chicoma: CPU vs. GPU. Office of Scientific and Technical Information (OSTI), März 2023. http://dx.doi.org/10.2172/1962769.
Der volle Inhalt der QuelleOwens, John. A Programming Framework for Scientific Applications on CPU-GPU Systems. Office of Scientific and Technical Information (OSTI), März 2013. http://dx.doi.org/10.2172/1069280.
Der volle Inhalt der QuellePietarila Graham, Anna, Daniel Holladay, Jonah Miller und Jeffrey Peterson. Spiner-EOSPAC Comparison: performance and accuracy on Power9 CPU and GPU. Office of Scientific and Technical Information (OSTI), März 2022. http://dx.doi.org/10.2172/1859858.
Der volle Inhalt der QuelleKurzak, Jakub, Pitior Luszczek, Mathieu Faverge und Jack Dongarra. LU Factorization with Partial Pivoting for a Multi-CPU, Multi-GPU Shared Memory System. Office of Scientific and Technical Information (OSTI), März 2012. http://dx.doi.org/10.2172/1173291.
Der volle Inhalt der QuelleSnider, Dale M. DOE SBIR Phase-1 Report on Hybrid CPU-GPU Parallel Development of the Eulerian-Lagrangian Barracuda Multiphase Program. Office of Scientific and Technical Information (OSTI), Februar 2011. http://dx.doi.org/10.2172/1009440.
Der volle Inhalt der QuelleAnathan, Sheryas, Alan Williams, James Overfelt, Johnathan Vo, Philip Sakievich, Timothy Smith, Jonathan Hu et al. Demonstration and performance testing of extreme-resolution simulations with static meshes on Summit (CPU & GPU) for a parked-turbine con%0Cfiguration and an actuator-line (mid-fidelity model) wind farm con%0Cfiguration. Office of Scientific and Technical Information (OSTI), Oktober 2020. http://dx.doi.org/10.2172/1706223.
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