Thematische Bibliographien / Approximate multipliers

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Auswahl der wissenschaftlichen Literatur zum Thema „Approximate multipliers“

Autor: Grafiati

Veröffentlicht am 28. Juni 2021

Zuletzt aktualisiert am 7. Februar 2022

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Zeitschriftenartikel zum Thema "Approximate multipliers"

Balasubramanian, Padmanabhan, Raunaq Nayar und Douglas L. Maskell. „Approximate Array Multipliers“. Electronics 10, Nr. 5 (09.03.2021): 630. http://dx.doi.org/10.3390/electronics10050630.

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This article describes the design of approximate array multipliers by making vertical or horizontal cuts in an accurate array multiplier followed by different input and output assignments within the multiplier. We consider a digital image denoising application and show how different combinations of input and output assignments in an approximate array multiplier affect the quality of the denoised images. We consider the accurate array multiplier and several approximate array multipliers for synthesis. The multipliers were described in Verilog hardware description language and synthesized by Synopsys Design Compiler using a 32/28-nm complementary metal-oxide-semiconductor technology. The results show that compared to the accurate array multiplier, one of the proposed approximate array multipliers viz. PAAM01-V7 achieves a 28% reduction in critical path delay, 75.8% reduction in power, and 64.6% reduction in area while enabling the production of a denoised image that is comparable in quality to the image denoised using the accurate array multiplier. The standard design metrics such as critical path delay, total power dissipation, and area of the accurate and approximate multipliers are given, the error parameters of the approximate array multipliers are provided, and the original image, the noisy image, and the denoised images are also depicted for comparison.

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Lotrič, Uroš, Ratko Pilipović und Patricio Bulić. „A Hybrid Radix-4 and Approximate Logarithmic Multiplier for Energy Efficient Image Processing“. Electronics 10, Nr. 10 (14.05.2021): 1175. http://dx.doi.org/10.3390/electronics10101175.

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Multiplication is an essential image processing operation commonly implemented in hardware DSP cores. To improve DSP cores’ area, speed, or energy efficiency, we can approximate multiplication. We present an approximate multiplier that generates two partial products using hybrid radix-4 and logarithmic encoding of the input operands. It uses the exact radix-4 encoding to generate the partial product from the three most significant bits and the logarithmic approximation with mantissa trimming to approximate the partial product from the remaining least-significant bits. The proposed multiplier fills the gap between highly accurate approximate non-logarithmic multipliers with a complex design and less accurate approximate logarithmic multipliers with a more straightforward design. We evaluated the multiplier’s efficiency in terms of error, energy (power-delay-product) and area utilisation using NanGate 45 nm. The experimental results show that the proposed multiplier exhibits good area utilisation and energy consumption and behaves well in image processing applications.

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Kassem, M. S., und K. Rowlands. „The quasi-strict topology on the space of quasi-multipliers of a B*-algebra“. Mathematical Proceedings of the Cambridge Philosophical Society 101, Nr. 3 (Mai 1987): 555–66. http://dx.doi.org/10.1017/s0305004100066913.

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The notion of a left (right, double) multiplier may be regarded as a generalization of the concept of a multiplier to a non-commutative Banach algebra. Each of these is a special case of a more general object, namely that of a quasi-multiplier. The idea of a quasi-multiplier was first introduced by Akemann and Pedersen in ([1], §4), where they consider the quasi-multipliers of a C*-algebra. One of the defects of quasi-multipliers is that, at least a priori, there does not appear to be a way of multiplying them together. The general theory of quasi-multipliers of a Banach algebra A with an approximate identity was developed by McKennon in [5], and in particular he showed that the quasi-multipliers of a considerable class of Banach algebras could be multiplied. McKennon also introduced a locally convex topology γ on the space QM(A) of quasi-multipliers of A and derived some of the elementary properties of (QM(A), γ).

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Jamal, Sameerah. „Approximate Conservation Laws of Nonvariational Differential Equations“. Mathematics 7, Nr. 7 (27.06.2019): 574. http://dx.doi.org/10.3390/math7070574.

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The concept of an approximate multiplier (integrating factor) is introduced. Such multipliers are shown to give rise to approximate local conservation laws for differential equations that admit a small perturbation. We develop an explicit, algorithmic and efficient method to construct both the approximate multipliers and their corresponding approximate fluxes. Our method is applicable to equations with any number of independent and dependent variables, linear or nonlinear, is adaptable to deal with any order of perturbation and does not require the existence of a variational principle. Several important perturbed equations are presented to exemplify the method, such as the approximate KdV equation. Finally, a second treatment of approximate multipliers is discussed.

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Shirane, Kenta, Takahiro Yamamoto und Hiroyuki Tomiyama. „A design methodology for approximate multipliers in convolutional neural networks: A case of MNIST“. International Journal of Reconfigurable and Embedded Systems (IJRES) 10, Nr. 1 (01.03.2021): 1. http://dx.doi.org/10.11591/ijres.v10.i1.pp1-10.

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In this paper, we present a case study on approximate multipliers for MNIST Convolutional Neural Network (CNN). We apply approximate multipliers with different bit-width to the convolution layer in MNIST CNN, evaluate the accuracy of MNIST classification, and analyze the trade-off between approximate multiplier’s area, critical path delay and the accuracy. Based on the results of the evaluation and analysis, we propose a design methodology for approximate multipliers. The approximate multipliers consist of some partial products, which are carefully selected according to the CNN input. With this methodology, we further reduce the area and the delay of the multipliers with keeping high accuracy of the MNIST classification.

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Esposito, Darjn, Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro und Nicola Petra. „Approximate Multipliers Based on New Approximate Compressors“. IEEE Transactions on Circuits and Systems I: Regular Papers 65, Nr. 12 (Dezember 2018): 4169–82. http://dx.doi.org/10.1109/tcsi.2018.2839266.

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Sureshbabu, J., und G. Saravanakumar. „A Radix-16 Booth Multiplier Based on Recoding Adder with Ultra High Power Efficiency and Reduced Complexity for Neuroimaging“. Journal of Medical Imaging and Health Informatics 10, Nr. 4 (01.04.2020): 814–21. http://dx.doi.org/10.1166/jmihi.2020.2936.

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In the current medical developments the neuro imaging plays a vital role in the study of a human brain related disorders. The accuracy of the brain study is mainly dependent on the images created from the scanners at a rapid speed. In achieving this we need a high speed and low power consuming scanners. The current scenario in VLSI design, the scanners highly rely on a high speed Digital Signal Processor (DSP), which generally depends on the speed of a multiplier. Multipliers are considered as a more complex component when compared with adders. The current techniques provide greater access to high-speed multipliers which are designed with less area that consume low power. The major constraints to be considered for an efficient multiplier design are propagation time delay and power dissipation, especially during the ideal time. An approximate recoding adder is proposed to reduce the existing booth multiplier's immensity. It increases the accuracy and reduces complexity through this technique; however, it has an issue with Power Delay Product (PDP) and power dissipation. To solve this problem, the proposed system is designed with a power gating based 16 × 16 bit Booth multiplier based on approximate recoding adder. It decreases the power dissipation and minimizes the length and width of the partial products for speeding up the multiplication process. The results obtained from the simulation show that the designed power gating based Radix multiplier circuits achieves better PDP, average power and area. The achieved results are compared with a Radix based multiplier, power gating CLA based multiplier and CLA based multiplier.

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Ghabraei, Samar, Morteza Rezaalipour, Masoud Dehyadegari und Mahdi Nazm Bojnordi. „AxCEM: Designing Approximate Comparator-Enabled Multipliers“. Journal of Low Power Electronics and Applications 10, Nr. 1 (01.03.2020): 9. http://dx.doi.org/10.3390/jlpea10010009.

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Floating-point multipliers have been the key component of nearly all forms of modern computing systems. Most data-intensive applications, such as deep neural networks (DNNs), expend the majority of their resources and energy budget for floating-point multiplication. The error-resilient nature of these applications often suggests employing approximate computing to improve the energy-efficiency, performance, and area of floating-point multipliers. Prior work has shown that employing hardware-oriented approximation for computing the mantissa product may result in significant system energy reduction at the cost of an acceptable computational error. This article examines the design of an approximate comparator used for preforming mantissa products in the floating-point multipliers. First, we illustrate the use of exact comparators for enhancing power, area, and delay of floating-point multipliers. Then, we explore the design space of approximate comparators for designing efficient approximate comparator-enabled multipliers (AxCEM). Our simulation results indicate that the proposed architecture can achieve a 66% reduction in power dissipation, another 66% reduction in die-area, and a 71% decrease in delay. As compared with the state-of-the-art approximate floating-point multipliers, the accuracy loss in DNN applications due to the proposed AxCEM is less than 0.06%.

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Malviya, Monika, und Prof Pankaj Vyas. „Review of Rounding Based Approximate Multiplier (ROBA) For Digital Signal Processing“. International Journal on Recent and Innovation Trends in Computing and Communication 7, Nr. 4 (15.04.2019): 04–07. http://dx.doi.org/10.17762/ijritcc.v7i4.5277.

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The fundamental idea of adjusting put together estimated multiplier depends with respect to adjusting of numbers. This multiplier can be connected for both marked and unsigned numbers. In this paper contemplated an Rounding Based Approximate Multiplier that is fast yet vitality effective. The methodology is to round the operands to the closest example of two. Along these lines the computational concentrated piece of the augmentation is excluded improving rate and vitality utilization at the cost of a little mistake. This methodology is appropriate to both marked and unsigned augmentations. The productivity of the ROBA multiplier is assessed by contrasting its execution and those of some rough and precise multipliers utilizing distinctive plan parameters.

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Miura, Takeshi, Go Hirasawa und Sin-Ei Takahasi. „Stability of multipliers on Banach algebras“. International Journal of Mathematics and Mathematical Sciences 2004, Nr. 45 (2004): 2377–81. http://dx.doi.org/10.1155/s0161171204402324.

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SupposeAis a Banach algebra without order. We show that an approximate multiplierT:A→Ais an exact multiplier. We also consider an approximate multiplierTon a Banach algebra which need not be without order. If, in addition,Tis approximately additive, then we prove the Hyers-Ulam-Rassias stability ofT.

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Dissertationen zum Thema "Approximate multipliers"

Válek, Matěj. „Aproximativní implementace aritmetických operací v obrazových filtrech“. Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2021. http://www.nusl.cz/ntk/nusl-445540.

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Tato diplomová práce se zabývá aproximativní implementace aritmetických operací v obrazových filtrech. Zejména tedy využitím aproximativních technik pro úpravu způsobu násobení v netriviálním obrazovém filtru. K tomu je využito několik technik, jako použití převodu násobení s pohyblivou řadovou čárkou na násobení s pevnou řadovou čárkou, či využití evolučních algoritmů zejména kartézkého genetického programování pro vytvoření nových aproximovaných násobiček, které vykazují přijatelnou chybu, ale současně redukují výpočetní náročnost filtrace. Výsledkem jsou evolučně navržené aproximativní násobičky zohledňující distribuci dat v obrazovém filtru a jejich nasazení v obrazovém filtru a porovnání původního filtru s aproximovaným fitrem na sadě barevných obrázků.

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Buchteile zum Thema "Approximate multipliers"

Rehman, Semeen, Bharath Srinivas Prabakaran, Walaa El-Harouni, Muhammad Shafique und Jörg Henkel. „Heterogeneous Approximate Multipliers: Architectures and Design Methodologies“. In Approximate Circuits, 45–66. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_3.

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Hashemi, Soheil, und Sherief Reda. „Approximate Multipliers and Dividers Using Dynamic Bit Selection“. In Approximate Circuits, 25–44. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_2.

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Mazahir, Sana, Muhammad Kamran Ayub, Osman Hasan und Muhammad Shafique. „Probabilistic Error Analysis of Approximate Adders and Multipliers“. In Approximate Circuits, 99–120. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_5.

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Pinos, Michal, Vojtech Mrazek und Lukas Sekanina. „Evolutionary Neural Architecture Search Supporting Approximate Multipliers“. In Lecture Notes in Computer Science, 82–97. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-72812-0_6.

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Jagadeeswara Rao, E., und P. Samundiswary. „A Review of Approximate Multipliers and Its Applications“. In Advances in Automation, Signal Processing, Instrumentation, and Control, 1381–92. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-15-8221-9_128.

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Gundavarapu, Vishal, M. Balaji und P. Sasipriya. „Design of Low Power Multipliers Using Approximate Compressors“. In Lecture Notes in Electrical Engineering, 65–71. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-33-4866-0_9.

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Klawonn, A. „An Iterative Substructuring Method with Lagrange Multipliers for Elasticity Problems Using Approximate Neumann Subdomain Solvers“. In Multifield Problems, 193–200. Berlin, Heidelberg: Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/978-3-662-04015-7_21.

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Natrajan, P. B., V. S. R. Subrahmanyam und K. V. S. S. S. Vyshnavi. „Approximate Multiplier with Low Power Encoded Partial Products and Approximate Compressors“. In Advanced Techniques for IoT Applications, 452–62. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-4435-1_44.

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Sai Revanth Reddy, C., U. Anil Kumar und Syed Ershad Ahmed. „Design of Efficient Approximate Multiplier for Image Processing Applications“. In Lecture Notes in Electrical Engineering, 511–18. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-4775-1_55.

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Lin, Yan-Xia. „Density Approximant Based on Noise Multiplied Data“. In Privacy in Statistical Databases, 89–104. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-11257-2_8.

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Konferenzberichte zum Thema "Approximate multipliers"

Goswami, Sushree Sila P., Bikram Paul, Sunil Dutt und Gaurav Trivedi. „Comparative Review of Approximate Multipliers“. In 2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA). IEEE, 2020. http://dx.doi.org/10.1109/radioelektronika49387.2020.9092370.

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Masadeh, Mahmoud, Osman Hasan und Sofiene Tahar. „Comparative Study of Approximate Multipliers“. In GLSVLSI '18: Great Lakes Symposium on VLSI 2018. New York, NY, USA: ACM, 2018. http://dx.doi.org/10.1145/3194554.3194626.

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Liu, Weiqiang, Jiahua Xu, Danye Wang und Fabrizio Lombardi. „Design of Approximate Logarithmic Multipliers“. In GLSVLSI '17: Great Lakes Symposium on VLSI 2017. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3060403.3060409.

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Valls, Victor, und Douglas J. Leith. „Dual subgradient methods using approximate multipliers“. In 2015 53rd Annual Allerton Conference on Communication, Control and Computing (Allerton). IEEE, 2015. http://dx.doi.org/10.1109/allerton.2015.7447119.

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Varma, Kamya R., und Sonali Agrawal. „High speed, Low power Approximate Multipliers“. In 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI). IEEE, 2018. http://dx.doi.org/10.1109/icacci.2018.8554933.

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Rehman, Semeen, Walaa El-Harouni, Muhammad Shafique, Akash Kumar und Jörg Henkel. „Architectural-space exploration of approximate multipliers“. In ICCAD '16: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN. New York, NY, USA: ACM, 2016. http://dx.doi.org/10.1145/2966986.2967005.

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Valls, Victor, und Douglas J. Leith. „Stochastic subgradient methods with approximate Lagrange multipliers“. In 2016 IEEE 55th Conference on Decision and Control (CDC). IEEE, 2016. http://dx.doi.org/10.1109/cdc.2016.7799220.

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Hemamithra, K. G., S. Lakshmi Priya, K. Lakshmirajan, R. Mohanrai und S. R. Ramesh. „FPGA Implementation of Power Efficient Approximate Multipliers“. In 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT). IEEE, 2018. http://dx.doi.org/10.1109/rteict42901.2018.9012325.

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Ullah, Salim, Sanjeev Sripadraj Murthy und Akash Kumar. „SMApproxLib: Library of FPGA-based Approximate Multipliers“. In 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC). IEEE, 2018. http://dx.doi.org/10.1109/dac.2018.8465845.

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Petrlik, J., und L. Sekanina. „Multiobjective evolution of approximate multiple constant multipliers“. In 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2013. http://dx.doi.org/10.1109/ddecs.2013.6549800.

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